Update git submodules

* Update docs/submodules/yardstick from branch 'master'
  - Merge "NSB: fix port topology"
  - NSB: fix port topology
    
    Add a new PortPair class to resolve the
    topology into list of public and private ports.
    
    Before we were calculating public/private in multiple
    locations and using different conventions.
    
    In addition for all the DPDK test we need to use the DPDK
    port number and no rely on interface ordering or interface naming
    conventions.
    
    We used to use  xe0 -> 0, xe1 -> 1, etc.  This is not the DPDK port
    number.
    
    Use the new dpdknicbind_helper class to parse the output of
    dpdk-devbind.py to find the actual DPDK port number at runtime.
    
    We then use this DPDK port number to correctly calculate the
    port_mask_hex.
    
    The port mask maps the DPDK port num (PMD ID) to the LINK ID
    used in the pipeline config
    
    We also need to make sure we only use the interfaces matched to the
    topology and not use all the interfaces, because in some cases we will
    have unused interfaces.  In particular TRex always requires an even
    number of interfaces, so for single port TRex tests we have to create
    the second port and not use it.
    
    Thus we had to modify the traffic generator stats code to only dump
    stats for used ports and no unused ports.
    
    Ixia was using interface ordering to map to Ixia ports, instead we use
    the dpdk_port_num which must be hardcoded for Ixia.
    
    Renamed traffic_profile.execute to traffic_profile.execute_traffic so
    we can trace the code easier.
    
    We pass the port used by the traffic profile to generate_samples so we
    don't get stats for unused ports.
    
    Fixed up vPE config creation and bring up issues.
    
    Fixed up CGNAPT and UDP_Replay to work correctly.
    
    Tested with 4-port scale-out
    
    Change-Id: I2e4f328bff2904108081e92a4bf712333fa73869
    Signed-off-by: Ross Brattain <ross.b.brattain@intel.com>
    Signed-off-by: Edward MacGillivray <edward.s.macgillivray@intel.com>
    

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