summaryrefslogtreecommitdiffstats
path: root/qemu/roms/u-boot/doc/README.mxc_hab
blob: 43e64a2797ded0b94e6b3865b01752172ac1cef1 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
High Assurance Boot (HAB) for i.MX6 CPUs

To authenticate U-Boot only by the CPU there is no code required in
U-Boot itself. However, the U-Boot image to be programmed into the
boot media needs to be properly constructed, i.e. it must contain a
proper Command Sequence File (CSF).

The Initial Vector Table contains a pointer to the CSF. Please see
doc/README.imximage for how to prepare u-boot.imx.

The CSF itself is being generated by Freescale HAB tools.

mkimage will output additional information about "HAB Blocks"
which can be used in the Freescale tooling to authenticate U-Boot
(entries in the CSF file).

Image Type:   Freescale IMX Boot Image
Image Ver:    2 (i.MX53/6 compatible)
Data Size:    327680 Bytes = 320.00 kB = 0.31 MB
Load Address: 177ff420
Entry Point:  17800000
HAB Blocks:   177ff400 00000000 0004dc00
	      ^^^^^^^^ ^^^^^^^^ ^^^^^^^^
		|	|	   |
		|	|	   -------- (1)
		|	|
		|	------------------- (2)
		|
		--------------------------- (3)

(1)	Size of area in file u-boot.imx to sign
	This area should include the IVT, the Boot Data the DCD
	and U-Boot itself.
(2)	Start of area in u-boot.imx to sign
(3)	Start of area in RAM to authenticate

CONFIG_SECURE_BOOT currently enables only an additional command
'hab_status' in U-Boot to retrieve the HAB status and events. This
can be useful while developing and testing HAB.

Commands to generate a signed U-Boot using Freescale HAB tools:
cst --o U-Boot_CSF.bin < U-Boot.CSF
objcopy -I binary -O binary --pad-to 0x2000 --gap-fill=0x00 \
	U-Boot_CSF.bin U-Boot_CSF_pad.bin
cat u-boot.imx U-Boot_CSF_pad.bin > u-boot-signed.imx

NOTE: U-Boot_CSF.bin needs to be padded to the value specified in
the imximage.cfg file.
fff0f0 } /* Literal.String.Backtick */ .highlight .sc { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Char */ .highlight .dl { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Delimiter */ .highlight .sd { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Doc */ .highlight .s2 { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Double */ .highlight .se { color: #0044dd; background-color: #fff0f0 } /* Literal.String.Escape */ .highlight .sh { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Heredoc */ .highlight .si { color: #3333bb; background-color: #fff0f0 } /* Literal.String.Interpol */ .highlight .sx { color: #22bb22; background-color: #f0fff0 } /* Literal.String.Other */ .highlight .sr { color: #008800; background-color: #fff0ff } /* Literal.String.Regex */ .highlight .s1 { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Single */ .highlight .ss { color: #aa6600; background-color: #fff0f0 } /* Literal.String.Symbol */ .highlight .bp { color: #003388 } /* Name.Builtin.Pseudo */ .highlight .fm { color: #0066bb; font-weight: bold } /* Name.Function.Magic */ .highlight .vc { color: #336699 } /* Name.Variable.Class */ .highlight .vg { color: #dd7700 } /* Name.Variable.Global */ .highlight .vi { color: #3333bb } /* Name.Variable.Instance */ .highlight .vm { color: #336699 } /* Name.Variable.Magic */ .highlight .il { color: #0000DD; font-weight: bold } /* Literal.Number.Integer.Long */
# Copyright (c) 2016-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#

[lua]
lpm4 = dofile("ipv4_bng.lua")
user_table = dofile("gre_table.lua")

[eal options]
-n=4 ; $sut_memory_channels
no-output=no ; disable DPDK debug output

[variables]
$master        =0
$core_lb_cpe0  =1
$core_inet0    =2
$core_lb_cpe1  =3
$core_inet1    =4
$core_workers  =13-14,15-16,17-18,19-20
$core_tx_cpe0  =6
$core_tx_cpe1  =8
$core_tx_inet0 =9
$core_tx_inet1 =11
$core_cpe1     =12

[port 0]
name=cpe0
mac=hardware
rx desc=2048
tx desc=2048
[port 1]
name=inet0
mac=hardware
rx desc=2048
tx desc=2048
[port 2]
name=cpe1
mac=hardware
rx desc=2048
tx desc=2048
[port 3]
name=inet1
mac=hardware
rx desc=2048
tx desc=2048

[defaults]
mempool size=142K
memcache size=512
qinq tag=0xa888

[global]
start time=20
name=BNG

[core $master]
mode=master

; IPv4
;*****************************************************************************************
;##### Load Balancing receiving from CPE and from Internet ####
[core $core_lb_cpe0]
name=LB-cpe
task=0
mode=lbqinq
rx port=cpe0
tx cores=(${core_workers})t0 proto=ipv4
tx cores=(${core_workers})t0 proto=arp
drop=no

[core $core_inet0]
name=LB-inet
task=0
mode=lbnetwork
rx port=inet0
untag mpls=yes
tx cores=(${core_workers})t1 proto=ipv4
drop=no

[core $core_lb_cpe1]
name=LB-cpe
task=0
mode=lbqinq
rx port=cpe1
tx cores=(${core_workers})t0 proto=ipv4
tx cores=(${core_workers})t0 proto=arp
drop=no

[core $core_inet1]
name=LB-inet
task=0
mode=lbnetwork
rx port=inet1
untag mpls=yes
tx cores=(${core_workers})t1 proto=ipv4
drop=no

[core $core_tx_cpe0]
name=LB-cpe
task=0
mode=nop
rx ring=yes
tx port=cpe0
drop=no

[core $core_tx_inet0]
name=LB-cpe
task=0
mode=nop
rx ring=yes
tx port=inet0
drop=no

[core $core_tx_cpe1]
name=LB-cpe
task=0
mode=nop
rx ring=yes
tx port=cpe1
drop=no

[core $core_tx_inet1]
name=LB-cpe
task=0
mode=nop
rx ring=yes
tx port=inet1
drop=no


;*****************************************************************************************
;#### Workers receiving from LB
;#### Task 0: QinQ decapsulation + gre encapsulation + routing
;#### Task 1: ARP
;#### Task 2: GRE depcapsulation + QinQ encapsulation + use learned mac
[core $core_workers]
name=Worker
task=0
mode=qinqdecapv4
rx ring=yes
tx cores from routing table=${core_tx_inet0},${core_tx_inet1}
drop=no
route table=lpm4
local ipv4=21.22.23.24
handle arp=yes
user table=user_table
fast path handle arp=yes

task=1
mode=qinqencapv4
rx ring=yes ; gre received from internal queue
tx cores from cpe table=${core_tx_cpe0},${core_tx_cpe1} remap=cpe0,cpe1
drop=no
user table=user_table

;