summaryrefslogtreecommitdiffstats
path: root/kernel/sound/soc/codecs/ssm2518.c
blob: 67ea55adb307d373dd4f3d91291b930b35d68a7a (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
/*
 * SSM2518 amplifier audio driver
 *
 * Copyright 2013 Analog Devices Inc.
 *  Author: Lars-Peter Clausen <lars@metafoo.de>
 *
 * Licensed under the GPL-2.
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/gpio.h>
#include <linux/of_gpio.h>
#include <linux/platform_data/ssm2518.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/initval.h>
#include <sound/tlv.h>

#include "ssm2518.h"

#define SSM2518_REG_POWER1		0x00
#define SSM2518_REG_CLOCK		0x01
#define SSM2518_REG_SAI_CTRL1		0x02
#define SSM2518_REG_SAI_CTRL2		0x03
#define SSM2518_REG_CHAN_MAP		0x04
#define SSM2518_REG_LEFT_VOL		0x05
#define SSM2518_REG_RIGHT_VOL		0x06
#define SSM2518_REG_MUTE_CTRL		0x07
#define SSM2518_REG_FAULT_CTRL		0x08
#define SSM2518_REG_POWER2		0x09
#define SSM2518_REG_DRC_1		0x0a
#define SSM2518_REG_DRC_2		0x0b
#define SSM2518_REG_DRC_3		0x0c
#define SSM2518_REG_DRC_4		0x0d
#define SSM2518_REG_DRC_5		0x0e
#define SSM2518_REG_DRC_6		0x0f
#define SSM2518_REG_DRC_7		0x10
#define SSM2518_REG_DRC_8		0x11
#define SSM2518_REG_DRC_9		0x12

#define SSM2518_POWER1_RESET			BIT(7)
#define SSM2518_POWER1_NO_BCLK			BIT(5)
#define SSM2518_POWER1_MCS_MASK			(0xf << 1)
#define SSM2518_POWER1_MCS_64FS			(0x0 << 1)
#define SSM2518_POWER1_MCS_128FS		(0x1 << 1)
#define SSM2518_POWER1_MCS_256FS		(0x2 << 1)
#define SSM2518_POWER1_MCS_384FS		(0x3 << 1)
#define SSM2518_POWER1_MCS_512FS		(0x4 << 1)
#define SSM2518_POWER1_MCS_768FS		(0x5 << 1)
#define SSM2518_POWER1_MCS_100FS		(0x6 << 1)
#define SSM2518_POWER1_MCS_200FS		(0x7 << 1)
#define SSM2518_POWER1_MCS_400FS		(0x8 << 1)
#define SSM2518_POWER1_SPWDN			BIT(0)

#define SSM2518_CLOCK_ASR			BIT(0)

#define SSM2518_SAI_CTRL1_FMT_MASK		(0x3 << 5)
#define SSM2518_SAI_CTRL1_FMT_I2S		(0x0 << 5)
#define SSM2518_SAI_CTRL1_FMT_LJ		(0x1 << 5)
#define SSM2518_SAI_CTRL1_FMT_RJ_24BIT		(0x2 << 5)
#define SSM2518_SAI_CTRL1_FMT_RJ_16BIT		(0x3 << 5)

#define SSM2518_SAI_CTRL1_SAI_MASK		(0x7 << 2)
#define SSM2518_SAI_CTRL1_SAI_I2S		(0x0 << 2)
#define SSM2518_SAI_CTRL1_SAI_TDM_2		(0x1 << 2)
#define SSM2518_SAI_CTRL1_SAI_TDM_4		(0x2 << 2)
#define SSM2518_SAI_CTRL1_SAI_TDM_8		(0x3 << 2)
#define SSM2518_SAI_CTRL1_SAI_TDM_16		(0x4 << 2)
#define SSM2518_SAI_CTRL1_SAI_MONO		(0x5 << 2)

#define SSM2518_SAI_CTRL1_FS_MASK		(0x3)
#define SSM2518_SAI_CTRL1_FS_8000_12000		(0x0)
#define SSM2518_SAI_CTRL1_FS_16000_24000	(0x1)
#define SSM2518_SAI_CTRL1_FS_32000_48000	(0x2)
#define SSM2518_SAI_CTRL1_FS_64000_96000	(0x3)

#define SSM2518_SAI_CTRL2_BCLK_INTERAL		BIT(7)
#define SSM2518_SAI_CTRL2_LRCLK_PULSE		BIT(6)
#define SSM2518_SAI_CTRL2_LRCLK_INVERT		BIT(5)
#define SSM2518_SAI_CTRL2_MSB			BIT(4)
#define SSM2518_SAI_CTRL2_SLOT_WIDTH_MASK	(0x3 << 2)
#define SSM2518_SAI_CTRL2_SLOT_WIDTH_32		(0x0 << 2)
#define SSM2518_SAI_CTRL2_SLOT_WIDTH_24		(0x1 << 2)
#define SSM2518_SAI_CTRL2_SLOT_WIDTH_16		(0x2 << 2)
#define SSM2518_SAI_CTRL2_BCLK_INVERT		BIT(1)

#define SSM2518_CHAN_MAP_RIGHT_SLOT_OFFSET	4
#define SSM2518_CHAN_MAP_RIGHT_SLOT_MASK	0xf0
#define SSM2518_CHAN_MAP_LEFT_SLOT_OFFSET	0
#define SSM2518_CHAN_MAP_LEFT_SLOT_MASK		0x0f

#define SSM2518_MUTE_CTRL_ANA_GAIN		BIT(5)
#define SSM2518_MUTE_CTRL_MUTE_MASTER		BIT(0)

#define SSM2518_POWER2_APWDN			BIT(0)

#define SSM2518_DAC_MUTE			BIT(6)
#define SSM2518_DAC_FS_MASK			0x07
#define SSM2518_DAC_FS_8000			0x00
#define SSM2518_DAC_FS_16000			0x01
#define SSM2518_DAC_FS_32000			0x02
#define SSM2518_DAC_FS_64000			0x03
#define SSM2518_DAC_FS_128000			0x04

struct ssm2518 {
	struct regmap *regmap;
	bool right_j;

	unsigned int sysclk;
	const struct snd_pcm_hw_constraint_list *constraints;

	int enable_gpio;
};

static const struct reg_default ssm2518_reg_defaults[] = {
	{ 0x00, 0x05 },
	{ 0x01, 0x00 },
	{ 0x02, 0x02 },
	{ 0x03, 0x00 },
	{ 0x04, 0x10 },
	{ 0x05, 0x40 },
	{ 0x06, 0x40 },
	{ 0x07, 0x81 },
	{ 0x08, 0x0c },
	{ 0x09, 0x99 },
	{ 0x0a, 0x7c },
	{ 0x0b, 0x5b },
	{ 0x0c, 0x57 },
	{ 0x0d, 0x89 },
	{ 0x0e, 0x8c },
	{ 0x0f, 0x77 },
	{ 0x10, 0x26 },
	{ 0x11, 0x1c },
	{ 0x12, 0x97 },
};

static const DECLARE_TLV_DB_MINMAX_MUTE(ssm2518_vol_tlv, -7125, 2400);
static const DECLARE_TLV_DB_SCALE(ssm2518_compressor_tlv, -3400, 200, 0);
static const DECLARE_TLV_DB_SCALE(ssm2518_expander_tlv, -8100, 300, 0);
static const DECLARE_TLV_DB_SCALE(ssm2518_noise_gate_tlv, -9600, 300, 0);
static const DECLARE_TLV_DB_SCALE(ssm2518_post_drc_tlv, -2400, 300, 0);

static const DECLARE_TLV_DB_RANGE(ssm2518_limiter_tlv,
	0, 7, TLV_DB_SCALE_ITEM(-2200, 200, 0),
	7, 15, TLV_DB_SCALE_ITEM(-800, 100, 0),
);

static const char * const ssm2518_drc_peak_detector_attack_time_text[] = {
	"0 ms", "0.1 ms", "0.19 ms", "0.37 ms", "0.75 ms", "1.5 ms", "3 ms",
	"6 ms", "12 ms", "24 ms", "48 ms", "96 ms", "192 ms", "384 ms",
	"768 ms", "1536 ms",
};

static const char * const ssm2518_drc_peak_detector_release_time_text[] = {
	"0 ms", "1.5 ms", "3 ms", "6 ms", "12 ms", "24 ms", "48 ms", "96 ms",
	"192 ms", "384 ms", "768 ms", "1536 ms", "3072 ms", "6144 ms",
	"12288 ms", "24576 ms"
};

static const char * const ssm2518_drc_hold_time_text[] = {
	"0 ms", "0.67 ms", "1.33 ms", "2.67 ms", "5.33 ms", "10.66 ms",
	"21.32 ms", "42.64 ms", "85.28 ms", "170.56 ms", "341.12 ms",
	"682.24 ms", "1364 ms",
};

static SOC_ENUM_SINGLE_DECL(ssm2518_drc_peak_detector_attack_time_enum,
	SSM2518_REG_DRC_2, 4, ssm2518_drc_peak_detector_attack_time_text);
static SOC_ENUM_SINGLE_DECL(ssm2518_drc_peak_detector_release_time_enum,
	SSM2518_REG_DRC_2, 0, ssm2518_drc_peak_detector_release_time_text);
static SOC_ENUM_SINGLE_DECL(ssm2518_drc_attack_time_enum,
	SSM2518_REG_DRC_6, 4, ssm2518_drc_peak_detector_attack_time_text);
static SOC_ENUM_SINGLE_DECL(ssm2518_drc_decay_time_enum,
	SSM2518_REG_DRC_6, 0, ssm2518_drc_peak_detector_release_time_text);
static SOC_ENUM_SINGLE_DECL(ssm2518_drc_hold_time_enum,
	SSM2518_REG_DRC_7, 4, ssm2518_drc_hold_time_text);
static SOC_ENUM_SINGLE_DECL(ssm2518_drc_noise_gate_hold_time_enum,
	SSM2518_REG_DRC_7, 0, ssm2518_drc_hold_time_text);
static SOC_ENUM_SINGLE_DECL(ssm2518_drc_rms_averaging_time_enum,
	SSM2518_REG_DRC_9, 0, ssm2518_drc_peak_detector_release_time_text);

static const struct snd_kcontrol_new ssm2518_snd_controls[] = {
	SOC_SINGLE("Playback De-emphasis Switch", SSM2518_REG_MUTE_CTRL,
			4, 1, 0),
	SOC_DOUBLE_R_TLV("Master Playback Volume", SSM2518_REG_LEFT_VOL,
			SSM2518_REG_RIGHT_VOL, 0, 0xff, 1, ssm2518_vol_tlv),
	SOC_DOUBLE("Master Playback Switch", SSM2518_REG_MUTE_CTRL, 2, 1, 1, 1),

	SOC_SINGLE("Amp Low Power Mode Switch", SSM2518_REG_POWER2, 4, 1, 0),
	SOC_SINGLE("DAC Low Power Mode Switch", SSM2518_REG_POWER2, 3, 1, 0),

	SOC_SINGLE("DRC Limiter Switch", SSM2518_REG_DRC_1, 5, 1, 0),
	SOC_SINGLE("DRC Compressor Switch", SSM2518_REG_DRC_1, 4, 1, 0),
	SOC_SINGLE("DRC Expander Switch", SSM2518_REG_DRC_1, 3, 1, 0),
	SOC_SINGLE("DRC Noise Gate Switch", SSM2518_REG_DRC_1, 2, 1, 0),
	SOC_DOUBLE("DRC Switch", SSM2518_REG_DRC_1, 0, 1, 1, 0),

	SOC_SINGLE_TLV("DRC Limiter Threshold Volume",
			SSM2518_REG_DRC_3, 4, 15, 1, ssm2518_limiter_tlv),
	SOC_SINGLE_TLV("DRC Compressor Lower Threshold Volume",
			SSM2518_REG_DRC_3, 0, 15, 1, ssm2518_compressor_tlv),
	SOC_SINGLE_TLV("DRC Expander Upper Threshold Volume", SSM2518_REG_DRC_4,
			4, 15, 1, ssm2518_expander_tlv),
	SOC_SINGLE_TLV("DRC Noise Gate Threshold Volume",
			SSM2518_REG_DRC_4, 0, 15, 1, ssm2518_noise_gate_tlv),
	SOC_SINGLE_TLV("DRC Upper Output Threshold Volume",
			SSM2518_REG_DRC_5, 4, 15, 1, ssm2518_limiter_tlv),
	SOC_SINGLE_TLV("DRC Lower Output Threshold Volume",
			SSM2518_REG_DRC_5, 0, 15, 1, ssm2518_noise_gate_tlv),
	SOC_SINGLE_TLV("DRC Post Volume", SSM2518_REG_DRC_8,
			2, 15, 1, ssm2518_post_drc_tlv),

	SOC_ENUM("DRC Peak Detector Attack Time",
		ssm2518_drc_peak_detector_attack_time_enum),
	SOC_ENUM("DRC Peak Detector Release Time",
		ssm2518_drc_peak_detector_release_time_enum),
	SOC_ENUM("DRC Attack Time", ssm2518_drc_attack_time_enum),
	SOC_ENUM("DRC Decay Time", ssm2518_drc_decay_time_enum),
	SOC_ENUM("DRC Hold Time", ssm2518_drc_hold_time_enum),
	SOC_ENUM("DRC Noise Gate Hold Time",
		ssm2518_drc_noise_gate_hold_time_enum),
	SOC_ENUM("DRC RMS Averaging Time", ssm2518_drc_rms_averaging_time_enum),
};

static const struct snd_soc_dapm_widget ssm2518_dapm_widgets[] = {
	SND_SOC_DAPM_DAC("DACL", "HiFi Playback", SSM2518_REG_POWER2, 1, 1),
	SND_SOC_DAPM_DAC("DACR", "HiFi Playback", SSM2518_REG_POWER2, 2, 1),

	SND_SOC_DAPM_OUTPUT("OUTL"),
	SND_SOC_DAPM_OUTPUT("OUTR"),
};

static const struct snd_soc_dapm_route ssm2518_routes[] = {
	{ "OUTL", NULL, "DACL" },
	{ "OUTR", NULL, "DACR" },
};

struct ssm2518_mcs_lut {
	unsigned int rate;
	const unsigned int *sysclks;
};

static const unsigned int ssm2518_sysclks_2048000[] = {
	2048000, 4096000, 8192000, 12288000, 16384000, 24576000,
	3200000, 6400000, 12800000, 0
};

static const unsigned int ssm2518_sysclks_2822000[] = {
	2822000, 5644800, 11289600, 16934400, 22579200, 33868800,
	4410000, 8820000, 17640000, 0
};

static const unsigned int ssm2518_sysclks_3072000[] = {
	3072000, 6144000, 12288000, 16384000, 24576000, 38864000,
	4800000, 9600000, 19200000, 0
};

static const struct ssm2518_mcs_lut ssm2518_mcs_lut[] = {
	{ 8000,  ssm2518_sysclks_2048000, },
	{ 11025, ssm2518_sysclks_2822000, },
	{ 12000, ssm2518_sysclks_3072000, },
	{ 16000, ssm2518_sysclks_2048000, },
	{ 24000, ssm2518_sysclks_3072000, },
	{ 22050, ssm2518_sysclks_2822000, },
	{ 32000, ssm2518_sysclks_2048000, },
	{ 44100, ssm2518_sysclks_2822000, },
	{ 48000, ssm2518_sysclks_3072000, },
	{ 96000, ssm2518_sysclks_3072000, },
};

static const unsigned int ssm2518_rates_2048000[] = {
	8000, 16000, 32000,
};

static const struct snd_pcm_hw_constraint_list ssm2518_constraints_2048000 = {
	.list = ssm2518_rates_2048000,
	.count = ARRAY_SIZE(ssm2518_rates_2048000),
};

static const unsigned int ssm2518_rates_2822000[] = {
	11025, 22050, 44100,
};

static const struct snd_pcm_hw_constraint_list ssm2518_constraints_2822000 = {
	.list = ssm2518_rates_2822000,
	.count = ARRAY_SIZE(ssm2518_rates_2822000),
};

static const unsigned int ssm2518_rates_3072000[] = {
	12000, 24000, 48000, 96000,
};

static const struct snd_pcm_hw_constraint_list ssm2518_constraints_3072000 = {
	.list = ssm2518_rates_3072000,
	.count = ARRAY_SIZE(ssm2518_rates_3072000),
};

static const unsigned int ssm2518_rates_12288000[] = {
	8000, 12000, 16000, 24000, 32000, 48000, 96000,
};

static const struct snd_pcm_hw_constraint_list ssm2518_constraints_12288000 = {
	.list = ssm2518_rates_12288000,
	.count = ARRAY_SIZE(ssm2518_rates_12288000),
};

static unsigned int ssm2518_lookup_mcs(struct ssm2518 *ssm2518,
	unsigned int rate)
{
	const unsigned int *sysclks = NULL;
	int i;

	for (i = 0; i < ARRAY_SIZE(ssm2518_mcs_lut); i++) {
		if (ssm2518_mcs_lut[i].rate == rate) {
			sysclks = ssm2518_mcs_lut[i].sysclks;
			break;
		}
	}

	if (!sysclks)
		return -EINVAL;

	for (i = 0; sysclks[i]; i++) {
		if (sysclks[i] == ssm2518->sysclk)
			return i;
	}

	return -EINVAL;
}

static int ssm2518_hw_params(struct snd_pcm_substream *substream,
	struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
{
	struct snd_soc_codec *codec = dai->codec;
	struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(codec);
	unsigned int rate = params_rate(params);
	unsigned int ctrl1, ctrl1_mask;
	int mcs;
	int ret;

	mcs = ssm2518_lookup_mcs(ssm2518, rate);
	if (mcs < 0)
		return mcs;

	ctrl1_mask = SSM2518_SAI_CTRL1_FS_MASK;

	if (rate >= 8000 && rate <= 12000)
		ctrl1 = SSM2518_SAI_CTRL1_FS_8000_12000;
	else if (rate >= 16000 && rate <= 24000)
		ctrl1 = SSM2518_SAI_CTRL1_FS_16000_24000;
	else if (rate >= 32000 && rate <= 48000)
		ctrl1 = SSM2518_SAI_CTRL1_FS_32000_48000;
	else if (rate >= 64000 && rate <= 96000)
		ctrl1 = SSM2518_SAI_CTRL1_FS_64000_96000;
	else
		return -EINVAL;

	if (ssm2518->right_j) {
		switch (params_width(params)) {
		case 16:
			ctrl1 |= SSM2518_SAI_CTRL1_FMT_RJ_16BIT;
			break;
		case 24:
			ctrl1 |= SSM2518_SAI_CTRL1_FMT_RJ_24BIT;
			break;
		default:
			return -EINVAL;
		}
		ctrl1_mask |= SSM2518_SAI_CTRL1_FMT_MASK;
	}

	/* Disable auto samplerate detection */
	ret = regmap_update_bits(ssm2518->regmap, SSM2518_REG_CLOCK,
				SSM2518_CLOCK_ASR, SSM2518_CLOCK_ASR);
	if (ret < 0)
		return ret;

	ret = regmap_update_bits(ssm2518->regmap, SSM2518_REG_SAI_CTRL1,
				ctrl1_mask, ctrl1);
	if (ret < 0)
		return ret;

	return regmap_update_bits(ssm2518->regmap, SSM2518_REG_POWER1,
				SSM2518_POWER1_MCS_MASK, mcs << 1);
}

static int ssm2518_mute(struct snd_soc_dai *dai, int mute)
{
	struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(dai->codec);
	unsigned int val;

	if (mute)
		val = SSM2518_MUTE_CTRL_MUTE_MASTER;
	else
		val = 0;

	return regmap_update_bits(ssm2518->regmap, SSM2518_REG_MUTE_CTRL,
			SSM2518_MUTE_CTRL_MUTE_MASTER, val);
}

static int ssm2518_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
	struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(dai->codec);
	unsigned int ctrl1 = 0, ctrl2 = 0;
	bool invert_fclk;
	int ret;

	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	case SND_SOC_DAIFMT_CBS_CFS:
		break;
	default:
		return -EINVAL;
	}

	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
	case SND_SOC_DAIFMT_NB_NF:
		invert_fclk = false;
		break;
	case SND_SOC_DAIFMT_IB_NF:
		ctrl2 |= SSM2518_SAI_CTRL2_BCLK_INVERT;
		invert_fclk = false;
		break;
	case SND_SOC_DAIFMT_NB_IF:
		invert_fclk = true;
		break;
	case SND_SOC_DAIFMT_IB_IF:
		ctrl2 |= SSM2518_SAI_CTRL2_BCLK_INVERT;
		invert_fclk = true;
		break;
	default:
		return -EINVAL;
	}

	ssm2518->right_j = false;
	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	case SND_SOC_DAIFMT_I2S:
		ctrl1 |= SSM2518_SAI_CTRL1_FMT_I2S;
		break;
	case SND_SOC_DAIFMT_LEFT_J:
		ctrl1 |= SSM2518_SAI_CTRL1_FMT_LJ;
		invert_fclk = !invert_fclk;
		break;
	case SND_SOC_DAIFMT_RIGHT_J:
		ctrl1 |= SSM2518_SAI_CTRL1_FMT_RJ_24BIT;
		ssm2518->right_j = true;
		invert_fclk = !invert_fclk;
		break;
	case SND_SOC_DAIFMT_DSP_A:
		ctrl2 |= SSM2518_SAI_CTRL2_LRCLK_PULSE;
		ctrl1 |= SSM2518_SAI_CTRL1_FMT_I2S;
		invert_fclk = false;
		break;
	case SND_SOC_DAIFMT_DSP_B:
		ctrl2 |= SSM2518_SAI_CTRL2_LRCLK_PULSE;
		ctrl1 |= SSM2518_SAI_CTRL1_FMT_LJ;
		invert_fclk = false;
		break;
	default:
		return -EINVAL;
	}

	if (invert_fclk)
		ctrl2 |= SSM2518_SAI_CTRL2_LRCLK_INVERT;

	ret = regmap_write(ssm2518->regmap, SSM2518_REG_SAI_CTRL1, ctrl1);
	if (ret)
		return ret;

	return regmap_write(ssm2518->regmap, SSM2518_REG_SAI_CTRL2, ctrl2);
}

static int ssm2518_set_power(struct ssm2518 *ssm2518, bool enable)
{
	int ret = 0;

	if (!enable) {
		ret = regmap_update_bits(ssm2518->regmap, SSM2518_REG_POWER1,
			SSM2518_POWER1_SPWDN, SSM2518_POWER1_SPWDN);
		regcache_mark_dirty(ssm2518->regmap);
	}

	if (gpio_is_valid(ssm2518->enable_gpio))
		gpio_set_value(ssm2518->enable_gpio, enable);

	regcache_cache_only(ssm2518->regmap, !enable);

	if (enable) {
		ret = regmap_update_bits(ssm2518->regmap, SSM2518_REG_POWER1,
			SSM2518_POWER1_SPWDN | SSM2518_POWER1_RESET, 0x00);
		regcache_sync(ssm2518->regmap);
	}

	return ret;
}

static int ssm2518_set_bias_level(struct snd_soc_codec *codec,
	enum snd_soc_bias_level level)
{
	struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(codec);
	int ret = 0;

	switch (level) {
	case SND_SOC_BIAS_ON:
		break;
	case SND_SOC_BIAS_PREPARE:
		break;
	case SND_SOC_BIAS_STANDBY:
		if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
			ret = ssm2518_set_power(ssm2518, true);
		break;
	case SND_SOC_BIAS_OFF:
		ret = ssm2518_set_power(ssm2518, false);
		break;
	}

	if (ret)
		return ret;

	codec->dapm.bias_level = level;

	return 0;
}

static int ssm2518_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
	unsigned int rx_mask, int slots, int width)
{
	struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(dai->codec);
	unsigned int ctrl1, ctrl2;
	int left_slot, right_slot;
	int ret;

	if (slots == 0)
		return regmap_update_bits(ssm2518->regmap,
			SSM2518_REG_SAI_CTRL1, SSM2518_SAI_CTRL1_SAI_MASK,
			SSM2518_SAI_CTRL1_SAI_I2S);

	if (tx_mask == 0 || rx_mask != 0)
		return -EINVAL;

	if (slots == 1) {
		if (tx_mask != 1)
			return -EINVAL;
		left_slot = 0;
		right_slot = 0;
	} else {
		/* We assume the left channel < right channel */
		left_slot = __ffs(tx_mask);
		tx_mask &= ~(1 << left_slot);
		if (tx_mask == 0) {
			right_slot = left_slot;
		} else {
			right_slot = __ffs(tx_mask);
			tx_mask &= ~(1 << right_slot);
		}
	}

	if (tx_mask != 0 || left_slot >= slots || right_slot >= slots)
		return -EINVAL;

	switch (width) {
	case 16:
		ctrl2 = SSM2518_SAI_CTRL2_SLOT_WIDTH_16;
		break;
	case 24:
		ctrl2 = SSM2518_SAI_CTRL2_SLOT_WIDTH_24;
		break;
	case 32:
		ctrl2 = SSM2518_SAI_CTRL2_SLOT_WIDTH_32;
		break;
	default:
		return -EINVAL;
	}

	switch (slots) {
	case 1:
		ctrl1 = SSM2518_SAI_CTRL1_SAI_MONO;
		break;
	case 2:
		ctrl1 = SSM2518_SAI_CTRL1_SAI_TDM_2;
		break;
	case 4:
		ctrl1 = SSM2518_SAI_CTRL1_SAI_TDM_4;
		break;
	case 8:
		ctrl1 = SSM2518_SAI_CTRL1_SAI_TDM_8;
		break;
	case 16:
		ctrl1 = SSM2518_SAI_CTRL1_SAI_TDM_16;
		break;
	default:
		return -EINVAL;
	}

	ret = regmap_write(ssm2518->regmap, SSM2518_REG_CHAN_MAP,
		(left_slot << SSM2518_CHAN_MAP_LEFT_SLOT_OFFSET) |
		(right_slot << SSM2518_CHAN_MAP_RIGHT_SLOT_OFFSET));
	if (ret)
		return ret;

	ret = regmap_update_bits(ssm2518->regmap, SSM2518_REG_SAI_CTRL1,
		SSM2518_SAI_CTRL1_SAI_MASK, ctrl1);
	if (ret)
		return ret;

	return regmap_update_bits(ssm2518->regmap, SSM2518_REG_SAI_CTRL2,
		SSM2518_SAI_CTRL2_SLOT_WIDTH_MASK, ctrl2);
}

static int ssm2518_startup(struct snd_pcm_substream *substream,
	struct snd_soc_dai *dai)
{
	struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(dai->codec);

	if (ssm2518->constraints)
		snd_pcm_hw_constraint_list(substream->runtime, 0,
				SNDRV_PCM_HW_PARAM_RATE, ssm2518->constraints);

	return 0;
}

#define SSM2518_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
			SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32)

static const struct snd_soc_dai_ops ssm2518_dai_ops = {
	.startup = ssm2518_startup,
	.hw_params	= ssm2518_hw_params,
	.digital_mute	= ssm2518_mute,
	.set_fmt	= ssm2518_set_dai_fmt,
	.set_tdm_slot	= ssm2518_set_tdm_slot,
};

static struct snd_soc_dai_driver ssm2518_dai = {
	.name = "ssm2518-hifi",
	.playback = {
		.stream_name = "Playback",
		.channels_min = 2,
		.channels_max = 2,
		.rates = SNDRV_PCM_RATE_8000_96000,
		.formats = SSM2518_FORMATS,
	},
	.ops = &ssm2518_dai_ops,
};

static int ssm2518_set_sysclk(struct snd_soc_codec *codec, int clk_id,
	int source, unsigned int freq, int dir)
{
	struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(codec);
	unsigned int val;

	if (clk_id != SSM2518_SYSCLK)
		return -EINVAL;

	switch (source) {
	case SSM2518_SYSCLK_SRC_MCLK:
		val = 0;
		break;
	case SSM2518_SYSCLK_SRC_BCLK:
		/* In this case the bitclock is used as the system clock, and
		 * the bitclock signal needs to be connected to the MCLK pin and
		 * the BCLK pin is left unconnected */
		val = SSM2518_POWER1_NO_BCLK;
		break;
	default:
		return -EINVAL;
	}

	switch (freq) {
	case 0:
		ssm2518->constraints = NULL;
		break;
	case 2048000:
	case 4096000:
	case 8192000:
	case 3200000:
	case 6400000:
	case 12800000:
		ssm2518->constraints = &ssm2518_constraints_2048000;
		break;
	case 2822000:
	case 5644800:
	case 11289600:
	case 16934400:
	case 22579200:
	case 33868800:
	case 4410000:
	case 8820000:
	case 17640000:
		ssm2518->constraints = &ssm2518_constraints_2822000;
		break;
	case 3072000:
	case 6144000:
	case 38864000:
	case 4800000:
	case 9600000:
	case 19200000:
		ssm2518->constraints = &ssm2518_constraints_3072000;
		break;
	case 12288000:
	case 16384000:
	case 24576000:
		ssm2518->constraints = &ssm2518_constraints_12288000;
		break;
	default:
		return -EINVAL;
	}

	ssm2518->sysclk = freq;

	return regmap_update_bits(ssm2518->regmap, SSM2518_REG_POWER1,
			SSM2518_POWER1_NO_BCLK, val);
}

static struct snd_soc_codec_driver ssm2518_codec_driver = {
	.set_bias_level = ssm2518_set_bias_level,
	.set_sysclk = ssm2518_set_sysclk,
	.idle_bias_off = true,

	.controls = ssm2518_snd_controls,
	.num_controls = ARRAY_SIZE(ssm2518_snd_controls),
	.dapm_widgets = ssm2518_dapm_widgets,
	.num_dapm_widgets = ARRAY_SIZE(ssm2518_dapm_widgets),
	.dapm_routes = ssm2518_routes,
	.num_dapm_routes = ARRAY_SIZE(ssm2518_routes),
};

static bool ssm2518_register_volatile(struct device *dev, unsigned int reg)
{
	return false;
}

static const struct regmap_config ssm2518_regmap_config = {
	.val_bits = 8,
	.reg_bits = 8,

	.max_register = SSM2518_REG_DRC_9,
	.volatile_reg = ssm2518_register_volatile,

	.cache_type = REGCACHE_RBTREE,
	.reg_defaults = ssm2518_reg_defaults,
	.num_reg_defaults = ARRAY_SIZE(ssm2518_reg_defaults),
};

static int ssm2518_i2c_probe(struct i2c_client *i2c,
	const struct i2c_device_id *id)
{
	struct ssm2518_platform_data *pdata = i2c->dev.platform_data;
	struct ssm2518 *ssm2518;
	int ret;

	ssm2518 = devm_kzalloc(&i2c->dev, sizeof(*ssm2518), GFP_KERNEL);
	if (ssm2518 == NULL)
		return -ENOMEM;

	if (pdata) {
		ssm2518->enable_gpio = pdata->enable_gpio;
	} else if (i2c->dev.of_node) {
		ssm2518->enable_gpio = of_get_gpio(i2c->dev.of_node, 0);
		if (ssm2518->enable_gpio < 0 && ssm2518->enable_gpio != -ENOENT)
			return ssm2518->enable_gpio;
	} else {
		ssm2518->enable_gpio = -1;
	}

	if (gpio_is_valid(ssm2518->enable_gpio)) {
		ret = devm_gpio_request_one(&i2c->dev, ssm2518->enable_gpio,
				GPIOF_OUT_INIT_HIGH, "SSM2518 nSD");
		if (ret)
			return ret;
	}

	i2c_set_clientdata(i2c, ssm2518);

	ssm2518->regmap = devm_regmap_init_i2c(i2c, &ssm2518_regmap_config);
	if (IS_ERR(ssm2518->regmap))
		return PTR_ERR(ssm2518->regmap);

	/*
	 * The reset bit is obviously volatile, but we need to be able to cache
	 * the other bits in the register, so we can't just mark the whole
	 * register as volatile. Since this is the only place where we'll ever
	 * touch the reset bit just bypass the cache for this operation.
	 */
	regcache_cache_bypass(ssm2518->regmap, true);
	ret = regmap_write(ssm2518->regmap, SSM2518_REG_POWER1,
			SSM2518_POWER1_RESET);
	regcache_cache_bypass(ssm2518->regmap, false);
	if (ret)
		return ret;

	ret = regmap_update_bits(ssm2518->regmap, SSM2518_REG_POWER2,
				SSM2518_POWER2_APWDN, 0x00);
	if (ret)
		return ret;

	ret = ssm2518_set_power(ssm2518, false);
	if (ret)
		return ret;

	return snd_soc_register_codec(&i2c->dev, &ssm2518_codec_driver,
			&ssm2518_dai, 1);
}

static int ssm2518_i2c_remove(struct i2c_client *client)
{
	snd_soc_unregister_codec(&client->dev);
	return 0;
}

static const struct i2c_device_id ssm2518_i2c_ids[] = {
	{ "ssm2518", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, ssm2518_i2c_ids);

static struct i2c_driver ssm2518_driver = {
	.driver = {
		.name = "ssm2518",
		.owner = THIS_MODULE,
	},
	.probe = ssm2518_i2c_probe,
	.remove = ssm2518_i2c_remove,
	.id_table = ssm2518_i2c_ids,
};
module_i2c_driver(ssm2518_driver);

MODULE_DESCRIPTION("ASoC SSM2518 driver");
MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
MODULE_LICENSE("GPL");
n> static const struct snd_kcontrol_new wm8753_mono2_controls = SOC_DAPM_ENUM("Route", wm8753_enum[17]); /* Out 3 Mux */ static const struct snd_kcontrol_new wm8753_out3_controls = SOC_DAPM_ENUM("Route", wm8753_enum[18]); /* Out 4 Mux */ static const struct snd_kcontrol_new wm8753_out4_controls = SOC_DAPM_ENUM("Route", wm8753_enum[19]); /* ADC Mono Mix */ static const struct snd_kcontrol_new wm8753_adc_mono_controls = SOC_DAPM_ENUM("Route", wm8753_enum[22]); /* Record mixer */ static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = { SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0), SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0), SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0), }; /* Left ADC mux */ static const struct snd_kcontrol_new wm8753_adc_left_controls = SOC_DAPM_ENUM("Route", wm8753_enum[21]); /* Right ADC mux */ static const struct snd_kcontrol_new wm8753_adc_right_controls = SOC_DAPM_ENUM("Route", wm8753_enum[20]); /* MIC mux */ static const struct snd_kcontrol_new wm8753_mic_mux_controls = SOC_DAPM_ENUM("Route", wm8753_enum[16]); /* ALC mixer */ static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = { SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0), SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0), SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0), SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0), }; /* Left Line mux */ static const struct snd_kcontrol_new wm8753_line_left_controls = SOC_DAPM_ENUM("Route", wm8753_enum[14]); /* Right Line mux */ static const struct snd_kcontrol_new wm8753_line_right_controls = SOC_DAPM_ENUM("Route", wm8753_enum[13]); /* Mono Line mux */ static const struct snd_kcontrol_new wm8753_line_mono_controls = SOC_DAPM_ENUM("Route", wm8753_enum[12]); /* Line mux and mixer */ static const struct snd_kcontrol_new wm8753_line_mux_mix_controls = SOC_DAPM_ENUM("Route", wm8753_enum[11]); /* Rx mux and mixer */ static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls = SOC_DAPM_ENUM("Route", wm8753_enum[15]); /* Mic Selector Mux */ static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls = SOC_DAPM_ENUM("Route", wm8753_enum[25]); static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = { SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0), SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0, &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)), SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0), SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0), SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0), SND_SOC_DAPM_OUTPUT("LOUT1"), SND_SOC_DAPM_OUTPUT("LOUT2"), SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0, &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)), SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0), SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0), SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0), SND_SOC_DAPM_OUTPUT("ROUT1"), SND_SOC_DAPM_OUTPUT("ROUT2"), SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0, &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)), SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0), SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0), SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0), SND_SOC_DAPM_OUTPUT("MONO1"), SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls), SND_SOC_DAPM_OUTPUT("MONO2"), SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0), SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls), SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0), SND_SOC_DAPM_OUTPUT("OUT3"), SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls), SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0), SND_SOC_DAPM_OUTPUT("OUT4"), SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0, &wm8753_record_mixer_controls[0], ARRAY_SIZE(wm8753_record_mixer_controls)), SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0), SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0), SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0, &wm8753_adc_mono_controls), SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0, &wm8753_adc_mono_controls), SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0, &wm8753_adc_left_controls), SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0, &wm8753_adc_right_controls), SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0, &wm8753_mic_mux_controls), SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0), SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0), SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0, &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)), SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0, &wm8753_line_left_controls), SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0, &wm8753_line_right_controls), SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0, &wm8753_line_mono_controls), SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0, &wm8753_line_mux_mix_controls), SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0, &wm8753_rx_mux_mix_controls), SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0), SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0), SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0, &wm8753_mic_sel_mux_controls), SND_SOC_DAPM_INPUT("LINE1"), SND_SOC_DAPM_INPUT("LINE2"), SND_SOC_DAPM_INPUT("RXP"), SND_SOC_DAPM_INPUT("RXN"), SND_SOC_DAPM_INPUT("ACIN"), SND_SOC_DAPM_OUTPUT("ACOP"), SND_SOC_DAPM_INPUT("MIC1N"), SND_SOC_DAPM_INPUT("MIC1"), SND_SOC_DAPM_INPUT("MIC2N"), SND_SOC_DAPM_INPUT("MIC2"), SND_SOC_DAPM_VMID("VREF"), }; static const struct snd_soc_dapm_route wm8753_dapm_routes[] = { /* left mixer */ {"Left Mixer", "Left Playback Switch", "Left DAC"}, {"Left Mixer", "Voice Playback Switch", "Voice DAC"}, {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"}, {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"}, /* right mixer */ {"Right Mixer", "Right Playback Switch", "Right DAC"}, {"Right Mixer", "Voice Playback Switch", "Voice DAC"}, {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"}, {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"}, /* mono mixer */ {"Mono Mixer", "Voice Playback Switch", "Voice DAC"}, {"Mono Mixer", "Left Playback Switch", "Left DAC"}, {"Mono Mixer", "Right Playback Switch", "Right DAC"}, {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"}, {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"}, /* left out */ {"Left Out 1", NULL, "Left Mixer"}, {"Left Out 2", NULL, "Left Mixer"}, {"LOUT1", NULL, "Left Out 1"}, {"LOUT2", NULL, "Left Out 2"}, /* right out */ {"Right Out 1", NULL, "Right Mixer"}, {"Right Out 2", NULL, "Right Mixer"}, {"ROUT1", NULL, "Right Out 1"}, {"ROUT2", NULL, "Right Out 2"}, /* mono 1 out */ {"Mono Out 1", NULL, "Mono Mixer"}, {"MONO1", NULL, "Mono Out 1"}, /* mono 2 out */ {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"}, {"Mono 2 Mux", "Inverted Mono 1", "MONO1"}, {"Mono 2 Mux", "Left", "Left Mixer"}, {"Mono 2 Mux", "Right", "Right Mixer"}, {"Mono Out 2", NULL, "Mono 2 Mux"}, {"MONO2", NULL, "Mono Out 2"}, /* out 3 */ {"Out3 Left + Right", NULL, "Left Mixer"}, {"Out3 Left + Right", NULL, "Right Mixer"}, {"Out3 Mux", "VREF", "VREF"}, {"Out3 Mux", "Left + Right", "Out3 Left + Right"}, {"Out3 Mux", "ROUT2", "ROUT2"}, {"Out 3", NULL, "Out3 Mux"}, {"OUT3", NULL, "Out 3"}, /* out 4 */ {"Out4 Mux", "VREF", "VREF"}, {"Out4 Mux", "Capture ST", "Playback Mixer"}, {"Out4 Mux", "LOUT2", "LOUT2"}, {"Out 4", NULL, "Out4 Mux"}, {"OUT4", NULL, "Out 4"}, /* record mixer */ {"Playback Mixer", "Left Capture Switch", "Left Mixer"}, {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"}, {"Playback Mixer", "Right Capture Switch", "Right Mixer"}, /* Mic/SideTone Mux */ {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"}, {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"}, {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"}, {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"}, /* Capture Left Mux */ {"Capture Left Mux", "PGA", "Left Capture Volume"}, {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"}, {"Capture Left Mux", "Line", "LINE1"}, /* Capture Right Mux */ {"Capture Right Mux", "PGA", "Right Capture Volume"}, {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"}, {"Capture Right Mux", "Sidetone", "Playback Mixer"}, /* Mono Capture mixer-mux */ {"Capture Right Mixer", "Stereo", "Capture Right Mux"}, {"Capture Left Mixer", "Stereo", "Capture Left Mux"}, {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"}, {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"}, {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"}, {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"}, {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"}, {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"}, {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"}, {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"}, /* ADC */ {"Left ADC", NULL, "Capture Left Mixer"}, {"Right ADC", NULL, "Capture Right Mixer"}, /* Left Capture Volume */ {"Left Capture Volume", NULL, "ACIN"}, /* Right Capture Volume */ {"Right Capture Volume", NULL, "Mic 2 Volume"}, /* ALC Mixer */ {"ALC Mixer", "Line Capture Switch", "Line Mixer"}, {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"}, {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"}, {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"}, /* Line Left Mux */ {"Line Left Mux", "Line 1", "LINE1"}, {"Line Left Mux", "Rx Mix", "Rx Mixer"}, /* Line Right Mux */ {"Line Right Mux", "Line 2", "LINE2"}, {"Line Right Mux", "Rx Mix", "Rx Mixer"}, /* Line Mono Mux */ {"Line Mono Mux", "Line Mix", "Line Mixer"}, {"Line Mono Mux", "Rx Mix", "Rx Mixer"}, /* Line Mixer/Mux */ {"Line Mixer", "Line 1 + 2", "LINE1"}, {"Line Mixer", "Line 1 - 2", "LINE1"}, {"Line Mixer", "Line 1 + 2", "LINE2"}, {"Line Mixer", "Line 1 - 2", "LINE2"}, {"Line Mixer", "Line 1", "LINE1"}, {"Line Mixer", "Line 2", "LINE2"}, /* Rx Mixer/Mux */ {"Rx Mixer", "RXP - RXN", "RXP"}, {"Rx Mixer", "RXP + RXN", "RXP"}, {"Rx Mixer", "RXP - RXN", "RXN"}, {"Rx Mixer", "RXP + RXN", "RXN"}, {"Rx Mixer", "RXP", "RXP"}, {"Rx Mixer", "RXN", "RXN"}, /* Mic 1 Volume */ {"Mic 1 Volume", NULL, "MIC1N"}, {"Mic 1 Volume", NULL, "Mic Selection Mux"}, /* Mic 2 Volume */ {"Mic 2 Volume", NULL, "MIC2N"}, {"Mic 2 Volume", NULL, "MIC2"}, /* Mic Selector Mux */ {"Mic Selection Mux", "Mic 1", "MIC1"}, {"Mic Selection Mux", "Mic 2", "MIC2N"}, {"Mic Selection Mux", "Mic 3", "MIC2"}, /* ACOP */ {"ACOP", NULL, "ALC Mixer"}, }; /* PLL divisors */ struct _pll_div { u32 div2:1; u32 n:4; u32 k:24; }; /* The size in bits of the pll divide multiplied by 10 * to allow rounding later */ #define FIXED_PLL_SIZE ((1 << 22) * 10) static void pll_factors(struct _pll_div *pll_div, unsigned int target, unsigned int source) { u64 Kpart; unsigned int K, Ndiv, Nmod; Ndiv = target / source; if (Ndiv < 6) { source >>= 1; pll_div->div2 = 1; Ndiv = target / source; } else pll_div->div2 = 0; if ((Ndiv < 6) || (Ndiv > 12)) printk(KERN_WARNING "wm8753: unsupported N = %u\n", Ndiv); pll_div->n = Ndiv; Nmod = target % source; Kpart = FIXED_PLL_SIZE * (long long)Nmod; do_div(Kpart, source); K = Kpart & 0xFFFFFFFF; /* Check if we need to round */ if ((K % 10) >= 5) K += 5; /* Move down to proper range now rounding is done */ K /= 10; pll_div->k = K; } static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, int source, unsigned int freq_in, unsigned int freq_out) { u16 reg, enable; int offset; struct snd_soc_codec *codec = codec_dai->codec; if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2) return -ENODEV; if (pll_id == WM8753_PLL1) { offset = 0; enable = 0x10; reg = snd_soc_read(codec, WM8753_CLOCK) & 0xffef; } else { offset = 4; enable = 0x8; reg = snd_soc_read(codec, WM8753_CLOCK) & 0xfff7; } if (!freq_in || !freq_out) { /* disable PLL */ snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0026); snd_soc_write(codec, WM8753_CLOCK, reg); return 0; } else { u16 value = 0; struct _pll_div pll_div; pll_factors(&pll_div, freq_out * 8, freq_in); /* set up N and K PLL divisor ratios */ /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */ value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18); snd_soc_write(codec, WM8753_PLL1CTL2 + offset, value); /* bits 8:0 = PLL_K[17:9] */ value = (pll_div.k & 0x03fe00) >> 9; snd_soc_write(codec, WM8753_PLL1CTL3 + offset, value); /* bits 8:0 = PLL_K[8:0] */ value = pll_div.k & 0x0001ff; snd_soc_write(codec, WM8753_PLL1CTL4 + offset, value); /* set PLL as input and enable */ snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 | (pll_div.div2 << 3)); snd_soc_write(codec, WM8753_CLOCK, reg | enable); } return 0; } struct _coeff_div { u32 mclk; u32 rate; u8 sr:5; u8 usb:1; }; /* codec hifi mclk (after PLL) clock divider coefficients */ static const struct _coeff_div coeff_div[] = { /* 8k */ {12288000, 8000, 0x6, 0x0}, {11289600, 8000, 0x16, 0x0}, {18432000, 8000, 0x7, 0x0}, {16934400, 8000, 0x17, 0x0}, {12000000, 8000, 0x6, 0x1}, /* 11.025k */ {11289600, 11025, 0x18, 0x0}, {16934400, 11025, 0x19, 0x0}, {12000000, 11025, 0x19, 0x1}, /* 16k */ {12288000, 16000, 0xa, 0x0}, {18432000, 16000, 0xb, 0x0}, {12000000, 16000, 0xa, 0x1}, /* 22.05k */ {11289600, 22050, 0x1a, 0x0}, {16934400, 22050, 0x1b, 0x0}, {12000000, 22050, 0x1b, 0x1}, /* 32k */ {12288000, 32000, 0xc, 0x0}, {18432000, 32000, 0xd, 0x0}, {12000000, 32000, 0xa, 0x1}, /* 44.1k */ {11289600, 44100, 0x10, 0x0}, {16934400, 44100, 0x11, 0x0}, {12000000, 44100, 0x11, 0x1}, /* 48k */ {12288000, 48000, 0x0, 0x0}, {18432000, 48000, 0x1, 0x0}, {12000000, 48000, 0x0, 0x1}, /* 88.2k */ {11289600, 88200, 0x1e, 0x0}, {16934400, 88200, 0x1f, 0x0}, {12000000, 88200, 0x1f, 0x1}, /* 96k */ {12288000, 96000, 0xe, 0x0}, {18432000, 96000, 0xf, 0x0}, {12000000, 96000, 0xe, 0x1}, }; static int get_coeff(int mclk, int rate) { int i; for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) return i; } return -EINVAL; } /* * Clock after PLL and dividers */ static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id, unsigned int freq, int dir) { struct snd_soc_codec *codec = codec_dai->codec; struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); switch (freq) { case 11289600: case 12000000: case 12288000: case 16934400: case 18432000: if (clk_id == WM8753_MCLK) { wm8753->sysclk = freq; return 0; } else if (clk_id == WM8753_PCMCLK) { wm8753->pcmclk = freq; return 0; } break; } return -EINVAL; } /* * Set's ADC and Voice DAC format. */ static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_codec *codec, unsigned int fmt) { u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01ec; /* interface format */ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { case SND_SOC_DAIFMT_I2S: voice |= 0x0002; break; case SND_SOC_DAIFMT_RIGHT_J: break; case SND_SOC_DAIFMT_LEFT_J: voice |= 0x0001; break; case SND_SOC_DAIFMT_DSP_A: voice |= 0x0003; break; case SND_SOC_DAIFMT_DSP_B: voice |= 0x0013; break; default: return -EINVAL; } snd_soc_write(codec, WM8753_PCM, voice); return 0; } /* * Set PCM DAI bit size and sample rate. */ static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { struct snd_soc_codec *codec = dai->codec; struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01f3; u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x017f; /* bit size */ switch (params_width(params)) { case 16: break; case 20: voice |= 0x0004; break; case 24: voice |= 0x0008; break; case 32: voice |= 0x000c; break; } /* sample rate */ if (params_rate(params) * 384 == wm8753->pcmclk) srate |= 0x80; snd_soc_write(codec, WM8753_SRATE1, srate); snd_soc_write(codec, WM8753_PCM, voice); return 0; } /* * Set's PCM dai fmt and BCLK. */ static int wm8753_pcm_set_dai_fmt(struct snd_soc_codec *codec, unsigned int fmt) { u16 voice, ioctl; voice = snd_soc_read(codec, WM8753_PCM) & 0x011f; ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x015d; /* set master/slave audio interface */ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { case SND_SOC_DAIFMT_CBS_CFS: break; case SND_SOC_DAIFMT_CBM_CFM: ioctl |= 0x2; case SND_SOC_DAIFMT_CBM_CFS: voice |= 0x0040; break; default: return -EINVAL; } /* clock inversion */ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { case SND_SOC_DAIFMT_DSP_A: case SND_SOC_DAIFMT_DSP_B: /* frame inversion not valid for DSP modes */ switch (fmt & SND_SOC_DAIFMT_INV_MASK) { case SND_SOC_DAIFMT_NB_NF: break; case SND_SOC_DAIFMT_IB_NF: voice |= 0x0080; break; default: return -EINVAL; } break; case SND_SOC_DAIFMT_I2S: case SND_SOC_DAIFMT_RIGHT_J: case SND_SOC_DAIFMT_LEFT_J: voice &= ~0x0010; switch (fmt & SND_SOC_DAIFMT_INV_MASK) { case SND_SOC_DAIFMT_NB_NF: break; case SND_SOC_DAIFMT_IB_IF: voice |= 0x0090; break; case SND_SOC_DAIFMT_IB_NF: voice |= 0x0080; break; case SND_SOC_DAIFMT_NB_IF: voice |= 0x0010; break; default: return -EINVAL; } break; default: return -EINVAL; } snd_soc_write(codec, WM8753_PCM, voice); snd_soc_write(codec, WM8753_IOCTL, ioctl); return 0; } static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai, int div_id, int div) { struct snd_soc_codec *codec = codec_dai->codec; u16 reg; switch (div_id) { case WM8753_PCMDIV: reg = snd_soc_read(codec, WM8753_CLOCK) & 0x003f; snd_soc_write(codec, WM8753_CLOCK, reg | div); break; case WM8753_BCLKDIV: reg = snd_soc_read(codec, WM8753_SRATE2) & 0x01c7; snd_soc_write(codec, WM8753_SRATE2, reg | div); break; case WM8753_VXCLKDIV: reg = snd_soc_read(codec, WM8753_SRATE2) & 0x003f; snd_soc_write(codec, WM8753_SRATE2, reg | div); break; default: return -EINVAL; } return 0; } /* * Set's HiFi DAC format. */ static int wm8753_hdac_set_dai_fmt(struct snd_soc_codec *codec, unsigned int fmt) { u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01e0; /* interface format */ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { case SND_SOC_DAIFMT_I2S: hifi |= 0x0002; break; case SND_SOC_DAIFMT_RIGHT_J: break; case SND_SOC_DAIFMT_LEFT_J: hifi |= 0x0001; break; case SND_SOC_DAIFMT_DSP_A: hifi |= 0x0003; break; case SND_SOC_DAIFMT_DSP_B: hifi |= 0x0013; break; default: return -EINVAL; } snd_soc_write(codec, WM8753_HIFI, hifi); return 0; } /* * Set's I2S DAI format. */ static int wm8753_i2s_set_dai_fmt(struct snd_soc_codec *codec, unsigned int fmt) { u16 ioctl, hifi; hifi = snd_soc_read(codec, WM8753_HIFI) & 0x011f; ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x00ae; /* set master/slave audio interface */ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { case SND_SOC_DAIFMT_CBS_CFS: break; case SND_SOC_DAIFMT_CBM_CFM: ioctl |= 0x1; case SND_SOC_DAIFMT_CBM_CFS: hifi |= 0x0040; break; default: return -EINVAL; } /* clock inversion */ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { case SND_SOC_DAIFMT_DSP_A: case SND_SOC_DAIFMT_DSP_B: /* frame inversion not valid for DSP modes */ switch (fmt & SND_SOC_DAIFMT_INV_MASK) { case SND_SOC_DAIFMT_NB_NF: break; case SND_SOC_DAIFMT_IB_NF: hifi |= 0x0080; break; default: return -EINVAL; } break; case SND_SOC_DAIFMT_I2S: case SND_SOC_DAIFMT_RIGHT_J: case SND_SOC_DAIFMT_LEFT_J: hifi &= ~0x0010; switch (fmt & SND_SOC_DAIFMT_INV_MASK) { case SND_SOC_DAIFMT_NB_NF: break; case SND_SOC_DAIFMT_IB_IF: hifi |= 0x0090; break; case SND_SOC_DAIFMT_IB_NF: hifi |= 0x0080; break; case SND_SOC_DAIFMT_NB_IF: hifi |= 0x0010; break; default: return -EINVAL; } break; default: return -EINVAL; } snd_soc_write(codec, WM8753_HIFI, hifi); snd_soc_write(codec, WM8753_IOCTL, ioctl); return 0; } /* * Set PCM DAI bit size and sample rate. */ static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { struct snd_soc_codec *codec = dai->codec; struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x01c0; u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01f3; int coeff; /* is digital filter coefficient valid ? */ coeff = get_coeff(wm8753->sysclk, params_rate(params)); if (coeff < 0) { printk(KERN_ERR "wm8753 invalid MCLK or rate\n"); return coeff; } snd_soc_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb); /* bit size */ switch (params_width(params)) { case 16: break; case 20: hifi |= 0x0004; break; case 24: hifi |= 0x0008; break; case 32: hifi |= 0x000c; break; } snd_soc_write(codec, WM8753_HIFI, hifi); return 0; } static int wm8753_mode1v_set_dai_fmt(struct snd_soc_codec *codec, unsigned int fmt) { u16 clock; /* set clk source as pcmclk */ clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb; snd_soc_write(codec, WM8753_CLOCK, clock); return wm8753_vdac_adc_set_dai_fmt(codec, fmt); } static int wm8753_mode1h_set_dai_fmt(struct snd_soc_codec *codec, unsigned int fmt) { return wm8753_hdac_set_dai_fmt(codec, fmt); } static int wm8753_mode2_set_dai_fmt(struct snd_soc_codec *codec, unsigned int fmt) { u16 clock; /* set clk source as pcmclk */ clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb; snd_soc_write(codec, WM8753_CLOCK, clock); return wm8753_vdac_adc_set_dai_fmt(codec, fmt); } static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_codec *codec, unsigned int fmt) { u16 clock; /* set clk source as mclk */ clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb; snd_soc_write(codec, WM8753_CLOCK, clock | 0x4); if (wm8753_hdac_set_dai_fmt(codec, fmt) < 0) return -EINVAL; return wm8753_vdac_adc_set_dai_fmt(codec, fmt); } static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec, unsigned int fmt) { struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); int ret = 0; switch (wm8753->dai_func) { case 0: ret = wm8753_mode1h_set_dai_fmt(codec, fmt); break; case 1: ret = wm8753_mode2_set_dai_fmt(codec, fmt); break; case 2: case 3: ret = wm8753_mode3_4_set_dai_fmt(codec, fmt); break; default: break; } if (ret) return ret; return wm8753_i2s_set_dai_fmt(codec, fmt); } static int wm8753_hifi_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) { struct snd_soc_codec *codec = codec_dai->codec; struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); wm8753->hifi_fmt = fmt; return wm8753_hifi_write_dai_fmt(codec, fmt); }; static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec, unsigned int fmt) { struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); int ret = 0; if (wm8753->dai_func != 0) return 0; ret = wm8753_mode1v_set_dai_fmt(codec, fmt); if (ret) return ret; ret = wm8753_pcm_set_dai_fmt(codec, fmt); if (ret) return ret; return 0; }; static int wm8753_voice_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) { struct snd_soc_codec *codec = codec_dai->codec; struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); wm8753->voice_fmt = fmt; return wm8753_voice_write_dai_fmt(codec, fmt); }; static int wm8753_mute(struct snd_soc_dai *dai, int mute) { struct snd_soc_codec *codec = dai->codec; u16 mute_reg = snd_soc_read(codec, WM8753_DAC) & 0xfff7; struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); /* the digital mute covers the HiFi and Voice DAC's on the WM8753. * make sure we check if they are not both active when we mute */ if (mute && wm8753->dai_func == 1) { if (!snd_soc_codec_is_active(codec)) snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8); } else { if (mute) snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8); else snd_soc_write(codec, WM8753_DAC, mute_reg); } return 0; } static void wm8753_charge_work(struct work_struct *work) { struct wm8753_priv *wm8753 = container_of(work, struct wm8753_priv, charge_work.work); /* Set to 500k */ regmap_update_bits(wm8753->regmap, WM8753_PWR1, 0x0180, 0x0100); } static int wm8753_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); u16 pwr_reg = snd_soc_read(codec, WM8753_PWR1) & 0xfe3e; switch (level) { case SND_SOC_BIAS_ON: /* set vmid to 50k and unmute dac */ snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x00c0); break; case SND_SOC_BIAS_PREPARE: /* Wait until fully charged */ flush_delayed_work(&wm8753->charge_work); break; case SND_SOC_BIAS_STANDBY: if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { /* set vmid to 5k for quick power up */ snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x01c1); schedule_delayed_work(&wm8753->charge_work, msecs_to_jiffies(caps_charge)); } else { /* mute dac and set vmid to 500k, enable VREF */ snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x0141); } break; case SND_SOC_BIAS_OFF: cancel_delayed_work_sync(&wm8753->charge_work); snd_soc_write(codec, WM8753_PWR1, 0x0001); break; } codec->dapm.bias_level = level; return 0; } #define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\ SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\ SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) #define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE) /* * The WM8753 supports up to 4 different and mutually exclusive DAI * configurations. This gives 2 PCM's available for use, hifi and voice. * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI * is connected between the wm8753 and a BT codec or GSM modem. * * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI * 2. Voice over HIFI DAI - HIFI disabled * 3. Voice disabled - HIFI over HIFI * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture */ static const struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode = { .hw_params = wm8753_i2s_hw_params, .digital_mute = wm8753_mute, .set_fmt = wm8753_hifi_set_dai_fmt, .set_clkdiv = wm8753_set_dai_clkdiv, .set_pll = wm8753_set_dai_pll, .set_sysclk = wm8753_set_dai_sysclk, }; static const struct snd_soc_dai_ops wm8753_dai_ops_voice_mode = { .hw_params = wm8753_pcm_hw_params, .digital_mute = wm8753_mute, .set_fmt = wm8753_voice_set_dai_fmt, .set_clkdiv = wm8753_set_dai_clkdiv, .set_pll = wm8753_set_dai_pll, .set_sysclk = wm8753_set_dai_sysclk, }; static struct snd_soc_dai_driver wm8753_dai[] = { /* DAI HiFi mode 1 */ { .name = "wm8753-hifi", .playback = { .stream_name = "HiFi Playback", .channels_min = 1, .channels_max = 2, .rates = WM8753_RATES, .formats = WM8753_FORMATS }, .capture = { /* dummy for fast DAI switching */ .stream_name = "Capture", .channels_min = 1, .channels_max = 2, .rates = WM8753_RATES, .formats = WM8753_FORMATS }, .ops = &wm8753_dai_ops_hifi_mode, }, /* DAI Voice mode 1 */ { .name = "wm8753-voice", .playback = { .stream_name = "Voice Playback", .channels_min = 1, .channels_max = 1, .rates = WM8753_RATES, .formats = WM8753_FORMATS, }, .capture = { .stream_name = "Capture", .channels_min = 1, .channels_max = 2, .rates = WM8753_RATES, .formats = WM8753_FORMATS, }, .ops = &wm8753_dai_ops_voice_mode, }, }; static int wm8753_resume(struct snd_soc_codec *codec) { struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); regcache_sync(wm8753->regmap); return 0; } static int wm8753_probe(struct snd_soc_codec *codec) { struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); int ret; INIT_DELAYED_WORK(&wm8753->charge_work, wm8753_charge_work); ret = wm8753_reset(codec); if (ret < 0) { dev_err(codec->dev, "Failed to issue reset: %d\n", ret); return ret; } wm8753->dai_func = 0; /* set the update bits */ snd_soc_update_bits(codec, WM8753_LDAC, 0x0100, 0x0100); snd_soc_update_bits(codec, WM8753_RDAC, 0x0100, 0x0100); snd_soc_update_bits(codec, WM8753_LADC, 0x0100, 0x0100); snd_soc_update_bits(codec, WM8753_RADC, 0x0100, 0x0100); snd_soc_update_bits(codec, WM8753_LOUT1V, 0x0100, 0x0100); snd_soc_update_bits(codec, WM8753_ROUT1V, 0x0100, 0x0100); snd_soc_update_bits(codec, WM8753_LOUT2V, 0x0100, 0x0100); snd_soc_update_bits(codec, WM8753_ROUT2V, 0x0100, 0x0100); snd_soc_update_bits(codec, WM8753_LINVOL, 0x0100, 0x0100); snd_soc_update_bits(codec, WM8753_RINVOL, 0x0100, 0x0100); return 0; } static struct snd_soc_codec_driver soc_codec_dev_wm8753 = { .probe = wm8753_probe, .resume = wm8753_resume, .set_bias_level = wm8753_set_bias_level, .suspend_bias_off = true, .controls = wm8753_snd_controls, .num_controls = ARRAY_SIZE(wm8753_snd_controls), .dapm_widgets = wm8753_dapm_widgets, .num_dapm_widgets = ARRAY_SIZE(wm8753_dapm_widgets), .dapm_routes = wm8753_dapm_routes, .num_dapm_routes = ARRAY_SIZE(wm8753_dapm_routes), }; static const struct of_device_id wm8753_of_match[] = { { .compatible = "wlf,wm8753", }, { } }; MODULE_DEVICE_TABLE(of, wm8753_of_match); static const struct regmap_config wm8753_regmap = { .reg_bits = 7, .val_bits = 9, .max_register = WM8753_ADCTL2, .writeable_reg = wm8753_writeable, .volatile_reg = wm8753_volatile, .cache_type = REGCACHE_RBTREE, .reg_defaults = wm8753_reg_defaults, .num_reg_defaults = ARRAY_SIZE(wm8753_reg_defaults), }; #if defined(CONFIG_SPI_MASTER) static int wm8753_spi_probe(struct spi_device *spi) { struct wm8753_priv *wm8753; int ret; wm8753 = devm_kzalloc(&spi->dev, sizeof(struct wm8753_priv), GFP_KERNEL); if (wm8753 == NULL) return -ENOMEM; spi_set_drvdata(spi, wm8753); wm8753->regmap = devm_regmap_init_spi(spi, &wm8753_regmap); if (IS_ERR(wm8753->regmap)) { ret = PTR_ERR(wm8753->regmap); dev_err(&spi->dev, "Failed to allocate register map: %d\n", ret); return ret; } ret = snd_soc_register_codec(&spi->dev, &soc_codec_dev_wm8753, wm8753_dai, ARRAY_SIZE(wm8753_dai)); if (ret != 0) dev_err(&spi->dev, "Failed to register CODEC: %d\n", ret); return ret; } static int wm8753_spi_remove(struct spi_device *spi) { snd_soc_unregister_codec(&spi->dev); return 0; } static struct spi_driver wm8753_spi_driver = { .driver = { .name = "wm8753", .owner = THIS_MODULE, .of_match_table = wm8753_of_match, }, .probe = wm8753_spi_probe, .remove = wm8753_spi_remove, }; #endif /* CONFIG_SPI_MASTER */ #if IS_ENABLED(CONFIG_I2C) static int wm8753_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { struct wm8753_priv *wm8753; int ret; wm8753 = devm_kzalloc(&i2c->dev, sizeof(struct wm8753_priv), GFP_KERNEL); if (wm8753 == NULL) return -ENOMEM; i2c_set_clientdata(i2c, wm8753); wm8753->regmap = devm_regmap_init_i2c(i2c, &wm8753_regmap); if (IS_ERR(wm8753->regmap)) { ret = PTR_ERR(wm8753->regmap); dev_err(&i2c->dev, "Failed to allocate register map: %d\n", ret); return ret; } ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_wm8753, wm8753_dai, ARRAY_SIZE(wm8753_dai)); if (ret != 0) dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret); return ret; } static int wm8753_i2c_remove(struct i2c_client *client) { snd_soc_unregister_codec(&client->dev); return 0; } static const struct i2c_device_id wm8753_i2c_id[] = { { "wm8753", 0 }, { } }; MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id); static struct i2c_driver wm8753_i2c_driver = { .driver = { .name = "wm8753", .owner = THIS_MODULE, .of_match_table = wm8753_of_match, }, .probe = wm8753_i2c_probe, .remove = wm8753_i2c_remove, .id_table = wm8753_i2c_id, }; #endif static int __init wm8753_modinit(void) { int ret = 0; #if IS_ENABLED(CONFIG_I2C) ret = i2c_add_driver(&wm8753_i2c_driver); if (ret != 0) { printk(KERN_ERR "Failed to register wm8753 I2C driver: %d\n", ret); } #endif #if defined(CONFIG_SPI_MASTER) ret = spi_register_driver(&wm8753_spi_driver); if (ret != 0) { printk(KERN_ERR "Failed to register wm8753 SPI driver: %d\n", ret); } #endif return ret; } module_init(wm8753_modinit); static void __exit wm8753_exit(void) { #if IS_ENABLED(CONFIG_I2C) i2c_del_driver(&wm8753_i2c_driver); #endif #if defined(CONFIG_SPI_MASTER) spi_unregister_driver(&wm8753_spi_driver); #endif } module_exit(wm8753_exit); MODULE_DESCRIPTION("ASoC WM8753 driver"); MODULE_AUTHOR("Liam Girdwood"); MODULE_LICENSE("GPL");