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/*
 * stv0900_init.h
 *
 * Driver for ST STV0900 satellite demodulator IC.
 *
 * Copyright (C) ST Microelectronics.
 * Copyright (C) 2009 NetUP Inc.
 * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#ifndef STV0900_INIT_H
#define STV0900_INIT_H

#include "stv0900_priv.h"

/* DVBS2 C/N Look-Up table */
static const struct stv0900_table stv0900_s2_cn = {
	55,
	{
		{ -30,	13348 }, /*C/N=-3dB*/
		{ -20,	12640 }, /*C/N=-2dB*/
		{ -10,	11883 }, /*C/N=-1dB*/
		{ 0,	11101 }, /*C/N=-0dB*/
		{ 5,	10718 }, /*C/N=0.5dB*/
		{ 10,	10339 }, /*C/N=1.0dB*/
		{ 15,	9947 }, /*C/N=1.5dB*/
		{ 20,	9552 }, /*C/N=2.0dB*/
		{ 25,	9183 }, /*C/N=2.5dB*/
		{ 30,	8799 }, /*C/N=3.0dB*/
		{ 35,	8422 }, /*C/N=3.5dB*/
		{ 40,	8062 }, /*C/N=4.0dB*/
		{ 45,	7707 }, /*C/N=4.5dB*/
		{ 50,	7353 }, /*C/N=5.0dB*/
		{ 55,	7025 }, /*C/N=5.5dB*/
		{ 60,	6684 }, /*C/N=6.0dB*/
		{ 65,	6331 }, /*C/N=6.5dB*/
		{ 70,	6036 }, /*C/N=7.0dB*/
		{ 75,	5727 }, /*C/N=7.5dB*/
		{ 80,	5437 }, /*C/N=8.0dB*/
		{ 85,	5164 }, /*C/N=8.5dB*/
		{ 90,	4902 }, /*C/N=9.0dB*/
		{ 95,	4653 }, /*C/N=9.5dB*/
		{ 100,	4408 }, /*C/N=10.0dB*/
		{ 105,	4187 }, /*C/N=10.5dB*/
		{ 110,	3961 }, /*C/N=11.0dB*/
		{ 115,	3751 }, /*C/N=11.5dB*/
		{ 120,	3558 }, /*C/N=12.0dB*/
		{ 125,	3368 }, /*C/N=12.5dB*/
		{ 130,	3191 }, /*C/N=13.0dB*/
		{ 135,	3017 }, /*C/N=13.5dB*/
		{ 140,	2862 }, /*C/N=14.0dB*/
		{ 145,	2710 }, /*C/N=14.5dB*/
		{ 150,	2565 }, /*C/N=15.0dB*/
		{ 160,	2300 }, /*C/N=16.0dB*/
		{ 170,	2058 }, /*C/N=17.0dB*/
		{ 180,	1849 }, /*C/N=18.0dB*/
		{ 190,	1663 }, /*C/N=19.0dB*/
		{ 200,	1495 }, /*C/N=20.0dB*/
		{ 210,	1349 }, /*C/N=21.0dB*/
		{ 220,	1222 }, /*C/N=22.0dB*/
		{ 230,	1110 }, /*C/N=23.0dB*/
		{ 240,	1011 }, /*C/N=24.0dB*/
		{ 250,	925 }, /*C/N=25.0dB*/
		{ 260,	853 }, /*C/N=26.0dB*/
		{ 270,	789 }, /*C/N=27.0dB*/
		{ 280,	734 }, /*C/N=28.0dB*/
		{ 290,	690 }, /*C/N=29.0dB*/
		{ 300,	650 }, /*C/N=30.0dB*/
		{ 310,	619 }, /*C/N=31.0dB*/
		{ 320,	593 }, /*C/N=32.0dB*/
		{ 330,	571 }, /*C/N=33.0dB*/
		{ 400,	498 }, /*C/N=40.0dB*/
		{ 450,	484 }, /*C/N=45.0dB*/
		{ 500,	481 }  /*C/N=50.0dB*/
	}
};

/* RF level C/N Look-Up table */
static const struct stv0900_table stv0900_rf = {
	14,
	{
		{ -5, 0xCAA1 }, /*-5dBm*/
		{ -10, 0xC229 }, /*-10dBm*/
		{ -15, 0xBB08 }, /*-15dBm*/
		{ -20, 0xB4BC }, /*-20dBm*/
		{ -25, 0xAD5A }, /*-25dBm*/
		{ -30, 0xA298 }, /*-30dBm*/
		{ -35, 0x98A8 }, /*-35dBm*/
		{ -40, 0x8389 }, /*-40dBm*/
		{ -45, 0x59BE }, /*-45dBm*/
		{ -50, 0x3A14 }, /*-50dBm*/
		{ -55, 0x2D11 }, /*-55dBm*/
		{ -60, 0x210D }, /*-60dBm*/
		{ -65, 0xA14F }, /*-65dBm*/
		{ -70, 0x7AA }	/*-70dBm*/
	}
};

struct stv0900_car_loop_optim {
	enum fe_stv0900_modcode modcode;
	u8 car_loop_pilots_on_2;
	u8 car_loop_pilots_off_2;
	u8 car_loop_pilots_on_5;
	u8 car_loop_pilots_off_5;
	u8 car_loop_pilots_on_10;
	u8 car_loop_pilots_off_10;
	u8 car_loop_pilots_on_20;
	u8 car_loop_pilots_off_20;
	u8 car_loop_pilots_on_30;
	u8 car_loop_pilots_off_30;

};

struct stv0900_short_frames_car_loop_optim {
	enum fe_stv0900_modulation modulation;
	u8 car_loop_cut12_2;    /* Cut 1.2,   SR<=3msps     */
	u8 car_loop_cut20_2;    /* Cut 2.0,   SR<3msps      */
	u8 car_loop_cut12_5;    /* Cut 1.2,   3<SR<=7msps   */
	u8 car_loop_cut20_5;    /* Cut 2.0,   3<SR<=7msps   */
	u8 car_loop_cut12_10;   /* Cut 1.2,   7<SR<=15msps  */
	u8 car_loop_cut20_10;   /* Cut 2.0,   7<SR<=15msps  */
	u8 car_loop_cut12_20;   /* Cut 1.2,   10<SR<=25msps */
	u8 car_loop_cut20_20;   /* Cut 2.0,   10<SR<=25msps */
	u8 car_loop_cut12_30;   /* Cut 1.2,   25<SR<=45msps */
	u8 car_loop_cut20_30;   /* Cut 2.0,   10<SR<=45msps */

};

struct stv0900_short_frames_car_loop_optim_vs_mod {
	enum fe_stv0900_modulation modulation;
	u8 car_loop_2;	  /* SR<3msps      */
	u8 car_loop_5;	  /* 3<SR<=7msps   */
	u8 car_loop_10;   /* 7<SR<=15msps  */
	u8 car_loop_20;   /* 10<SR<=25msps */
	u8 car_loop_30;   /* 10<SR<=45msps */
};

/* Cut 1.x Tracking carrier loop carrier QPSK 1/2 to 8PSK 9/10 long Frame */
static const struct stv0900_car_loop_optim FE_STV0900_S2CarLoop[14] = {
	/*Modcod		2MPon 	2MPoff	5MPon 	5MPoff	10MPon
				10MPoff	20MPon 	20MPoff	30MPon 	30MPoff */
	{ STV0900_QPSK_12,	0x1C,	0x0D,	0x1B,	0x2C,	0x3A,
				0x1C,	0x2A,	0x3B,	0x2A,	0x1B },
	{ STV0900_QPSK_35,	0x2C,	0x0D,	0x2B,	0x2C,	0x3A,
				0x0C,	0x3A,	0x2B,	0x2A,	0x0B },
	{ STV0900_QPSK_23,	0x2C,	0x0D,	0x2B,	0x2C,	0x0B,
				0x0C,	0x3A,	0x1B,	0x2A,	0x3A },
	{ STV0900_QPSK_34,	0x3C,	0x0D,	0x3B,	0x1C,	0x0B,
				0x3B,	0x3A,	0x0B,	0x2A,	0x3A },
	{ STV0900_QPSK_45,	0x3C,	0x0D,	0x3B,	0x1C,	0x0B,
				0x3B,	0x3A,	0x0B,	0x2A,	0x3A },
	{ STV0900_QPSK_56,	0x0D,	0x0D,	0x3B,	0x1C,	0x0B,
				0x3B,	0x3A,	0x0B,	0x2A,	0x3A },
	{ STV0900_QPSK_89,	0x0D,	0x0D,	0x3B,	0x1C,	0x1B,
				0x3B,	0x3A,	0x0B,	0x2A,	0x3A },
	{ STV0900_QPSK_910,	0x1D,	0x0D,	0x3B,	0x1C,	0x1B,
				0x3B,	0x3A,	0x0B,	0x2A,	0x3A },
	{ STV0900_8PSK_35,	0x29,	0x3B,	0x09,	0x2B,	0x38,
				0x0B,	0x18,	0x1A,	0x08,	0x0A },
	{ STV0900_8PSK_23,	0x0A,	0x3B,	0x29,	0x2B,	0x19,
				0x0B,	0x38,	0x1A,	0x18,	0x0A },
	{ STV0900_8PSK_34,	0x3A,	0x3B,	0x2A,	0x2B,	0x39,
				0x0B,	0x19,	0x1A,	0x38,	0x0A },
	{ STV0900_8PSK_56,	0x1B,	0x3B,	0x0B,	0x2B,	0x1A,
				0x0B,	0x39,	0x1A,	0x19,	0x0A },
	{ STV0900_8PSK_89,	0x3B,	0x3B,	0x0B,	0x2B,	0x2A,
				0x0B,	0x39,	0x1A,	0x29,	0x39 },
	{ STV0900_8PSK_910,	0x3B,	0x3B, 	0x0B,	0x2B, 	0x2A,
				0x0B,	0x39,	0x1A,	0x29,	0x39 }
};


/* Cut 2.0 Tracking carrier loop carrier QPSK 1/2 to 8PSK 9/10 long Frame */
static const struct stv0900_car_loop_optim FE_STV0900_S2CarLoopCut20[14] = {
	/* Modcod		2MPon 	2MPoff	5MPon 	5MPoff	10MPon
				10MPoff	20MPon 	20MPoff	30MPon 	30MPoff */
	{ STV0900_QPSK_12,	0x1F,	0x3F,	0x1E,	0x3F,	0x3D,
				0x1F,	0x3D,	0x3E,	0x3D,	0x1E },
	{ STV0900_QPSK_35,	0x2F,	0x3F,	0x2E,	0x2F,	0x3D,
				0x0F,	0x0E,	0x2E,	0x3D,	0x0E },
	{ STV0900_QPSK_23,	0x2F,	0x3F,	0x2E,	0x2F,	0x0E,
				0x0F,	0x0E,	0x1E,	0x3D,	0x3D },
	{ STV0900_QPSK_34,	0x3F,	0x3F,	0x3E,	0x1F,	0x0E,
				0x3E,	0x0E,	0x1E,	0x3D,	0x3D },
	{ STV0900_QPSK_45,	0x3F,	0x3F,	0x3E,	0x1F,	0x0E,
				0x3E,	0x0E,	0x1E,	0x3D,	0x3D },
	{ STV0900_QPSK_56,	0x3F,	0x3F,	0x3E,	0x1F,	0x0E,
				0x3E,	0x0E,	0x1E,	0x3D,	0x3D },
	{ STV0900_QPSK_89,	0x3F,	0x3F,	0x3E,	0x1F,	0x1E,
				0x3E,	0x0E,	0x1E,	0x3D,	0x3D },
	{ STV0900_QPSK_910,	0x3F,	0x3F,	0x3E,	0x1F,	0x1E,
				0x3E,	0x0E,	0x1E,	0x3D,	0x3D },
	{ STV0900_8PSK_35,	0x3c,	0x0c,	0x1c,	0x3b,	0x0c,
				0x3b,	0x2b,	0x2b,	0x1b,	0x2b },
	{ STV0900_8PSK_23,	0x1d,	0x0c,	0x3c,	0x0c,	0x2c,
				0x3b,	0x0c,	0x2b,	0x2b,	0x2b },
	{ STV0900_8PSK_34,	0x0e,	0x1c,	0x3d,	0x0c,	0x0d,
				0x3b,	0x2c,	0x3b,	0x0c,	0x2b },
	{ STV0900_8PSK_56,	0x2e,	0x3e,	0x1e,	0x2e,	0x2d,
				0x1e,	0x3c,	0x2d,	0x2c,	0x1d },
	{ STV0900_8PSK_89,	0x3e,	0x3e,	0x1e,	0x2e,	0x3d,
				0x1e,	0x0d,	0x2d,	0x3c,	0x1d },
	{ STV0900_8PSK_910,	0x3e,	0x3e, 	0x1e,	0x2e, 	0x3d,
				0x1e,	0x1d,	0x2d,	0x0d,	0x1d },
};



/* Cut 2.0 Tracking carrier loop carrier 16APSK 2/3 to 32APSK 9/10 long Frame */
static const struct stv0900_car_loop_optim FE_STV0900_S2APSKCarLoopCut20[11] = {
	/* Modcod		2MPon 	2MPoff	5MPon 	5MPoff	10MPon
				10MPoff	20MPon 	20MPoff	30MPon 	30MPoff */
	{ STV0900_16APSK_23,	0x0C,	0x0C,	0x0C,	0x0C,	0x1D,
				0x0C,	0x3C,	0x0C,	0x2C,	0x0C },
	{ STV0900_16APSK_34,	0x0C,	0x0C,	0x0C,	0x0C,	0x0E,
				0x0C,	0x2D,	0x0C,	0x1D,	0x0C },
	{ STV0900_16APSK_45,	0x0C,	0x0C,	0x0C,	0x0C,	0x1E,
				0x0C,	0x3D,	0x0C,	0x2D,	0x0C },
	{ STV0900_16APSK_56,	0x0C,	0x0C,	0x0C,	0x0C,	0x1E,
				0x0C,	0x3D,	0x0C,	0x2D,	0x0C },
	{ STV0900_16APSK_89,	0x0C,	0x0C,	0x0C,	0x0C,	0x2E,
				0x0C,	0x0E,	0x0C,	0x3D,	0x0C },
	{ STV0900_16APSK_910,	0x0C,	0x0C,	0x0C,	0x0C,	0x2E,
				0x0C,	0x0E,	0x0C,	0x3D,	0x0C },
	{ STV0900_32APSK_34,	0x0C,	0x0C,	0x0C,	0x0C,	0x0C,
				0x0C,	0x0C,	0x0C,	0x0C,	0x0C },
	{ STV0900_32APSK_45,	0x0C,	0x0C,	0x0C,	0x0C,	0x0C,
				0x0C,	0x0C,	0x0C,	0x0C,	0x0C },
	{ STV0900_32APSK_56,	0x0C,	0x0C,	0x0C,	0x0C,	0x0C,
				0x0C,	0x0C,	0x0C,	0x0C,	0x0C },
	{ STV0900_32APSK_89,	0x0C,	0x0C,	0x0C,	0x0C,	0x0C,
				0x0C,	0x0C,	0x0C,	0x0C,	0x0C },
	{ STV0900_32APSK_910,	0x0C,	0x0C,	0x0C,	0x0C,	0x0C,
				0x0C,	0x0C,	0x0C,	0x0C,	0x0C },
};


/* Cut 2.0 Tracking carrier loop carrier QPSK 1/4 to QPSK 2/5 long Frame */
static const struct stv0900_car_loop_optim FE_STV0900_S2LowQPCarLoopCut20[3] = {
	/* Modcod		2MPon 	2MPoff	5MPon 	5MPoff	10MPon
				10MPoff	20MPon 	20MPoff	30MPon 	30MPoff */
	{ STV0900_QPSK_14,	0x0F,	0x3F,	0x0E,	0x3F,	0x2D,
				0x2F,	0x2D,	0x1F,	0x3D,	0x3E },
	{ STV0900_QPSK_13,	0x0F,	0x3F,	0x0E,	0x3F,	0x2D,
				0x2F,	0x3D,	0x0F,	0x3D,	0x2E },
	{ STV0900_QPSK_25,	0x1F,	0x3F,	0x1E,	0x3F,	0x3D,
				0x1F,	0x3D,	0x3E,	0x3D,	0x2E }
};


/* Cut 2.0 Tracking carrier loop carrier  short Frame, cut 1.2 and 2.0 */
static const
struct stv0900_short_frames_car_loop_optim FE_STV0900_S2ShortCarLoop[4] = {
	/*Mod		2Mcut1.2 2Mcut2.0 5Mcut1.2 5Mcut2.0 10Mcut1.2
			10Mcut2.0 20Mcut1.2 20M_cut2.0 30Mcut1.2 30Mcut2.0*/
	{ STV0900_QPSK,		0x3C,	0x2F,	0x2B,	0x2E,	0x0B,
				0x0E,	0x3A,	0x0E,	0x2A,	0x3D },
	{ STV0900_8PSK,		0x0B,	0x3E,	0x2A,	0x0E,	0x0A,
				0x2D,	0x19,	0x0D,	0x09,	0x3C },
	{ STV0900_16APSK,	0x1B,	0x1E,	0x1B,	0x1E,	0x1B,
				0x1E,	0x3A,	0x3D,	0x2A,	0x2D },
	{ STV0900_32APSK,	0x1B,	0x1E,	0x1B,	0x1E,	0x1B,
				0x1E,	0x3A,	0x3D,	0x2A,	0x2D }
};

static	const struct stv0900_car_loop_optim FE_STV0900_S2CarLoopCut30[14] = {
	/*Modcod		2MPon 	2MPoff	5MPon 	5MPoff	10MPon
				10MPoff	20MPon 	20MPoff	30MPon 	30MPoff	*/
	{ STV0900_QPSK_12,	0x3C,	0x2C,	0x0C,	0x2C,	0x1B,
				0x2C,	0x1B,	0x1C,	0x0B, 	0x3B },
	{ STV0900_QPSK_35,	0x0D,	0x0D,	0x0C,	0x0D,	0x1B,
				0x3C,	0x1B,	0x1C,	0x0B,	0x3B },
	{ STV0900_QPSK_23,	0x1D,	0x0D,	0x0C,	0x1D,	0x2B,
				0x3C,	0x1B,	0x1C,	0x0B,	0x3B },
	{ STV0900_QPSK_34,	0x1D,	0x1D,	0x0C,	0x1D,	0x2B,
				0x3C,	0x1B,	0x1C,	0x0B,	0x3B },
	{ STV0900_QPSK_45,	0x2D,	0x1D,	0x1C,	0x1D,	0x2B,
				0x3C,	0x2B,	0x0C,	0x1B,	0x3B },
	{ STV0900_QPSK_56,	0x2D,	0x1D,	0x1C,	0x1D,	0x2B,
				0x3C,	0x2B,	0x0C,	0x1B,	0x3B },
	{ STV0900_QPSK_89,	0x3D,	0x2D,	0x1C,	0x1D,	0x3B,
				0x3C,	0x2B,	0x0C,	0x1B,	0x3B },
	{ STV0900_QPSK_910,	0x3D,	0x2D,	0x1C,	0x1D,	0x3B,
				0x3C,	0x2B,	0x0C,	0x1B,	0x3B },
	{ STV0900_8PSK_35,	0x39,	0x19,	0x39,	0x19,	0x19,
				0x19,	0x19,	0x19,	0x09,	0x19 },
	{ STV0900_8PSK_23,	0x2A,	0x39,	0x1A,	0x0A,	0x39,
				0x0A,	0x29,	0x39,	0x29,	0x0A },
	{ STV0900_8PSK_34,	0x0B,	0x3A,	0x0B,	0x0B,	0x3A,
				0x1B,	0x1A,	0x0B,	0x1A,	0x3A },
	{ STV0900_8PSK_56,	0x0C,	0x1B,	0x3B,	0x2B,	0x1B,
				0x3B,	0x3A,	0x3B,	0x3A,	0x1B },
	{ STV0900_8PSK_89,	0x2C,	0x2C,	0x2C,	0x1C,	0x2B,
				0x0C,	0x0B,	0x3B,	0x0B,	0x1B },
	{ STV0900_8PSK_910,	0x2C,	0x3C,	0x2C,	0x1C,	0x3B,
				0x1C,	0x0B,	0x3B,	0x0B,	0x1B }
};

static	const
struct stv0900_car_loop_optim FE_STV0900_S2APSKCarLoopCut30[11] = {
	/*Modcod		2MPon 	2MPoff	5MPon 	5MPoff	10MPon
				10MPoff	20MPon 	20MPoff	30MPon 	30MPoff	*/
	{ STV0900_16APSK_23,	0x0A,	0x0A,	0x0A,	0x0A,	0x1A,
				0x0A,	0x3A,	0x0A,	0x2A,	0x0A },
	{ STV0900_16APSK_34,	0x0A,	0x0A,	0x0A,	0x0A,	0x0B,
				0x0A,	0x3B,	0x0A,	0x1B,	0x0A },
	{ STV0900_16APSK_45,	0x0A,	0x0A,	0x0A,	0x0A,	0x1B,
				0x0A,	0x3B,	0x0A,	0x2B,	0x0A },
	{ STV0900_16APSK_56,	0x0A,	0x0A,	0x0A,	0x0A,	0x1B,
				0x0A,	0x3B,	0x0A,	0x2B,	0x0A },
	{ STV0900_16APSK_89,	0x0A,	0x0A,	0x0A,	0x0A,	0x2B,
				0x0A,	0x0C,	0x0A,	0x3B,	0x0A },
	{ STV0900_16APSK_910,	0x0A,	0x0A,	0x0A,	0x0A,	0x2B,
				0x0A,	0x0C,	0x0A,	0x3B,	0x0A },
	{ STV0900_32APSK_34,	0x0A,	0x0A,	0x0A,	0x0A,	0x0A,
				0x0A,	0x0A,	0x0A,	0x0A,	0x0A },
	{ STV0900_32APSK_45,	0x0A,	0x0A,	0x0A,	0x0A,	0x0A,
				0x0A,	0x0A,	0x0A,	0x0A,	0x0A },
	{ STV0900_32APSK_56,	0x0A,	0x0A,	0x0A,	0x0A,	0x0A,
				0x0A,	0x0A,	0x0A,	0x0A,	0x0A },
	{ STV0900_32APSK_89,	0x0A,	0x0A,	0x0A,	0x0A,	0x0A,
				0x0A,	0x0A,	0x0A,	0x0A,	0x0A },
	{ STV0900_32APSK_910,	0x0A,	0x0A,	0x0A,	0x0A,	0x0A,
				0x0A,	0x0A,	0x0A,	0x0A,	0x0A }
};

static	const
struct stv0900_car_loop_optim FE_STV0900_S2LowQPCarLoopCut30[3] = {
	/*Modcod		2MPon 	2MPoff	5MPon 	5MPoff	10MPon
				10MPoff	20MPon 	20MPoff	30MPon 	30MPoff*/
	{ STV0900_QPSK_14,	0x0C,	0x3C,	0x0B,	0x3C,	0x2A,
				0x2C,	0x2A,	0x1C,	0x3A,	0x3B },
	{ STV0900_QPSK_13,	0x0C,	0x3C,	0x0B,	0x3C,	0x2A,
				0x2C,	0x3A,	0x0C,	0x3A,	0x2B },
	{ STV0900_QPSK_25,	0x1C,	0x3C,	0x1B,	0x3C,	0x3A,
				0x1C,	0x3A,	0x3B,	0x3A,	0x2B }
};

static	const struct stv0900_short_frames_car_loop_optim_vs_mod
FE_STV0900_S2ShortCarLoopCut30[4] = {
	/*Mod		2Mcut3.0 5Mcut3.0 10Mcut3.0 20Mcut3.0 30Mcut3.0*/
	{ STV0900_QPSK,		0x2C,	0x2B,	0x0B,	0x0B,	0x3A },
	{ STV0900_8PSK,		0x3B,	0x0B,	0x2A,	0x0A,	0x39 },
	{ STV0900_16APSK,	0x1B,	0x1B,	0x1B,	0x3A,	0x2A },
	{ STV0900_32APSK,	0x1B,	0x1B,	0x1B,	0x3A,	0x2A },

};

static const u16 STV0900_InitVal[181][2] = {
	{ R0900_OUTCFG		, 0x00	},
	{ R0900_AGCRF1CFG	, 0x11	},
	{ R0900_AGCRF2CFG	, 0x13	},
	{ R0900_TSGENERAL1X	, 0x14	},
	{ R0900_TSTTNR2		, 0x21	},
	{ R0900_TSTTNR4		, 0x21	},
	{ R0900_P2_DISTXCTL	, 0x22	},
	{ R0900_P2_F22TX	, 0xc0	},
	{ R0900_P2_F22RX	, 0xc0	},
	{ R0900_P2_DISRXCTL	, 0x00	},
	{ R0900_P2_TNRSTEPS	, 0x87	},
	{ R0900_P2_TNRGAIN	, 0x09	},
	{ R0900_P2_DMDCFGMD	, 0xF9	},
	{ R0900_P2_DEMOD	, 0x08	},
	{ R0900_P2_DMDCFG3	, 0xc4	},
	{ R0900_P2_CARFREQ	, 0xed	},
	{ R0900_P2_TNRCFG2	, 0x02	},
	{ R0900_P2_TNRCFG3	, 0x02	},
	{ R0900_P2_LDT		, 0xd0	},
	{ R0900_P2_LDT2		, 0xb8	},
	{ R0900_P2_TMGCFG	, 0xd2	},
	{ R0900_P2_TMGTHRISE	, 0x20	},
	{ R0900_P2_TMGTHFALL	, 0x00	},
	{ R0900_P2_FECSPY	, 0x88	},
	{ R0900_P2_FSPYDATA	, 0x3a	},
	{ R0900_P2_FBERCPT4	, 0x00	},
	{ R0900_P2_FSPYBER	, 0x10	},
	{ R0900_P2_ERRCTRL1	, 0x35	},
	{ R0900_P2_ERRCTRL2	, 0xc1	},
	{ R0900_P2_CFRICFG	, 0xf8	},
	{ R0900_P2_NOSCFG	, 0x1c	},
	{ R0900_P2_DMDT0M	, 0x20	},
	{ R0900_P2_CORRELMANT	, 0x70	},
	{ R0900_P2_CORRELABS	, 0x88	},
	{ R0900_P2_AGC2O	, 0x5b	},
	{ R0900_P2_AGC2REF	, 0x38	},
	{ R0900_P2_CARCFG	, 0xe4	},
	{ R0900_P2_ACLC		, 0x1A	},
	{ R0900_P2_BCLC		, 0x09	},
	{ R0900_P2_CARHDR	, 0x08	},
	{ R0900_P2_KREFTMG	, 0xc1	},
	{ R0900_P2_SFRUPRATIO	, 0xf0	},
	{ R0900_P2_SFRLOWRATIO	, 0x70	},
	{ R0900_P2_SFRSTEP	, 0x58	},
	{ R0900_P2_TMGCFG2	, 0x01	},
	{ R0900_P2_CAR2CFG	, 0x26	},
	{ R0900_P2_BCLC2S2Q	, 0x86	},
	{ R0900_P2_BCLC2S28	, 0x86	},
	{ R0900_P2_SMAPCOEF7	, 0x77	},
	{ R0900_P2_SMAPCOEF6	, 0x85	},
	{ R0900_P2_SMAPCOEF5	, 0x77	},
	{ R0900_P2_TSCFGL	, 0x20	},
	{ R0900_P2_DMDCFG2	, 0x3b	},
	{ R0900_P2_MODCODLST0	, 0xff	},
	{ R0900_P2_MODCODLST1	, 0xff	},
	{ R0900_P2_MODCODLST2	, 0xff	},
	{ R0900_P2_MODCODLST3	, 0xff	},
	{ R0900_P2_MODCODLST4	, 0xff	},
	{ R0900_P2_MODCODLST5	, 0xff	},
	{ R0900_P2_MODCODLST6	, 0xff	},
	{ R0900_P2_MODCODLST7	, 0xcc	},
	{ R0900_P2_MODCODLST8	, 0xcc	},
	{ R0900_P2_MODCODLST9	, 0xcc	},
	{ R0900_P2_MODCODLSTA	, 0xcc	},
	{ R0900_P2_MODCODLSTB	, 0xcc	},
	{ R0900_P2_MODCODLSTC	, 0xcc	},
	{ R0900_P2_MODCODLSTD	, 0xcc	},
	{ R0900_P2_MODCODLSTE	, 0xcc	},
	{ R0900_P2_MODCODLSTF	, 0xcf	},
	{ R0900_P1_DISTXCTL	, 0x22	},
	{ R0900_P1_F22TX	, 0xc0	},
	{ R0900_P1_F22RX	, 0xc0	},
	{ R0900_P1_DISRXCTL	, 0x00	},
	{ R0900_P1_TNRSTEPS	, 0x87	},
	{ R0900_P1_TNRGAIN	, 0x09	},
	{ R0900_P1_DMDCFGMD	, 0xf9	},
	{ R0900_P1_DEMOD	, 0x08	},
	{ R0900_P1_DMDCFG3	, 0xc4	},
	{ R0900_P1_DMDT0M	, 0x20	},
	{ R0900_P1_CARFREQ	, 0xed	},
	{ R0900_P1_TNRCFG2	, 0x82	},
	{ R0900_P1_TNRCFG3	, 0x02	},
	{ R0900_P1_LDT		, 0xd0	},
	{ R0900_P1_LDT2		, 0xb8	},
	{ R0900_P1_TMGCFG	, 0xd2	},
	{ R0900_P1_TMGTHRISE	, 0x20	},
	{ R0900_P1_TMGTHFALL	, 0x00	},
	{ R0900_P1_SFRUPRATIO	, 0xf0	},
	{ R0900_P1_SFRLOWRATIO	, 0x70	},
	{ R0900_P1_TSCFGL	, 0x20	},
	{ R0900_P1_FECSPY	, 0x88	},
	{ R0900_P1_FSPYDATA	, 0x3a	},
	{ R0900_P1_FBERCPT4	, 0x00	},
	{ R0900_P1_FSPYBER	, 0x10	},
	{ R0900_P1_ERRCTRL1	, 0x35	},
	{ R0900_P1_ERRCTRL2	, 0xc1	},
	{ R0900_P1_CFRICFG	, 0xf8	},
	{ R0900_P1_NOSCFG	, 0x1c	},
	{ R0900_P1_CORRELMANT	, 0x70	},
	{ R0900_P1_CORRELABS	, 0x88	},
	{ R0900_P1_AGC2O	, 0x5b	},
	{ R0900_P1_AGC2REF	, 0x38	},
	{ R0900_P1_CARCFG	, 0xe4	},
	{ R0900_P1_ACLC		, 0x1A	},
	{ R0900_P1_BCLC		, 0x09	},
	{ R0900_P1_CARHDR	, 0x08	},
	{ R0900_P1_KREFTMG	, 0xc1	},
	{ R0900_P1_SFRSTEP	, 0x58	},
	{ R0900_P1_TMGCFG2	, 0x01	},
	{ R0900_P1_CAR2CFG	, 0x26	},
	{ R0900_P1_BCLC2S2Q	, 0x86	},
	{ R0900_P1_BCLC2S28	, 0x86	},
	{ R0900_P1_SMAPCOEF7	, 0x77	},
	{ R0900_P1_SMAPCOEF6	, 0x85	},
	{ R0900_P1_SMAPCOEF5	, 0x77	},
	{ R0900_P1_DMDCFG2	, 0x3b	},
	{ R0900_P1_MODCODLST0	, 0xff	},
	{ R0900_P1_MODCODLST1	, 0xff	},
	{ R0900_P1_MODCODLST2	, 0xff	},
	{ R0900_P1_MODCODLST3	, 0xff	},
	{ R0900_P1_MODCODLST4	, 0xff	},
	{ R0900_P1_MODCODLST5	, 0xff	},
	{ R0900_P1_MODCODLST6	, 0xff	},
	{ R0900_P1_MODCODLST7	, 0xcc	},
	{ R0900_P1_MODCODLST8	, 0xcc	},
	{ R0900_P1_MODCODLST9	, 0xcc	},
	{ R0900_P1_MODCODLSTA	, 0xcc	},
	{ R0900_P1_MODCODLSTB	, 0xcc	},
	{ R0900_P1_MODCODLSTC	, 0xcc	},
	{ R0900_P1_MODCODLSTD	, 0xcc	},
	{ R0900_P1_MODCODLSTE	, 0xcc	},
	{ R0900_P1_MODCODLSTF	, 0xcf	},
	{ R0900_GENCFG		, 0x1d	},
	{ R0900_NBITER_NF4	, 0x37	},
	{ R0900_NBITER_NF5	, 0x29	},
	{ R0900_NBITER_NF6	, 0x37	},
	{ R0900_NBITER_NF7	, 0x33	},
	{ R0900_NBITER_NF8	, 0x31	},
	{ R0900_NBITER_NF9	, 0x2f	},
	{ R0900_NBITER_NF10	, 0x39	},
	{ R0900_NBITER_NF11	, 0x3a	},
	{ R0900_NBITER_NF12	, 0x29	},
	{ R0900_NBITER_NF13	, 0x37	},
	{ R0900_NBITER_NF14	, 0x33	},
	{ R0900_NBITER_NF15	, 0x2f	},
	{ R0900_NBITER_NF16	, 0x39	},
	{ R0900_NBITER_NF17	, 0x3a	},
	{ R0900_NBITERNOERR	, 0x04	},
	{ R0900_GAINLLR_NF4	, 0x0C	},
	{ R0900_GAINLLR_NF5	, 0x0F	},
	{ R0900_GAINLLR_NF6	, 0x11	},
	{ R0900_GAINLLR_NF7	, 0x14	},
	{ R0900_GAINLLR_NF8	, 0x17	},
	{ R0900_GAINLLR_NF9	, 0x19	},
	{ R0900_GAINLLR_NF10	, 0x20	},
	{ R0900_GAINLLR_NF11	, 0x21	},
	{ R0900_GAINLLR_NF12	, 0x0D	},
	{ R0900_GAINLLR_NF13	, 0x0F	},
	{ R0900_GAINLLR_NF14	, 0x13	},
	{ R0900_GAINLLR_NF15	, 0x1A	},
	{ R0900_GAINLLR_NF16	, 0x1F	},
	{ R0900_GAINLLR_NF17	, 0x21	},
	{ R0900_RCCFG2		, 0x20	},
	{ R0900_P1_FECM		, 0x01	}, /*disable DSS modes*/
	{ R0900_P2_FECM		, 0x01	}, /*disable DSS modes*/
	{ R0900_P1_PRVIT	, 0x2F	}, /*disable puncture rate 6/7*/
	{ R0900_P2_PRVIT	, 0x2F	}, /*disable puncture rate 6/7*/
	{ R0900_STROUT1CFG	, 0x4c	},
	{ R0900_STROUT2CFG	, 0x4c	},
	{ R0900_CLKOUT1CFG	, 0x50	},
	{ R0900_CLKOUT2CFG	, 0x50	},
	{ R0900_DPN1CFG		, 0x4a	},
	{ R0900_DPN2CFG		, 0x4a	},
	{ R0900_DATA71CFG	, 0x52	},
	{ R0900_DATA72CFG	, 0x52	},
	{ R0900_P1_TSCFGM	, 0xc0	},
	{ R0900_P2_TSCFGM	, 0xc0	},
	{ R0900_P1_TSCFGH	, 0xe0	}, /* DVB-CI timings */
	{ R0900_P2_TSCFGH	, 0xe0	}, /* DVB-CI timings */
	{ R0900_P1_TSSPEED	, 0x40	},
	{ R0900_P2_TSSPEED	, 0x40	},
};

static const u16 STV0900_Cut20_AddOnVal[32][2] = {
	{ R0900_P2_DMDCFG3	, 0xe8	},
	{ R0900_P2_DMDCFG4	, 0x10	},
	{ R0900_P2_CARFREQ	, 0x38	},
	{ R0900_P2_CARHDR	, 0x20	},
	{ R0900_P2_KREFTMG	, 0x5a	},
	{ R0900_P2_SMAPCOEF7	, 0x06	},
	{ R0900_P2_SMAPCOEF6	, 0x00	},
	{ R0900_P2_SMAPCOEF5	, 0x04	},
	{ R0900_P2_NOSCFG	, 0x0c	},
	{ R0900_P1_DMDCFG3	, 0xe8	},
	{ R0900_P1_DMDCFG4	, 0x10	},
	{ R0900_P1_CARFREQ	, 0x38	},
	{ R0900_P1_CARHDR	, 0x20	},
	{ R0900_P1_KREFTMG	, 0x5a	},
	{ R0900_P1_SMAPCOEF7	, 0x06	},
	{ R0900_P1_SMAPCOEF6	, 0x00	},
	{ R0900_P1_SMAPCOEF5	, 0x04	},
	{ R0900_P1_NOSCFG	, 0x0c	},
	{ R0900_GAINLLR_NF4	, 0x21	},
	{ R0900_GAINLLR_NF5	, 0x21	},
	{ R0900_GAINLLR_NF6	, 0x20	},
	{ R0900_GAINLLR_NF7	, 0x1F	},
	{ R0900_GAINLLR_NF8	, 0x1E	},
	{ R0900_GAINLLR_NF9	, 0x1E	},
	{ R0900_GAINLLR_NF10	, 0x1D	},
	{ R0900_GAINLLR_NF11	, 0x1B	},
	{ R0900_GAINLLR_NF12	, 0x20	},
	{ R0900_GAINLLR_NF13	, 0x20	},
	{ R0900_GAINLLR_NF14	, 0x20	},
	{ R0900_GAINLLR_NF15	, 0x20	},
	{ R0900_GAINLLR_NF16	, 0x20	},
	{ R0900_GAINLLR_NF17	, 0x21	}

};

#endif
an>(dev, 0x900C, &val); val |= (mask & 0x000ffff); mc417_register_write(dev, 0x900C, val); } void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask) { u32 val; /* Clear the gpio value */ mc417_register_read(dev, 0x900C, &val); val &= ~(mask & 0x0000ffff); mc417_register_write(dev, 0x900C, val); } void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput) { u32 val; /* Enable GPIO direction bits */ mc417_register_read(dev, 0x9020, &val); if (asoutput) val |= (mask & 0x0000ffff); else val &= ~(mask & 0x0000ffff); mc417_register_write(dev, 0x9020, val); } /* ------------------------------------------------------------------ */ /* MPEG encoder API */ static char *cmd_to_str(int cmd) { switch (cmd) { case CX2341X_ENC_PING_FW: return "PING_FW"; case CX2341X_ENC_START_CAPTURE: return "START_CAPTURE"; case CX2341X_ENC_STOP_CAPTURE: return "STOP_CAPTURE"; case CX2341X_ENC_SET_AUDIO_ID: return "SET_AUDIO_ID"; case CX2341X_ENC_SET_VIDEO_ID: return "SET_VIDEO_ID"; case CX2341X_ENC_SET_PCR_ID: return "SET_PCR_ID"; case CX2341X_ENC_SET_FRAME_RATE: return "SET_FRAME_RATE"; case CX2341X_ENC_SET_FRAME_SIZE: return "SET_FRAME_SIZE"; case CX2341X_ENC_SET_BIT_RATE: return "SET_BIT_RATE"; case CX2341X_ENC_SET_GOP_PROPERTIES: return "SET_GOP_PROPERTIES"; case CX2341X_ENC_SET_ASPECT_RATIO: return "SET_ASPECT_RATIO"; case CX2341X_ENC_SET_DNR_FILTER_MODE: return "SET_DNR_FILTER_MODE"; case CX2341X_ENC_SET_DNR_FILTER_PROPS: return "SET_DNR_FILTER_PROPS"; case CX2341X_ENC_SET_CORING_LEVELS: return "SET_CORING_LEVELS"; case CX2341X_ENC_SET_SPATIAL_FILTER_TYPE: return "SET_SPATIAL_FILTER_TYPE"; case CX2341X_ENC_SET_VBI_LINE: return "SET_VBI_LINE"; case CX2341X_ENC_SET_STREAM_TYPE: return "SET_STREAM_TYPE"; case CX2341X_ENC_SET_OUTPUT_PORT: return "SET_OUTPUT_PORT"; case CX2341X_ENC_SET_AUDIO_PROPERTIES: return "SET_AUDIO_PROPERTIES"; case CX2341X_ENC_HALT_FW: return "HALT_FW"; case CX2341X_ENC_GET_VERSION: return "GET_VERSION"; case CX2341X_ENC_SET_GOP_CLOSURE: return "SET_GOP_CLOSURE"; case CX2341X_ENC_GET_SEQ_END: return "GET_SEQ_END"; case CX2341X_ENC_SET_PGM_INDEX_INFO: return "SET_PGM_INDEX_INFO"; case CX2341X_ENC_SET_VBI_CONFIG: return "SET_VBI_CONFIG"; case CX2341X_ENC_SET_DMA_BLOCK_SIZE: return "SET_DMA_BLOCK_SIZE"; case CX2341X_ENC_GET_PREV_DMA_INFO_MB_10: return "GET_PREV_DMA_INFO_MB_10"; case CX2341X_ENC_GET_PREV_DMA_INFO_MB_9: return "GET_PREV_DMA_INFO_MB_9"; case CX2341X_ENC_SCHED_DMA_TO_HOST: return "SCHED_DMA_TO_HOST"; case CX2341X_ENC_INITIALIZE_INPUT: return "INITIALIZE_INPUT"; case CX2341X_ENC_SET_FRAME_DROP_RATE: return "SET_FRAME_DROP_RATE"; case CX2341X_ENC_PAUSE_ENCODER: return "PAUSE_ENCODER"; case CX2341X_ENC_REFRESH_INPUT: return "REFRESH_INPUT"; case CX2341X_ENC_SET_COPYRIGHT: return "SET_COPYRIGHT"; case CX2341X_ENC_SET_EVENT_NOTIFICATION: return "SET_EVENT_NOTIFICATION"; case CX2341X_ENC_SET_NUM_VSYNC_LINES: return "SET_NUM_VSYNC_LINES"; case CX2341X_ENC_SET_PLACEHOLDER: return "SET_PLACEHOLDER"; case CX2341X_ENC_MUTE_VIDEO: return "MUTE_VIDEO"; case CX2341X_ENC_MUTE_AUDIO: return "MUTE_AUDIO"; case CX2341X_ENC_MISC: return "MISC"; default: return "UNKNOWN"; } } static int cx23885_mbox_func(void *priv, u32 command, int in, int out, u32 data[CX2341X_MBOX_MAX_DATA]) { struct cx23885_dev *dev = priv; unsigned long timeout; u32 value, flag, retval = 0; int i; dprintk(3, "%s: command(0x%X) = %s\n", __func__, command, cmd_to_str(command)); /* this may not be 100% safe if we can't read any memory location without side effects */ mc417_memory_read(dev, dev->cx23417_mailbox - 4, &value); if (value != 0x12345678) { printk(KERN_ERR "Firmware and/or mailbox pointer not initialized " "or corrupted, signature = 0x%x, cmd = %s\n", value, cmd_to_str(command)); return -1; } /* This read looks at 32 bits, but flag is only 8 bits. * Seems we also bail if CMD or TIMEOUT bytes are set??? */ mc417_memory_read(dev, dev->cx23417_mailbox, &flag); if (flag) { printk(KERN_ERR "ERROR: Mailbox appears to be in use " "(%x), cmd = %s\n", flag, cmd_to_str(command)); return -1; } flag |= 1; /* tell 'em we're working on it */ mc417_memory_write(dev, dev->cx23417_mailbox, flag); /* write command + args + fill remaining with zeros */ /* command code */ mc417_memory_write(dev, dev->cx23417_mailbox + 1, command); mc417_memory_write(dev, dev->cx23417_mailbox + 3, IVTV_API_STD_TIMEOUT); /* timeout */ for (i = 0; i < in; i++) { mc417_memory_write(dev, dev->cx23417_mailbox + 4 + i, data[i]); dprintk(3, "API Input %d = %d\n", i, data[i]); } for (; i < CX2341X_MBOX_MAX_DATA; i++) mc417_memory_write(dev, dev->cx23417_mailbox + 4 + i, 0); flag |= 3; /* tell 'em we're done writing */ mc417_memory_write(dev, dev->cx23417_mailbox, flag); /* wait for firmware to handle the API command */ timeout = jiffies + msecs_to_jiffies(10); for (;;) { mc417_memory_read(dev, dev->cx23417_mailbox, &flag); if (0 != (flag & 4)) break; if (time_after(jiffies, timeout)) { printk(KERN_ERR "ERROR: API Mailbox timeout\n"); return -1; } udelay(10); } /* read output values */ for (i = 0; i < out; i++) { mc417_memory_read(dev, dev->cx23417_mailbox + 4 + i, data + i); dprintk(3, "API Output %d = %d\n", i, data[i]); } mc417_memory_read(dev, dev->cx23417_mailbox + 2, &retval); dprintk(3, "API result = %d\n", retval); flag = 0; mc417_memory_write(dev, dev->cx23417_mailbox, flag); return retval; } /* We don't need to call the API often, so using just one * mailbox will probably suffice */ static int cx23885_api_cmd(struct cx23885_dev *dev, u32 command, u32 inputcnt, u32 outputcnt, ...) { u32 data[CX2341X_MBOX_MAX_DATA]; va_list vargs; int i, err; dprintk(3, "%s() cmds = 0x%08x\n", __func__, command); va_start(vargs, outputcnt); for (i = 0; i < inputcnt; i++) data[i] = va_arg(vargs, int); err = cx23885_mbox_func(dev, command, inputcnt, outputcnt, data); for (i = 0; i < outputcnt; i++) { int *vptr = va_arg(vargs, int *); *vptr = data[i]; } va_end(vargs); return err; } static int cx23885_api_func(void *priv, u32 cmd, int in, int out, u32 data[CX2341X_MBOX_MAX_DATA]) { return cx23885_mbox_func(priv, cmd, in, out, data); } static int cx23885_find_mailbox(struct cx23885_dev *dev) { u32 signature[4] = { 0x12345678, 0x34567812, 0x56781234, 0x78123456 }; int signaturecnt = 0; u32 value; int i; dprintk(2, "%s()\n", __func__); for (i = 0; i < CX23885_FIRM_IMAGE_SIZE; i++) { mc417_memory_read(dev, i, &value); if (value == signature[signaturecnt]) signaturecnt++; else signaturecnt = 0; if (4 == signaturecnt) { dprintk(1, "Mailbox signature found at 0x%x\n", i+1); return i+1; } } printk(KERN_ERR "Mailbox signature values not found!\n"); return -1; } static int cx23885_load_firmware(struct cx23885_dev *dev) { static const unsigned char magic[8] = { 0xa7, 0x0d, 0x00, 0x00, 0x66, 0xbb, 0x55, 0xaa }; const struct firmware *firmware; int i, retval = 0; u32 value = 0; u32 gpio_output = 0; u32 gpio_value; u32 checksum = 0; u32 *dataptr; dprintk(2, "%s()\n", __func__); /* Save GPIO settings before reset of APU */ retval |= mc417_memory_read(dev, 0x9020, &gpio_output); retval |= mc417_memory_read(dev, 0x900C, &gpio_value); retval = mc417_register_write(dev, IVTV_REG_VPU, 0xFFFFFFED); retval |= mc417_register_write(dev, IVTV_REG_HW_BLOCKS, IVTV_CMD_HW_BLOCKS_RST); retval |= mc417_register_write(dev, IVTV_REG_ENC_SDRAM_REFRESH, 0x80000800); retval |= mc417_register_write(dev, IVTV_REG_ENC_SDRAM_PRECHARGE, 0x1A); retval |= mc417_register_write(dev, IVTV_REG_APU, 0); if (retval != 0) { printk(KERN_ERR "%s: Error with mc417_register_write\n", __func__); return -1; } retval = request_firmware(&firmware, CX23885_FIRM_IMAGE_NAME, &dev->pci->dev); if (retval != 0) { printk(KERN_ERR "ERROR: Hotplug firmware request failed (%s).\n", CX23885_FIRM_IMAGE_NAME); printk(KERN_ERR "Please fix your hotplug setup, the board will " "not work without firmware loaded!\n"); return -1; } if (firmware->size != CX23885_FIRM_IMAGE_SIZE) { printk(KERN_ERR "ERROR: Firmware size mismatch " "(have %zu, expected %d)\n", firmware->size, CX23885_FIRM_IMAGE_SIZE); release_firmware(firmware); return -1; } if (0 != memcmp(firmware->data, magic, 8)) { printk(KERN_ERR "ERROR: Firmware magic mismatch, wrong file?\n"); release_firmware(firmware); return -1; } /* transfer to the chip */ dprintk(2, "Loading firmware ...\n"); dataptr = (u32 *)firmware->data; for (i = 0; i < (firmware->size >> 2); i++) { value = *dataptr; checksum += ~value; if (mc417_memory_write(dev, i, value) != 0) { printk(KERN_ERR "ERROR: Loading firmware failed!\n"); release_firmware(firmware); return -1; } dataptr++; } /* read back to verify with the checksum */ dprintk(1, "Verifying firmware ...\n"); for (i--; i >= 0; i--) { if (mc417_memory_read(dev, i, &value) != 0) { printk(KERN_ERR "ERROR: Reading firmware failed!\n"); release_firmware(firmware); return -1; } checksum -= ~value; } if (checksum) { printk(KERN_ERR "ERROR: Firmware load failed (checksum mismatch).\n"); release_firmware(firmware); return -1; } release_firmware(firmware); dprintk(1, "Firmware upload successful.\n"); retval |= mc417_register_write(dev, IVTV_REG_HW_BLOCKS, IVTV_CMD_HW_BLOCKS_RST); /* F/W power up disturbs the GPIOs, restore state */ retval |= mc417_register_write(dev, 0x9020, gpio_output); retval |= mc417_register_write(dev, 0x900C, gpio_value); retval |= mc417_register_read(dev, IVTV_REG_VPU, &value); retval |= mc417_register_write(dev, IVTV_REG_VPU, value & 0xFFFFFFE8); /* Hardcoded GPIO's here */ retval |= mc417_register_write(dev, 0x9020, 0x4000); retval |= mc417_register_write(dev, 0x900C, 0x4000); mc417_register_read(dev, 0x9020, &gpio_output); mc417_register_read(dev, 0x900C, &gpio_value); if (retval < 0) printk(KERN_ERR "%s: Error with mc417_register_write\n", __func__); return 0; } void cx23885_417_check_encoder(struct cx23885_dev *dev) { u32 status, seq; status = seq = 0; cx23885_api_cmd(dev, CX2341X_ENC_GET_SEQ_END, 0, 2, &status, &seq); dprintk(1, "%s() status = %d, seq = %d\n", __func__, status, seq); } static void cx23885_codec_settings(struct cx23885_dev *dev) { dprintk(1, "%s()\n", __func__); /* Dynamically change the height based on video standard */ if (dev->encodernorm.id & V4L2_STD_525_60) dev->ts1.height = 480; else dev->ts1.height = 576; /* assign frame size */ cx23885_api_cmd(dev, CX2341X_ENC_SET_FRAME_SIZE, 2, 0, dev->ts1.height, dev->ts1.width); dev->cxhdl.width = dev->ts1.width; dev->cxhdl.height = dev->ts1.height; dev->cxhdl.is_50hz = (dev->encodernorm.id & V4L2_STD_625_50) != 0; cx2341x_handler_setup(&dev->cxhdl); cx23885_api_cmd(dev, CX2341X_ENC_MISC, 2, 0, 3, 1); cx23885_api_cmd(dev, CX2341X_ENC_MISC, 2, 0, 4, 1); } static int cx23885_initialize_codec(struct cx23885_dev *dev, int startencoder) { int version; int retval; u32 i, data[7]; dprintk(1, "%s()\n", __func__); retval = cx23885_api_cmd(dev, CX2341X_ENC_PING_FW, 0, 0); /* ping */ if (retval < 0) { dprintk(2, "%s() PING OK\n", __func__); retval = cx23885_load_firmware(dev); if (retval < 0) { printk(KERN_ERR "%s() f/w load failed\n", __func__); return retval; } retval = cx23885_find_mailbox(dev); if (retval < 0) { printk(KERN_ERR "%s() mailbox < 0, error\n", __func__); return -1; } dev->cx23417_mailbox = retval; retval = cx23885_api_cmd(dev, CX2341X_ENC_PING_FW, 0, 0); if (retval < 0) { printk(KERN_ERR "ERROR: cx23417 firmware ping failed!\n"); return -1; } retval = cx23885_api_cmd(dev, CX2341X_ENC_GET_VERSION, 0, 1, &version); if (retval < 0) { printk(KERN_ERR "ERROR: cx23417 firmware get encoder :" "version failed!\n"); return -1; } dprintk(1, "cx23417 firmware version is 0x%08x\n", version); msleep(200); } cx23885_codec_settings(dev); msleep(60); cx23885_api_cmd(dev, CX2341X_ENC_SET_NUM_VSYNC_LINES, 2, 0, CX23885_FIELD1_SAA7115, CX23885_FIELD2_SAA7115); cx23885_api_cmd(dev, CX2341X_ENC_SET_PLACEHOLDER, 12, 0, CX23885_CUSTOM_EXTENSION_USR_DATA, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); /* Setup to capture VBI */ data[0] = 0x0001BD00; data[1] = 1; /* frames per interrupt */ data[2] = 4; /* total bufs */ data[3] = 0x91559155; /* start codes */ data[4] = 0x206080C0; /* stop codes */ data[5] = 6; /* lines */ data[6] = 64; /* BPL */ cx23885_api_cmd(dev, CX2341X_ENC_SET_VBI_CONFIG, 7, 0, data[0], data[1], data[2], data[3], data[4], data[5], data[6]); for (i = 2; i <= 24; i++) { int valid; valid = ((i >= 19) && (i <= 21)); cx23885_api_cmd(dev, CX2341X_ENC_SET_VBI_LINE, 5, 0, i, valid, 0 , 0, 0); cx23885_api_cmd(dev, CX2341X_ENC_SET_VBI_LINE, 5, 0, i | 0x80000000, valid, 0, 0, 0); } cx23885_api_cmd(dev, CX2341X_ENC_MUTE_AUDIO, 1, 0, CX23885_UNMUTE); msleep(60); /* initialize the video input */ cx23885_api_cmd(dev, CX2341X_ENC_INITIALIZE_INPUT, 0, 0); msleep(60); /* Enable VIP style pixel invalidation so we work with scaled mode */ mc417_memory_write(dev, 2120, 0x00000080); /* start capturing to the host interface */ if (startencoder) { cx23885_api_cmd(dev, CX2341X_ENC_START_CAPTURE, 2, 0, CX23885_MPEG_CAPTURE, CX23885_RAW_BITS_NONE); msleep(10); } return 0; } /* ------------------------------------------------------------------ */ static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt, unsigned int *num_buffers, unsigned int *num_planes, unsigned int sizes[], void *alloc_ctxs[]) { struct cx23885_dev *dev = q->drv_priv; dev->ts1.ts_packet_size = mpeglinesize; dev->ts1.ts_packet_count = mpeglines; *num_planes = 1; sizes[0] = mpeglinesize * mpeglines; alloc_ctxs[0] = dev->alloc_ctx; *num_buffers = mpegbufs; return 0; } static int buffer_prepare(struct vb2_buffer *vb) { struct cx23885_dev *dev = vb->vb2_queue->drv_priv; struct cx23885_buffer *buf = container_of(vb, struct cx23885_buffer, vb); return cx23885_buf_prepare(buf, &dev->ts1); } static void buffer_finish(struct vb2_buffer *vb) { struct cx23885_dev *dev = vb->vb2_queue->drv_priv; struct cx23885_buffer *buf = container_of(vb, struct cx23885_buffer, vb); cx23885_free_buffer(dev, buf); } static void buffer_queue(struct vb2_buffer *vb) { struct cx23885_dev *dev = vb->vb2_queue->drv_priv; struct cx23885_buffer *buf = container_of(vb, struct cx23885_buffer, vb); cx23885_buf_queue(&dev->ts1, buf); } static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count) { struct cx23885_dev *dev = q->drv_priv; struct cx23885_dmaqueue *dmaq = &dev->ts1.mpegq; unsigned long flags; int ret; ret = cx23885_initialize_codec(dev, 1); if (ret == 0) { struct cx23885_buffer *buf = list_entry(dmaq->active.next, struct cx23885_buffer, queue); cx23885_start_dma(&dev->ts1, dmaq, buf); return 0; } spin_lock_irqsave(&dev->slock, flags); while (!list_empty(&dmaq->active)) { struct cx23885_buffer *buf = list_entry(dmaq->active.next, struct cx23885_buffer, queue); list_del(&buf->queue); vb2_buffer_done(&buf->vb, VB2_BUF_STATE_QUEUED); } spin_unlock_irqrestore(&dev->slock, flags); return ret; } static void cx23885_stop_streaming(struct vb2_queue *q) { struct cx23885_dev *dev = q->drv_priv; /* stop mpeg capture */ cx23885_api_cmd(dev, CX2341X_ENC_STOP_CAPTURE, 3, 0, CX23885_END_NOW, CX23885_MPEG_CAPTURE, CX23885_RAW_BITS_NONE); msleep(500); cx23885_417_check_encoder(dev); cx23885_cancel_buffers(&dev->ts1); } static struct vb2_ops cx23885_qops = { .queue_setup = queue_setup, .buf_prepare = buffer_prepare, .buf_finish = buffer_finish, .buf_queue = buffer_queue, .wait_prepare = vb2_ops_wait_prepare, .wait_finish = vb2_ops_wait_finish, .start_streaming = cx23885_start_streaming, .stop_streaming = cx23885_stop_streaming, }; /* ------------------------------------------------------------------ */ static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id) { struct cx23885_dev *dev = video_drvdata(file); *id = dev->tvnorm; return 0; } static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id id) { struct cx23885_dev *dev = video_drvdata(file); unsigned int i; int ret; for (i = 0; i < ARRAY_SIZE(cx23885_tvnorms); i++) if (id & cx23885_tvnorms[i].id) break; if (i == ARRAY_SIZE(cx23885_tvnorms)) return -EINVAL; ret = cx23885_set_tvnorm(dev, id); if (!ret) dev->encodernorm = cx23885_tvnorms[i]; return ret; } static int vidioc_enum_input(struct file *file, void *priv, struct v4l2_input *i) { struct cx23885_dev *dev = video_drvdata(file); dprintk(1, "%s()\n", __func__); return cx23885_enum_input(dev, i); } static int vidioc_g_input(struct file *file, void *priv, unsigned int *i) { return cx23885_get_input(file, priv, i); } static int vidioc_s_input(struct file *file, void *priv, unsigned int i) { return cx23885_set_input(file, priv, i); } static int vidioc_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t) { struct cx23885_dev *dev = video_drvdata(file); if (dev->tuner_type == TUNER_ABSENT) return -EINVAL; if (0 != t->index) return -EINVAL; strcpy(t->name, "Television"); call_all(dev, tuner, g_tuner, t); dprintk(1, "VIDIOC_G_TUNER: tuner type %d\n", t->type); return 0; } static int vidioc_s_tuner(struct file *file, void *priv, const struct v4l2_tuner *t) { struct cx23885_dev *dev = video_drvdata(file); if (dev->tuner_type == TUNER_ABSENT) return -EINVAL; /* Update the A/V core */ call_all(dev, tuner, s_tuner, t); return 0; } static int vidioc_g_frequency(struct file *file, void *priv, struct v4l2_frequency *f) { struct cx23885_dev *dev = video_drvdata(file); if (dev->tuner_type == TUNER_ABSENT) return -EINVAL; f->type = V4L2_TUNER_ANALOG_TV; f->frequency = dev->freq; call_all(dev, tuner, g_frequency, f); return 0; } static int vidioc_s_frequency(struct file *file, void *priv, const struct v4l2_frequency *f) { return cx23885_set_frequency(file, priv, f); } static int vidioc_querycap(struct file *file, void *priv, struct v4l2_capability *cap) { struct cx23885_dev *dev = video_drvdata(file); struct cx23885_tsport *tsport = &dev->ts1; strlcpy(cap->driver, dev->name, sizeof(cap->driver)); strlcpy(cap->card, cx23885_boards[tsport->dev->board].name, sizeof(cap->card)); sprintf(cap->bus_info, "PCIe:%s", pci_name(dev->pci)); cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE | V4L2_CAP_STREAMING; if (dev->tuner_type != TUNER_ABSENT) cap->device_caps |= V4L2_CAP_TUNER; cap->capabilities = cap->device_caps | V4L2_CAP_VBI_CAPTURE | V4L2_CAP_AUDIO | V4L2_CAP_DEVICE_CAPS; return 0; } static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv, struct v4l2_fmtdesc *f) { if (f->index != 0) return -EINVAL; strlcpy(f->description, "MPEG", sizeof(f->description)); f->pixelformat = V4L2_PIX_FMT_MPEG; return 0; } static int vidioc_g_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f) { struct cx23885_dev *dev = video_drvdata(file); f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG; f->fmt.pix.bytesperline = 0; f->fmt.pix.sizeimage = dev->ts1.ts_packet_size * dev->ts1.ts_packet_count; f->fmt.pix.colorspace = 0; f->fmt.pix.width = dev->ts1.width; f->fmt.pix.height = dev->ts1.height; f->fmt.pix.field = V4L2_FIELD_INTERLACED; dprintk(1, "VIDIOC_G_FMT: w: %d, h: %d\n", dev->ts1.width, dev->ts1.height); return 0; } static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f) { struct cx23885_dev *dev = video_drvdata(file); f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG; f->fmt.pix.bytesperline = 0; f->fmt.pix.sizeimage = dev->ts1.ts_packet_size * dev->ts1.ts_packet_count; f->fmt.pix.colorspace = 0; f->fmt.pix.field = V4L2_FIELD_INTERLACED; dprintk(1, "VIDIOC_TRY_FMT: w: %d, h: %d\n", dev->ts1.width, dev->ts1.height); return 0; } static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f) { struct cx23885_dev *dev = video_drvdata(file); f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG; f->fmt.pix.bytesperline = 0; f->fmt.pix.sizeimage = dev->ts1.ts_packet_size * dev->ts1.ts_packet_count; f->fmt.pix.colorspace = 0; f->fmt.pix.field = V4L2_FIELD_INTERLACED; dprintk(1, "VIDIOC_S_FMT: w: %d, h: %d, f: %d\n", f->fmt.pix.width, f->fmt.pix.height, f->fmt.pix.field); return 0; } static int vidioc_log_status(struct file *file, void *priv) { struct cx23885_dev *dev = video_drvdata(file); char name[32 + 2]; snprintf(name, sizeof(name), "%s/2", dev->name); call_all(dev, core, log_status); v4l2_ctrl_handler_log_status(&dev->cxhdl.hdl, name); return 0; } static struct v4l2_file_operations mpeg_fops = { .owner = THIS_MODULE, .open = v4l2_fh_open, .release = vb2_fop_release, .read = vb2_fop_read, .poll = vb2_fop_poll, .unlocked_ioctl = video_ioctl2, .mmap = vb2_fop_mmap, }; static const struct v4l2_ioctl_ops mpeg_ioctl_ops = { .vidioc_g_std = vidioc_g_std, .vidioc_s_std = vidioc_s_std, .vidioc_enum_input = vidioc_enum_input, .vidioc_g_input = vidioc_g_input, .vidioc_s_input = vidioc_s_input, .vidioc_g_tuner = vidioc_g_tuner, .vidioc_s_tuner = vidioc_s_tuner, .vidioc_g_frequency = vidioc_g_frequency, .vidioc_s_frequency = vidioc_s_frequency, .vidioc_querycap = vidioc_querycap, .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, .vidioc_reqbufs = vb2_ioctl_reqbufs, .vidioc_prepare_buf = vb2_ioctl_prepare_buf, .vidioc_querybuf = vb2_ioctl_querybuf, .vidioc_qbuf = vb2_ioctl_qbuf, .vidioc_dqbuf = vb2_ioctl_dqbuf, .vidioc_streamon = vb2_ioctl_streamon, .vidioc_streamoff = vb2_ioctl_streamoff, .vidioc_log_status = vidioc_log_status, #ifdef CONFIG_VIDEO_ADV_DEBUG .vidioc_g_chip_info = cx23885_g_chip_info, .vidioc_g_register = cx23885_g_register, .vidioc_s_register = cx23885_s_register, #endif }; static struct video_device cx23885_mpeg_template = { .name = "cx23885", .fops = &mpeg_fops, .ioctl_ops = &mpeg_ioctl_ops, .tvnorms = CX23885_NORMS, }; void cx23885_417_unregister(struct cx23885_dev *dev) { dprintk(1, "%s()\n", __func__); if (dev->v4l_device) { if (video_is_registered(dev->v4l_device)) video_unregister_device(dev->v4l_device); else video_device_release(dev->v4l_device); v4l2_ctrl_handler_free(&dev->cxhdl.hdl); dev->v4l_device = NULL; } } static struct video_device *cx23885_video_dev_alloc( struct cx23885_tsport *tsport, struct pci_dev *pci, struct video_device *template, char *type) { struct video_device *vfd; struct cx23885_dev *dev = tsport->dev; dprintk(1, "%s()\n", __func__); vfd = video_device_alloc(); if (NULL == vfd) return NULL; *vfd = *template; snprintf(vfd->name, sizeof(vfd->name), "%s (%s)", cx23885_boards[tsport->dev->board].name, type); vfd->v4l2_dev = &dev->v4l2_dev; vfd->release = video_device_release; return vfd; } int cx23885_417_register(struct cx23885_dev *dev) { /* FIXME: Port1 hardcoded here */ int err = -ENODEV; struct cx23885_tsport *tsport = &dev->ts1; struct vb2_queue *q; dprintk(1, "%s()\n", __func__); if (cx23885_boards[dev->board].portb != CX23885_MPEG_ENCODER) return err; /* Set default TV standard */ dev->encodernorm = cx23885_tvnorms[0]; if (dev->encodernorm.id & V4L2_STD_525_60) tsport->height = 480; else tsport->height = 576; tsport->width = 720; dev->cxhdl.port = CX2341X_PORT_SERIAL; err = cx2341x_handler_init(&dev->cxhdl, 50); if (err) return err; dev->cxhdl.priv = dev; dev->cxhdl.func = cx23885_api_func; cx2341x_handler_set_50hz(&dev->cxhdl, tsport->height == 576); v4l2_ctrl_add_handler(&dev->ctrl_handler, &dev->cxhdl.hdl, NULL); /* Allocate and initialize V4L video device */ dev->v4l_device = cx23885_video_dev_alloc(tsport, dev->pci, &cx23885_mpeg_template, "mpeg"); q = &dev->vb2_mpegq; q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; q->gfp_flags = GFP_DMA32; q->min_buffers_needed = 2; q->drv_priv = dev; q->buf_struct_size = sizeof(struct cx23885_buffer); q->ops = &cx23885_qops; q->mem_ops = &vb2_dma_sg_memops; q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; q->lock = &dev->lock; err = vb2_queue_init(q); if (err < 0) return err; video_set_drvdata(dev->v4l_device, dev); dev->v4l_device->lock = &dev->lock; dev->v4l_device->queue = q; err = video_register_device(dev->v4l_device, VFL_TYPE_GRABBER, -1); if (err < 0) { printk(KERN_INFO "%s: can't register mpeg device\n", dev->name); return err; } printk(KERN_INFO "%s: registered device %s [mpeg]\n", dev->name, video_device_node_name(dev->v4l_device)); /* ST: Configure the encoder paramaters, but don't begin * encoding, this resolves an issue where the first time the * encoder is started video can be choppy. */ cx23885_initialize_codec(dev, 0); return 0; } MODULE_FIRMWARE(CX23885_FIRM_IMAGE_NAME);