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path: root/kernel/drivers/iio/adc/ad7791.c
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/*
 * AD7787/AD7788/AD7789/AD7790/AD7791 SPI ADC driver
 *
 * Copyright 2012 Analog Devices Inc.
 *  Author: Lars-Peter Clausen <lars@metafoo.de>
 *
 * Licensed under the GPL-2.
 */

#include <linux/interrupt.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/spi/spi.h>
#include <linux/regulator/consumer.h>
#include <linux/err.h>
#include <linux/sched.h>
#include <linux/delay.h>
#include <linux/module.h>

#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/adc/ad_sigma_delta.h>

#include <linux/platform_data/ad7791.h>

#define AD7791_REG_COMM			0x0 /* For writes */
#define AD7791_REG_STATUS		0x0 /* For reads */
#define AD7791_REG_MODE			0x1
#define AD7791_REG_FILTER		0x2
#define AD7791_REG_DATA			0x3

#define AD7791_MODE_CONTINUOUS		0x00
#define AD7791_MODE_SINGLE		0x02
#define AD7791_MODE_POWERDOWN		0x03

#define AD7791_CH_AIN1P_AIN1N		0x00
#define AD7791_CH_AIN2			0x01
#define AD7791_CH_AIN1N_AIN1N		0x02
#define AD7791_CH_AVDD_MONITOR		0x03

#define AD7791_FILTER_CLK_DIV_1		(0x0 << 4)
#define AD7791_FILTER_CLK_DIV_2		(0x1 << 4)
#define AD7791_FILTER_CLK_DIV_4		(0x2 << 4)
#define AD7791_FILTER_CLK_DIV_8		(0x3 << 4)
#define AD7791_FILTER_CLK_MASK		(0x3 << 4)
#define AD7791_FILTER_RATE_120		0x0
#define AD7791_FILTER_RATE_100		0x1
#define AD7791_FILTER_RATE_33_3		0x2
#define AD7791_FILTER_RATE_20		0x3
#define AD7791_FILTER_RATE_16_6		0x4
#define AD7791_FILTER_RATE_16_7		0x5
#define AD7791_FILTER_RATE_13_3		0x6
#define AD7791_FILTER_RATE_9_5		0x7
#define AD7791_FILTER_RATE_MASK		0x7

#define AD7791_MODE_BUFFER		BIT(1)
#define AD7791_MODE_UNIPOLAR		BIT(2)
#define AD7791_MODE_BURNOUT		BIT(3)
#define AD7791_MODE_SEL_MASK		(0x3 << 6)
#define AD7791_MODE_SEL(x)		((x) << 6)

#define DECLARE_AD7787_CHANNELS(name, bits, storagebits) \
const struct iio_chan_spec name[] = { \
	AD_SD_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \
		(bits), (storagebits), 0), \
	AD_SD_CHANNEL(1, 1, AD7791_CH_AIN2, (bits), (storagebits), 0), \
	AD_SD_SHORTED_CHANNEL(2, 0, AD7791_CH_AIN1N_AIN1N, \
		(bits), (storagebits), 0), \
	AD_SD_SUPPLY_CHANNEL(3, 2, AD7791_CH_AVDD_MONITOR,  \
		(bits), (storagebits), 0), \
	IIO_CHAN_SOFT_TIMESTAMP(4), \
}

#define DECLARE_AD7791_CHANNELS(name, bits, storagebits) \
const struct iio_chan_spec name[] = { \
	AD_SD_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \
		(bits), (storagebits), 0), \
	AD_SD_SHORTED_CHANNEL(1, 0, AD7791_CH_AIN1N_AIN1N, \
		(bits), (storagebits), 0), \
	AD_SD_SUPPLY_CHANNEL(2, 1, AD7791_CH_AVDD_MONITOR, \
		(bits), (storagebits), 0), \
	IIO_CHAN_SOFT_TIMESTAMP(3), \
}

static DECLARE_AD7787_CHANNELS(ad7787_channels, 24, 32);
static DECLARE_AD7791_CHANNELS(ad7790_channels, 16, 16);
static DECLARE_AD7791_CHANNELS(ad7791_channels, 24, 32);

enum {
	AD7787,
	AD7788,
	AD7789,
	AD7790,
	AD7791,
};

enum ad7791_chip_info_flags {
	AD7791_FLAG_HAS_FILTER		= (1 << 0),
	AD7791_FLAG_HAS_BUFFER		= (1 << 1),
	AD7791_FLAG_HAS_UNIPOLAR	= (1 << 2),
	AD7791_FLAG_HAS_BURNOUT		= (1 << 3),
};

struct ad7791_chip_info {
	const struct iio_chan_spec *channels;
	unsigned int num_channels;
	enum ad7791_chip_info_flags flags;
};

static const struct ad7791_chip_info ad7791_chip_infos[] = {
	[AD7787] = {
		.channels = ad7787_channels,
		.num_channels = ARRAY_SIZE(ad7787_channels),
		.flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
			AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT,
	},
	[AD7788] = {
		.channels = ad7790_channels,
		.num_channels = ARRAY_SIZE(ad7790_channels),
		.flags = AD7791_FLAG_HAS_UNIPOLAR,
	},
	[AD7789] = {
		.channels = ad7791_channels,
		.num_channels = ARRAY_SIZE(ad7791_channels),
		.flags = AD7791_FLAG_HAS_UNIPOLAR,
	},
	[AD7790] = {
		.channels = ad7790_channels,
		.num_channels = ARRAY_SIZE(ad7790_channels),
		.flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
			AD7791_FLAG_HAS_BURNOUT,
	},
	[AD7791] = {
		.channels = ad7791_channels,
		.num_channels = ARRAY_SIZE(ad7791_channels),
		.flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
			AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT,
	},
};

struct ad7791_state {
	struct ad_sigma_delta sd;
	uint8_t mode;
	uint8_t filter;

	struct regulator *reg;
	const struct ad7791_chip_info *info;
};

static struct ad7791_state *ad_sigma_delta_to_ad7791(struct ad_sigma_delta *sd)
{
	return container_of(sd, struct ad7791_state, sd);
}

static int ad7791_set_channel(struct ad_sigma_delta *sd, unsigned int channel)
{
	ad_sd_set_comm(sd, channel);

	return 0;
}

static int ad7791_set_mode(struct ad_sigma_delta *sd,
	enum ad_sigma_delta_mode mode)
{
	struct ad7791_state *st = ad_sigma_delta_to_ad7791(sd);

	switch (mode) {
	case AD_SD_MODE_CONTINUOUS:
		mode = AD7791_MODE_CONTINUOUS;
		break;
	case AD_SD_MODE_SINGLE:
		mode = AD7791_MODE_SINGLE;
		break;
	case AD_SD_MODE_IDLE:
	case AD_SD_MODE_POWERDOWN:
		mode = AD7791_MODE_POWERDOWN;
		break;
	}

	st->mode &= ~AD7791_MODE_SEL_MASK;
	st->mode |= AD7791_MODE_SEL(mode);

	return ad_sd_write_reg(sd, AD7791_REG_MODE, sizeof(st->mode), st->mode);
}

static const struct ad_sigma_delta_info ad7791_sigma_delta_info = {
	.set_channel = ad7791_set_channel,
	.set_mode = ad7791_set_mode,
	.has_registers = true,
	.addr_shift = 4,
	.read_mask = BIT(3),
};

static int ad7791_read_raw(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan, int *val, int *val2, long info)
{
	struct ad7791_state *st = iio_priv(indio_dev);
	bool unipolar = !!(st->mode & AD7791_MODE_UNIPOLAR);

	switch (info) {
	case IIO_CHAN_INFO_RAW:
		return ad_sigma_delta_single_conversion(indio_dev, chan, val);
	case IIO_CHAN_INFO_OFFSET:
		/**
		 * Unipolar: 0 to VREF
		 * Bipolar -VREF to VREF
		 **/
		if (unipolar)
			*val = 0;
		else
			*val = -(1 << (chan->scan_type.realbits - 1));
		return IIO_VAL_INT;
	case IIO_CHAN_INFO_SCALE:
		/* The monitor channel uses an internal reference. */
		if (chan->address == AD7791_CH_AVDD_MONITOR) {
			/*
			 * The signal is attenuated by a factor of 5 and
			 * compared against a 1.17V internal reference.
			 */
			*val = 1170 * 5;
		} else {
			int voltage_uv;

			voltage_uv = regulator_get_voltage(st->reg);
			if (voltage_uv < 0)
				return voltage_uv;

			*val = voltage_uv / 1000;
		}
		if (unipolar)
			*val2 = chan->scan_type.realbits;
		else
			*val2 = chan->scan_type.realbits - 1;

		return IIO_VAL_FRACTIONAL_LOG2;
	}

	return -EINVAL;
}

static const char * const ad7791_sample_freq_avail[] = {
	[AD7791_FILTER_RATE_120] = "120",
	[AD7791_FILTER_RATE_100] = "100",
	[AD7791_FILTER_RATE_33_3] = "33.3",
	[AD7791_FILTER_RATE_20] = "20",
	[AD7791_FILTER_RATE_16_6] = "16.6",
	[AD7791_FILTER_RATE_16_7] = "16.7",
	[AD7791_FILTER_RATE_13_3] = "13.3",
	[AD7791_FILTER_RATE_9_5] = "9.5",
};

static ssize_t ad7791_read_frequency(struct device *dev,
	struct device_attribute *attr, char *buf)
{
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ad7791_state *st = iio_priv(indio_dev);
	unsigned int rate = st->filter & AD7791_FILTER_RATE_MASK;

	return sprintf(buf, "%s\n", ad7791_sample_freq_avail[rate]);
}

static ssize_t ad7791_write_frequency(struct device *dev,
	struct device_attribute *attr, const char *buf, size_t len)
{
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ad7791_state *st = iio_priv(indio_dev);
	int i, ret;

	mutex_lock(&indio_dev->mlock);
	if (iio_buffer_enabled(indio_dev)) {
		mutex_unlock(&indio_dev->mlock);
		return -EBUSY;
	}
	mutex_unlock(&indio_dev->mlock);

	ret = -EINVAL;

	for (i = 0; i < ARRAY_SIZE(ad7791_sample_freq_avail); i++) {
		if (sysfs_streq(ad7791_sample_freq_avail[i], buf)) {

			mutex_lock(&indio_dev->mlock);
			st->filter &= ~AD7791_FILTER_RATE_MASK;
			st->filter |= i;
			ad_sd_write_reg(&st->sd, AD7791_REG_FILTER,
					 sizeof(st->filter), st->filter);
			mutex_unlock(&indio_dev->mlock);
			ret = 0;
			break;
		}
	}

	return ret ? ret : len;
}

static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
		ad7791_read_frequency,
		ad7791_write_frequency);

static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("120 100 33.3 20 16.7 16.6 13.3 9.5");

static struct attribute *ad7791_attributes[] = {
	&iio_dev_attr_sampling_frequency.dev_attr.attr,
	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
	NULL
};

static const struct attribute_group ad7791_attribute_group = {
	.attrs = ad7791_attributes,
};

static const struct iio_info ad7791_info = {
	.read_raw = &ad7791_read_raw,
	.attrs = &ad7791_attribute_group,
	.validate_trigger = ad_sd_validate_trigger,
	.driver_module = THIS_MODULE,
};

static const struct iio_info ad7791_no_filter_info = {
	.read_raw = &ad7791_read_raw,
	.validate_trigger = ad_sd_validate_trigger,
	.driver_module = THIS_MODULE,
};

static int ad7791_setup(struct ad7791_state *st,
			struct ad7791_platform_data *pdata)
{
	/* Set to poweron-reset default values */
	st->mode = AD7791_MODE_BUFFER;
	st->filter = AD7791_FILTER_RATE_16_6;

	if (!pdata)
		return 0;

	if ((st->info->flags & AD7791_FLAG_HAS_BUFFER) && !pdata->buffered)
		st->mode &= ~AD7791_MODE_BUFFER;

	if ((st->info->flags & AD7791_FLAG_HAS_BURNOUT) &&
		pdata->burnout_current)
		st->mode |= AD7791_MODE_BURNOUT;

	if ((st->info->flags & AD7791_FLAG_HAS_UNIPOLAR) && pdata->unipolar)
		st->mode |= AD7791_MODE_UNIPOLAR;

	return ad_sd_write_reg(&st->sd, AD7791_REG_MODE, sizeof(st->mode),
		st->mode);
}

static int ad7791_probe(struct spi_device *spi)
{
	struct ad7791_platform_data *pdata = spi->dev.platform_data;
	struct iio_dev *indio_dev;
	struct ad7791_state *st;
	int ret;

	if (!spi->irq) {
		dev_err(&spi->dev, "Missing IRQ.\n");
		return -ENXIO;
	}

	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
	if (!indio_dev)
		return -ENOMEM;

	st = iio_priv(indio_dev);

	st->reg = devm_regulator_get(&spi->dev, "refin");
	if (IS_ERR(st->reg))
		return PTR_ERR(st->reg);

	ret = regulator_enable(st->reg);
	if (ret)
		return ret;

	st->info = &ad7791_chip_infos[spi_get_device_id(spi)->driver_data];
	ad_sd_init(&st->sd, indio_dev, spi, &ad7791_sigma_delta_info);

	spi_set_drvdata(spi, indio_dev);

	indio_dev->dev.parent = &spi->dev;
	indio_dev->name = spi_get_device_id(spi)->name;
	indio_dev->modes = INDIO_DIRECT_MODE;
	indio_dev->channels = st->info->channels;
	indio_dev->num_channels = st->info->num_channels;
	if (st->info->flags & AD7791_FLAG_HAS_FILTER)
		indio_dev->info = &ad7791_info;
	else
		indio_dev->info = &ad7791_no_filter_info;

	ret = ad_sd_setup_buffer_and_trigger(indio_dev);
	if (ret)
		goto error_disable_reg;

	ret = ad7791_setup(st, pdata);
	if (ret)
		goto error_remove_trigger;

	ret = iio_device_register(indio_dev);
	if (ret)
		goto error_remove_trigger;

	return 0;

error_remove_trigger:
	ad_sd_cleanup_buffer_and_trigger(indio_dev);
error_disable_reg:
	regulator_disable(st->reg);

	return ret;
}

static int ad7791_remove(struct spi_device *spi)
{
	struct iio_dev *indio_dev = spi_get_drvdata(spi);
	struct ad7791_state *st = iio_priv(indio_dev);

	iio_device_unregister(indio_dev);
	ad_sd_cleanup_buffer_and_trigger(indio_dev);

	regulator_disable(st->reg);

	return 0;
}

static const struct spi_device_id ad7791_spi_ids[] = {
	{ "ad7787", AD7787 },
	{ "ad7788", AD7788 },
	{ "ad7789", AD7789 },
	{ "ad7790", AD7790 },
	{ "ad7791", AD7791 },
	{}
};
MODULE_DEVICE_TABLE(spi, ad7791_spi_ids);

static struct spi_driver ad7791_driver = {
	.driver = {
		.name	= "ad7791",
	},
	.probe		= ad7791_probe,
	.remove		= ad7791_remove,
	.id_table	= ad7791_spi_ids,
};
module_spi_driver(ad7791_driver);

MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
MODULE_DESCRIPTION("Analog Device AD7787/AD7788/AD7789/AD7790/AD7791 ADC driver");
MODULE_LICENSE("GPL v2");
>)) != (FPEXC_EX | FPEXC_FP2V)) goto exit; /* * The barrier() here prevents fpinst2 being read * before the condition above. */ barrier(); trigger = fmrx(FPINST2); emulate: exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs); if (exceptions) vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); exit: preempt_enable(); } static void vfp_enable(void *unused) { u32 access; BUG_ON(preemptible()); access = get_copro_access(); /* * Enable full access to VFP (cp10 and cp11) */ set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11)); } #ifdef CONFIG_CPU_PM static int vfp_pm_suspend(void) { struct thread_info *ti = current_thread_info(); u32 fpexc = fmrx(FPEXC); /* if vfp is on, then save state for resumption */ if (fpexc & FPEXC_EN) { pr_debug("%s: saving vfp state\n", __func__); vfp_save_state(&ti->vfpstate, fpexc); /* disable, just in case */ fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); } else if (vfp_current_hw_state[ti->cpu]) { #ifndef CONFIG_SMP fmxr(FPEXC, fpexc | FPEXC_EN); vfp_save_state(vfp_current_hw_state[ti->cpu], fpexc); fmxr(FPEXC, fpexc); #endif } /* clear any information we had about last context state */ vfp_current_hw_state[ti->cpu] = NULL; return 0; } static void vfp_pm_resume(void) { /* ensure we have access to the vfp */ vfp_enable(NULL); /* and disable it to ensure the next usage restores the state */ fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); } static int vfp_cpu_pm_notifier(struct notifier_block *self, unsigned long cmd, void *v) { switch (cmd) { case CPU_PM_ENTER: vfp_pm_suspend(); break; case CPU_PM_ENTER_FAILED: case CPU_PM_EXIT: vfp_pm_resume(); break; } return NOTIFY_OK; } static struct notifier_block vfp_cpu_pm_notifier_block = { .notifier_call = vfp_cpu_pm_notifier, }; static void vfp_pm_init(void) { cpu_pm_register_notifier(&vfp_cpu_pm_notifier_block); } #else static inline void vfp_pm_init(void) { } #endif /* CONFIG_CPU_PM */ /* * Ensure that the VFP state stored in 'thread->vfpstate' is up to date * with the hardware state. */ void vfp_sync_hwstate(struct thread_info *thread) { unsigned int cpu = get_cpu(); if (vfp_state_in_hw(cpu, thread)) { u32 fpexc = fmrx(FPEXC); /* * Save the last VFP state on this CPU. */ fmxr(FPEXC, fpexc | FPEXC_EN); vfp_save_state(&thread->vfpstate, fpexc | FPEXC_EN); fmxr(FPEXC, fpexc); } put_cpu(); } /* Ensure that the thread reloads the hardware VFP state on the next use. */ void vfp_flush_hwstate(struct thread_info *thread) { unsigned int cpu = get_cpu(); vfp_force_reload(cpu, thread); put_cpu(); } /* * Save the current VFP state into the provided structures and prepare * for entry into a new function (signal handler). */ int vfp_preserve_user_clear_hwstate(struct user_vfp __user *ufp, struct user_vfp_exc __user *ufp_exc) { struct thread_info *thread = current_thread_info(); struct vfp_hard_struct *hwstate = &thread->vfpstate.hard; int err = 0; /* Ensure that the saved hwstate is up-to-date. */ vfp_sync_hwstate(thread); /* * Copy the floating point registers. There can be unused * registers see asm/hwcap.h for details. */ err |= __copy_to_user(&ufp->fpregs, &hwstate->fpregs, sizeof(hwstate->fpregs)); /* * Copy the status and control register. */ __put_user_error(hwstate->fpscr, &ufp->fpscr, err); /* * Copy the exception registers. */ __put_user_error(hwstate->fpexc, &ufp_exc->fpexc, err); __put_user_error(hwstate->fpinst, &ufp_exc->fpinst, err); __put_user_error(hwstate->fpinst2, &ufp_exc->fpinst2, err); if (err) return -EFAULT; /* Ensure that VFP is disabled. */ vfp_flush_hwstate(thread); /* * As per the PCS, clear the length and stride bits for function * entry. */ hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK); return 0; } /* Sanitise and restore the current VFP state from the provided structures. */ int vfp_restore_user_hwstate(struct user_vfp __user *ufp, struct user_vfp_exc __user *ufp_exc) { struct thread_info *thread = current_thread_info(); struct vfp_hard_struct *hwstate = &thread->vfpstate.hard; unsigned long fpexc; int err = 0; /* Disable VFP to avoid corrupting the new thread state. */ vfp_flush_hwstate(thread); /* * Copy the floating point registers. There can be unused * registers see asm/hwcap.h for details. */ err |= __copy_from_user(&hwstate->fpregs, &ufp->fpregs, sizeof(hwstate->fpregs)); /* * Copy the status and control register. */ __get_user_error(hwstate->fpscr, &ufp->fpscr, err); /* * Sanitise and restore the exception registers. */ __get_user_error(fpexc, &ufp_exc->fpexc, err); /* Ensure the VFP is enabled. */ fpexc |= FPEXC_EN; /* Ensure FPINST2 is invalid and the exception flag is cleared. */ fpexc &= ~(FPEXC_EX | FPEXC_FP2V); hwstate->fpexc = fpexc; __get_user_error(hwstate->fpinst, &ufp_exc->fpinst, err); __get_user_error(hwstate->fpinst2, &ufp_exc->fpinst2, err); return err ? -EFAULT : 0; } /* * VFP hardware can lose all context when a CPU goes offline. * As we will be running in SMP mode with CPU hotplug, we will save the * hardware state at every thread switch. We clear our held state when * a CPU has been killed, indicating that the VFP hardware doesn't contain * a threads VFP state. When a CPU starts up, we re-enable access to the * VFP hardware. * * Both CPU_DYING and CPU_STARTING are called on the CPU which * is being offlined/onlined. */ static int vfp_hotplug(struct notifier_block *b, unsigned long action, void *hcpu) { if (action == CPU_DYING || action == CPU_DYING_FROZEN) vfp_current_hw_state[(long)hcpu] = NULL; else if (action == CPU_STARTING || action == CPU_STARTING_FROZEN) vfp_enable(NULL); return NOTIFY_OK; } void vfp_kmode_exception(void) { /* * If we reach this point, a floating point exception has been raised * while running in kernel mode. If the NEON/VFP unit was enabled at the * time, it means a VFP instruction has been issued that requires * software assistance to complete, something which is not currently * supported in kernel mode. * If the NEON/VFP unit was disabled, and the location pointed to below * is properly preceded by a call to kernel_neon_begin(), something has * caused the task to be scheduled out and back in again. In this case, * rebuilding and running with CONFIG_DEBUG_ATOMIC_SLEEP enabled should * be helpful in localizing the problem. */ if (fmrx(FPEXC) & FPEXC_EN) pr_crit("BUG: unsupported FP instruction in kernel mode\n"); else pr_crit("BUG: FP instruction issued in kernel mode with FP unit disabled\n"); } #ifdef CONFIG_KERNEL_MODE_NEON /* * Kernel-side NEON support functions */ void kernel_neon_begin(void) { struct thread_info *thread = current_thread_info(); unsigned int cpu; u32 fpexc; /* * Kernel mode NEON is only allowed outside of interrupt context * with preemption disabled. This will make sure that the kernel * mode NEON register contents never need to be preserved. */ BUG_ON(in_interrupt()); cpu = get_cpu(); fpexc = fmrx(FPEXC) | FPEXC_EN; fmxr(FPEXC, fpexc); /* * Save the userland NEON/VFP state. Under UP, * the owner could be a task other than 'current' */ if (vfp_state_in_hw(cpu, thread)) vfp_save_state(&thread->vfpstate, fpexc); #ifndef CONFIG_SMP else if (vfp_current_hw_state[cpu] != NULL) vfp_save_state(vfp_current_hw_state[cpu], fpexc); #endif vfp_current_hw_state[cpu] = NULL; } EXPORT_SYMBOL(kernel_neon_begin); void kernel_neon_end(void) { /* Disable the NEON/VFP unit. */ fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); put_cpu(); } EXPORT_SYMBOL(kernel_neon_end); #endif /* CONFIG_KERNEL_MODE_NEON */ /* * VFP support code initialisation. */ static int __init vfp_init(void) { unsigned int vfpsid; unsigned int cpu_arch = cpu_architecture(); if (cpu_arch >= CPU_ARCH_ARMv6) on_each_cpu(vfp_enable, NULL, 1); /* * First check that there is a VFP that we can use. * The handler is already setup to just log calls, so * we just need to read the VFPSID register. */ vfp_vector = vfp_testing_entry; barrier(); vfpsid = fmrx(FPSID); barrier(); vfp_vector = vfp_null_entry; pr_info("VFP support v0.3: "); if (VFP_arch) { pr_cont("not present\n"); return 0; /* Extract the architecture on CPUID scheme */ } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) { VFP_arch = vfpsid & FPSID_CPUID_ARCH_MASK; VFP_arch >>= FPSID_ARCH_BIT; /* * Check for the presence of the Advanced SIMD * load/store instructions, integer and single * precision floating point operations. Only check * for NEON if the hardware has the MVFR registers. */ if (IS_ENABLED(CONFIG_NEON) && (fmrx(MVFR1) & 0x000fff00) == 0x00011100) elf_hwcap |= HWCAP_NEON; if (IS_ENABLED(CONFIG_VFPv3)) { u32 mvfr0 = fmrx(MVFR0); if (((mvfr0 & MVFR0_DP_MASK) >> MVFR0_DP_BIT) == 0x2 || ((mvfr0 & MVFR0_SP_MASK) >> MVFR0_SP_BIT) == 0x2) { elf_hwcap |= HWCAP_VFPv3; /* * Check for VFPv3 D16 and VFPv4 D16. CPUs in * this configuration only have 16 x 64bit * registers. */ if ((mvfr0 & MVFR0_A_SIMD_MASK) == 1) /* also v4-D16 */ elf_hwcap |= HWCAP_VFPv3D16; else elf_hwcap |= HWCAP_VFPD32; } if ((fmrx(MVFR1) & 0xf0000000) == 0x10000000) elf_hwcap |= HWCAP_VFPv4; } /* Extract the architecture version on pre-cpuid scheme */ } else { if (vfpsid & FPSID_NODOUBLE) { pr_cont("no double precision support\n"); return 0; } VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; } hotcpu_notifier(vfp_hotplug, 0); vfp_vector = vfp_support_entry; thread_register_notifier(&vfp_notifier_block); vfp_pm_init(); /* * We detected VFP, and the support code is * in place; report VFP support to userspace. */ elf_hwcap |= HWCAP_VFP; pr_cont("implementor %02x architecture %d part %02x variant %x rev %x\n", (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT, VFP_arch, (vfpsid & FPSID_PART_MASK) >> FPSID_PART_BIT, (vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT, (vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT); return 0; } core_initcall(vfp_init);