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/*
 * Copyright 2008 Openmoko, Inc.
 * Copyright 2008 Simtec Electronics
 *      Ben Dooks <ben@simtec.co.uk>
 *      http://armlinux.simtec.co.uk/
 *
 * S3C64XX - GPIO memory port register definitions
 */

#ifndef __MACH_S3C64XX_REGS_GPIO_MEMPORT_H
#define __MACH_S3C64XX_REGS_GPIO_MEMPORT_H __FILE__

#define S3C64XX_MEM0CONSTOP	S3C64XX_GPIOREG(0x1B0)
#define S3C64XX_MEM1CONSTOP	S3C64XX_GPIOREG(0x1B4)

#define S3C64XX_MEM0CONSLP0	S3C64XX_GPIOREG(0x1C0)
#define S3C64XX_MEM0CONSLP1	S3C64XX_GPIOREG(0x1C4)
#define S3C64XX_MEM1CONSLP	S3C64XX_GPIOREG(0x1C8)

#define S3C64XX_MEM0DRVCON	S3C64XX_GPIOREG(0x1D0)
#define S3C64XX_MEM1DRVCON	S3C64XX_GPIOREG(0x1D4)

#endif /* __MACH_S3C64XX_REGS_GPIO_MEMPORT_H */
include "qemu-common.h" #include "exec/gdbstub.h" int m68k_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { M68kCPU *cpu = M68K_CPU(cs); CPUM68KState *env = &cpu->env; if (n < 8) { /* D0-D7 */ return gdb_get_reg32(mem_buf, env->dregs[n]); } else if (n < 16) { /* A0-A7 */ return gdb_get_reg32(mem_buf, env->aregs[n - 8]); } else { switch (n) { case 16: return gdb_get_reg32(mem_buf, env->sr); case 17: return gdb_get_reg32(mem_buf, env->pc); } } /* FP registers not included here because they vary between ColdFire and m68k. Use XML bits for these. */ return 0; } int m68k_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { M68kCPU *cpu = M68K_CPU(cs); CPUM68KState *env = &cpu->env; uint32_t tmp; tmp = ldl_p(mem_buf); if (n < 8) { /* D0-D7 */ env->dregs[n] = tmp; } else if (n < 16) { /* A0-A7 */ env->aregs[n - 8] = tmp; } else { switch (n) { case 16: env->sr = tmp; break; case 17: env->pc = tmp; break; default: return 0; } } return 4; }