summaryrefslogtreecommitdiffstats
path: root/kernel/arch/alpha/lib/ev6-memset.S
blob: 356bb2fdd70567721023b8e0a3fc1d59f2f5d981 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
/*
 * arch/alpha/lib/ev6-memset.S
 *
 * This is an efficient (and relatively small) implementation of the C library
 * "memset()" function for the 21264 implementation of Alpha.
 *
 * 21264 version  contributed by Rick Gorton <rick.gorton@alpha-processor.com>
 *
 * Much of the information about 21264 scheduling/coding comes from:
 *	Compiler Writer's Guide for the Alpha 21264
 *	abbreviated as 'CWG' in other comments here
 *	ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
 * Scheduling notation:
 *	E	- either cluster
 *	U	- upper subcluster; U0 - subcluster U0; U1 - subcluster U1
 *	L	- lower subcluster; L0 - subcluster L0; L1 - subcluster L1
 * The algorithm for the leading and trailing quadwords remains the same,
 * however the loop has been unrolled to enable better memory throughput,
 * and the code has been replicated for each of the entry points: __memset
 * and __memsetw to permit better scheduling to eliminate the stalling
 * encountered during the mask replication.
 * A future enhancement might be to put in a byte store loop for really
 * small (say < 32 bytes) memset()s.  Whether or not that change would be
 * a win in the kernel would depend upon the contextual usage.
 * WARNING: Maintaining this is going to be more work than the above version,
 * as fixes will need to be made in multiple places.  The performance gain
 * is worth it.
 */

	.set noat
	.set noreorder
.text
	.globl memset
	.globl __memset
	.globl ___memset
	.globl __memsetw
	.globl __constant_c_memset

	.ent ___memset
.align 5
___memset:
	.frame $30,0,$26,0
	.prologue 0

	/*
	 * Serious stalling happens.  The only way to mitigate this is to
	 * undertake a major re-write to interleave the constant materialization
	 * with other parts of the fall-through code.  This is important, even
	 * though it makes maintenance tougher.
	 * Do this later.
	 */
	and $17,255,$1		# E : 00000000000000ch
	insbl $17,1,$2		# U : 000000000000ch00
	bis $16,$16,$0		# E : return value
	ble $18,end_b		# U : zero length requested?

	addq $18,$16,$6		# E : max address to write to
	bis	$1,$2,$17	# E : 000000000000chch
	insbl	$1,2,$3		# U : 0000000000ch0000
	insbl	$1,3,$4		# U : 00000000ch000000

	or	$3,$4,$3	# E : 00000000chch0000
	inswl	$17,4,$5	# U : 0000chch00000000
	xor	$16,$6,$1	# E : will complete write be within one quadword?
	inswl	$17,6,$2	# U : chch000000000000

	or	$17,$3,$17	# E : 00000000chchchch
	or	$2,$5,$2	# E : chchchch00000000
	bic	$1,7,$1		# E : fit within a single quadword?
	and	$16,7,$3	# E : Target addr misalignment

	or	$17,$2,$17	# E : chchchchchchchch
	beq	$1,within_quad_b # U :
	nop			# E :
	beq	$3,aligned_b	# U : target is 0mod8

	/*
	 * Target address is misaligned, and won't fit within a quadword
	 */
	ldq_u $4,0($16)		# L : Fetch first partial
	bis $16,$16,$5		# E : Save the address
	insql $17,$16,$2	# U : Insert new bytes
	subq $3,8,$3		# E : Invert (for addressing uses)

	addq $18,$3,$18		# E : $18 is new count ($3 is negative)
	mskql $4,$16,$4		# U : clear relevant parts of the quad
	subq $16,$3,$16		# E : $16 is new aligned destination
	bis $2,$4,$1		# E : Final bytes

	nop
	stq_u $1,0($5)		# L : Store result
	nop
	nop

.align 4
aligned_b:
	/*
	 * We are now guaranteed to be quad aligned, with at least
	 * one partial quad to write.
	 */

	sra $18,3,$3		# U : Number of remaining quads to write
	and $18,7,$18		# E : Number of trailing bytes to write
	bis $16,$16,$5		# E : Save dest address
	beq $3,no_quad_b	# U : tail stuff only

	/*
	 * it's worth the effort to unroll this and use wh64 if possible
	 * Lifted a bunch of code from clear_user.S
	 * At this point, entry values are:
	 * $16	Current destination address
	 * $5	A copy of $16
	 * $6	The max quadword address to write to
	 * $18	Number trailer bytes
	 * $3	Number quads to write
	 */

	and	$16, 0x3f, $2	# E : Forward work (only useful for unrolled loop)
	subq	$3, 16, $4	# E : Only try to unroll if > 128 bytes
	subq	$2, 0x40, $1	# E : bias counter (aligning stuff 0mod64)
	blt	$4, loop_b	# U :

	/*
	 * We know we've got at least 16 quads, minimum of one trip
	 * through unrolled loop.  Do a quad at a time to get us 0mod64
	 * aligned.
	 */

	nop			# E :
	nop			# E :
	nop			# E :
	beq	$1, $bigalign_b	# U :

$alignmod64_b:
	stq	$17, 0($5)	# L :
	subq	$3, 1, $3	# E : For consistency later
	addq	$1, 8, $1	# E : Increment towards zero for alignment
	addq	$5, 8, $4	# E : Initial wh64 address (filler instruction)

	nop
	nop
	addq	$5, 8, $5	# E : Inc address
	blt	$1, $alignmod64_b # U :

$bigalign_b:
	/*
	 * $3 - number quads left to go
	 * $5 - target address (aligned 0mod64)
	 * $17 - mask of stuff to store
	 * Scratch registers available: $7, $2, $4, $1
	 * we know that we'll be taking a minimum of one trip through
 	 * CWG Section 3.7.6: do not expect a sustained store rate of > 1/cycle
	 * Assumes the wh64 needs to be for 2 trips through the loop in the future
	 * The wh64 is issued on for the starting destination address for trip +2
	 * through the loop, and if there are less than two trips left, the target
	 * address will be for the current trip.
	 */

$do_wh64_b:
	wh64	($4)		# L1 : memory subsystem write hint
	subq	$3, 24, $2	# E : For determining future wh64 addresses
	stq	$17, 0($5)	# L :
	nop			# E :

	addq	$5, 128, $4	# E : speculative target of next wh64
	stq	$17, 8($5)	# L :
	stq	$17, 16($5)	# L :
	addq	$5, 64, $7	# E : Fallback address for wh64 (== next trip addr)

	stq	$17, 24($5)	# L :
	stq	$17, 32($5)	# L :
	cmovlt	$2, $7, $4	# E : Latency 2, extra mapping cycle
	nop

	stq	$17, 40($5)	# L :
	stq	$17, 48($5)	# L :
	subq	$3, 16, $2	# E : Repeat the loop at least once more?
	nop

	stq	$17, 56($5)	# L :
	addq	$5, 64, $5	# E :
	subq	$3, 8, $3	# E :
	bge	$2, $do_wh64_b	# U :

	nop
	nop
	nop
	beq	$3, no_quad_b	# U : Might have finished already

.align 4
	/*
	 * Simple loop for trailing quadwords, or for small amounts
	 * of data (where we can't use an unrolled loop and wh64)
	 */
loop_b:
	stq $17,0($5)		# L :
	subq $3,1,$3		# E : Decrement number quads left
	addq $5,8,$5		# E : Inc address
	bne $3,loop_b		# U : more?

no_quad_b:
	/*
	 * Write 0..7 trailing bytes.
	 */
	nop			# E :
	beq $18,end_b		# U : All done?
	ldq $7,0($5)		# L :
	mskqh $7,$6,$2		# U : Mask final quad

	insqh $17,$6,$4		# U : New bits
	bis $2,$4,$1		# E : Put it all together
	stq $1,0($5)		# L : And back to memory
	ret $31,($26),1		# L0 :

within_quad_b:
	ldq_u $1,0($16)		# L :
	insql $17,$16,$2	# U : New bits
	mskql $1,$16,$4		# U : Clear old
	bis $2,$4,$2		# E : New result

	mskql $2,$6,$4		# U :
	mskqh $1,$6,$2		# U :
	bis $2,$4,$1		# E :
	stq_u $1,0($16)		# L :

end_b:
	nop
	nop
	nop
	ret $31,($26),1		# L0 :
	.end ___memset

	/*
	 * This is the original body of code, prior to replication and
	 * rescheduling.  Leave it here, as there may be calls to this
	 * entry point.
	 */
.align 4
	.ent __constant_c_memset
__constant_c_memset:
	.frame $30,0,$26,0
	.prologue 0

	addq $18,$16,$6		# E : max address to write to
	bis $16,$16,$0		# E : return value
	xor $16,$6,$1		# E : will complete write be within one quadword?
	ble $18,end		# U : zero length requested?

	bic $1,7,$1		# E : fit within a single quadword
	beq $1,within_one_quad	# U :
	and $16,7,$3		# E : Target addr misalignment
	beq $3,aligned		# U : target is 0mod8

	/*
	 * Target address is misaligned, and won't fit within a quadword
	 */
	ldq_u $4,0($16)		# L : Fetch first partial
	bis $16,$16,$5		# E : Save the address
	insql $17,$16,$2	# U : Insert new bytes
	subq $3,8,$3		# E : Invert (for addressing uses)

	addq $18,$3,$18		# E : $18 is new count ($3 is negative)
	mskql $4,$16,$4		# U : clear relevant parts of the quad
	subq $16,$3,$16		# E : $16 is new aligned destination
	bis $2,$4,$1		# E : Final bytes

	nop
	stq_u $1,0($5)		# L : Store result
	nop
	nop

.align 4
aligned:
	/*
	 * We are now guaranteed to be quad aligned, with at least
	 * one partial quad to write.
	 */

	sra $18,3,$3		# U : Number of remaining quads to write
	and $18,7,$18		# E : Number of trailing bytes to write
	bis $16,$16,$5		# E : Save dest address
	beq $3,no_quad		# U : tail stuff only

	/*
	 * it's worth the effort to unroll this and use wh64 if possible
	 * Lifted a bunch of code from clear_user.S
	 * At this point, entry values are:
	 * $16	Current destination address
	 * $5	A copy of $16
	 * $6	The max quadword address to write to
	 * $18	Number trailer bytes
	 * $3	Number quads to write
	 */

	and	$16, 0x3f, $2	# E : Forward work (only useful for unrolled loop)
	subq	$3, 16, $4	# E : Only try to unroll if > 128 bytes
	subq	$2, 0x40, $1	# E : bias counter (aligning stuff 0mod64)
	blt	$4, loop	# U :

	/*
	 * We know we've got at least 16 quads, minimum of one trip
	 * through unrolled loop.  Do a quad at a time to get us 0mod64
	 * aligned.
	 */

	nop			# E :
	nop			# E :
	nop			# E :
	beq	$1, $bigalign	# U :

$alignmod64:
	stq	$17, 0($5)	# L :
	subq	$3, 1, $3	# E : For consistency later
	addq	$1, 8, $1	# E : Increment towards zero for alignment
	addq	$5, 8, $4	# E : Initial wh64 address (filler instruction)

	nop
	nop
	addq	$5, 8, $5	# E : Inc address
	blt	$1, $alignmod64	# U :

$bigalign:
	/*
	 * $3 - number quads left to go
	 * $5 - target address (aligned 0mod64)
	 * $17 - mask of stuff to store
	 * Scratch registers available: $7, $2, $4, $1
	 * we know that we'll be taking a minimum of one trip through
 	 * CWG Section 3.7.6: do not expect a sustained store rate of > 1/cycle
	 * Assumes the wh64 needs to be for 2 trips through the loop in the future
	 * The wh64 is issued on for the starting destination address for trip +2
	 * through the loop, and if there are less than two trips left, the target
	 * address will be for the current trip.
	 */

$do_wh64:
	wh64	($4)		# L1 : memory subsystem write hint
	subq	$3, 24, $2	# E : For determining future wh64 addresses
	stq	$17, 0($5)	# L :
	nop			# E :

	addq	$5, 128, $4	# E : speculative target of next wh64
	stq	$17, 8($5)	# L :
	stq	$17, 16($5)	# L :
	addq	$5, 64, $7	# E : Fallback address for wh64 (== next trip addr)

	stq	$17, 24($5)	# L :
	stq	$17, 32($5)	# L :
	cmovlt	$2, $7, $4	# E : Latency 2, extra mapping cycle
	nop

	stq	$17, 40($5)	# L :
	stq	$17, 48($5)	# L :
	subq	$3, 16, $2	# E : Repeat the loop at least once more?
	nop

	stq	$17, 56($5)	# L :
	addq	$5, 64, $5	# E :
	subq	$3, 8, $3	# E :
	bge	$2, $do_wh64	# U :

	nop
	nop
	nop
	beq	$3, no_quad	# U : Might have finished already

.align 4
	/*
	 * Simple loop for trailing quadwords, or for small amounts
	 * of data (where we can't use an unrolled loop and wh64)
	 */
loop:
	stq $17,0($5)		# L :
	subq $3,1,$3		# E : Decrement number quads left
	addq $5,8,$5		# E : Inc address
	bne $3,loop		# U : more?

no_quad:
	/*
	 * Write 0..7 trailing bytes.
	 */
	nop			# E :
	beq $18,end		# U : All done?
	ldq $7,0($5)		# L :
	mskqh $7,$6,$2		# U : Mask final quad

	insqh $17,$6,$4		# U : New bits
	bis $2,$4,$1		# E : Put it all together
	stq $1,0($5)		# L : And back to memory
	ret $31,($26),1		# L0 :

within_one_quad:
	ldq_u $1,0($16)		# L :
	insql $17,$16,$2	# U : New bits
	mskql $1,$16,$4		# U : Clear old
	bis $2,$4,$2		# E : New result

	mskql $2,$6,$4		# U :
	mskqh $1,$6,$2		# U :
	bis $2,$4,$1		# E :
	stq_u $1,0($16)		# L :

end:
	nop
	nop
	nop
	ret $31,($26),1		# L0 :
	.end __constant_c_memset

	/*
	 * This is a replicant of the __constant_c_memset code, rescheduled
	 * to mask stalls.  Note that entry point names also had to change
	 */
	.align 5
	.ent __memsetw

__memsetw:
	.frame $30,0,$26,0
	.prologue 0

	inswl $17,0,$5		# U : 000000000000c1c2
	inswl $17,2,$2		# U : 00000000c1c20000
	bis $16,$16,$0		# E : return value
	addq	$18,$16,$6	# E : max address to write to

	ble $18, end_w		# U : zero length requested?
	inswl	$17,4,$3	# U : 0000c1c200000000
	inswl	$17,6,$4	# U : c1c2000000000000
	xor	$16,$6,$1	# E : will complete write be within one quadword?

	or	$2,$5,$2	# E : 00000000c1c2c1c2
	or	$3,$4,$17	# E : c1c2c1c200000000
	bic	$1,7,$1		# E : fit within a single quadword
	and	$16,7,$3	# E : Target addr misalignment

	or	$17,$2,$17	# E : c1c2c1c2c1c2c1c2
	beq $1,within_quad_w	# U :
	nop
	beq $3,aligned_w	# U : target is 0mod8

	/*
	 * Target address is misaligned, and won't fit within a quadword
	 */
	ldq_u $4,0($16)		# L : Fetch first partial
	bis $16,$16,$5		# E : Save the address
	insql $17,$16,$2	# U : Insert new bytes
	subq $3,8,$3		# E : Invert (for addressing uses)

	addq $18,$3,$18		# E : $18 is new count ($3 is negative)
	mskql $4,$16,$4		# U : clear relevant parts of the quad
	subq $16,$3,$16		# E : $16 is new aligned destination
	bis $2,$4,$1		# E : Final bytes

	nop
	stq_u $1,0($5)		# L : Store result
	nop
	nop

.align 4
aligned_w:
	/*
	 * We are now guaranteed to be quad aligned, with at least
	 * one partial quad to write.
	 */

	sra $18,3,$3		# U : Number of remaining quads to write
	and $18,7,$18		# E : Number of trailing bytes to write
	bis $16,$16,$5		# E : Save dest address
	beq $3,no_quad_w	# U : tail stuff only

	/*
	 * it's worth the effort to unroll this and use wh64 if possible
	 * Lifted a bunch of code from clear_user.S
	 * At this point, entry values are:
	 * $16	Current destination address
	 * $5	A copy of $16
	 * $6	The max quadword address to write to
	 * $18	Number trailer bytes
	 * $3	Number quads to write
	 */

	and	$16, 0x3f, $2	# E : Forward work (only useful for unrolled loop)
	subq	$3, 16, $4	# E : Only try to unroll if > 128 bytes
	subq	$2, 0x40, $1	# E : bias counter (aligning stuff 0mod64)
	blt	$4, loop_w	# U :

	/*
	 * We know we've got at least 16 quads, minimum of one trip
	 * through unrolled loop.  Do a quad at a time to get us 0mod64
	 * aligned.
	 */

	nop			# E :
	nop			# E :
	nop			# E :
	beq	$1, $bigalign_w	# U :

$alignmod64_w:
	stq	$17, 0($5)	# L :
	subq	$3, 1, $3	# E : For consistency later
	addq	$1, 8, $1	# E : Increment towards zero for alignment
	addq	$5, 8, $4	# E : Initial wh64 address (filler instruction)

	nop
	nop
	addq	$5, 8, $5	# E : Inc address
	blt	$1, $alignmod64_w	# U :

$bigalign_w:
	/*
	 * $3 - number quads left to go
	 * $5 - target address (aligned 0mod64)
	 * $17 - mask of stuff to store
	 * Scratch registers available: $7, $2, $4, $1
	 * we know that we'll be taking a minimum of one trip through
 	 * CWG Section 3.7.6: do not expect a sustained store rate of > 1/cycle
	 * Assumes the wh64 needs to be for 2 trips through the loop in the future
	 * The wh64 is issued on for the starting destination address for trip +2
	 * through the loop, and if there are less than two trips left, the target
	 * address will be for the current trip.
	 */

$do_wh64_w:
	wh64	($4)		# L1 : memory subsystem write hint
	subq	$3, 24, $2	# E : For determining future wh64 addresses
	stq	$17, 0($5)	# L :
	nop			# E :

	addq	$5, 128, $4	# E : speculative target of next wh64
	stq	$17, 8($5)	# L :
	stq	$17, 16($5)	# L :
	addq	$5, 64, $7	# E : Fallback address for wh64 (== next trip addr)

	stq	$17, 24($5)	# L :
	stq	$17, 32($5)	# L :
	cmovlt	$2, $7, $4	# E : Latency 2, extra mapping cycle
	nop

	stq	$17, 40($5)	# L :
	stq	$17, 48($5)	# L :
	subq	$3, 16, $2	# E : Repeat the loop at least once more?
	nop

	stq	$17, 56($5)	# L :
	addq	$5, 64, $5	# E :
	subq	$3, 8, $3	# E :
	bge	$2, $do_wh64_w	# U :

	nop
	nop
	nop
	beq	$3, no_quad_w	# U : Might have finished already

.align 4
	/*
	 * Simple loop for trailing quadwords, or for small amounts
	 * of data (where we can't use an unrolled loop and wh64)
	 */
loop_w:
	stq $17,0($5)		# L :
	subq $3,1,$3		# E : Decrement number quads left
	addq $5,8,$5		# E : Inc address
	bne $3,loop_w		# U : more?

no_quad_w:
	/*
	 * Write 0..7 trailing bytes.
	 */
	nop			# E :
	beq $18,end_w		# U : All done?
	ldq $7,0($5)		# L :
	mskqh $7,$6,$2		# U : Mask final quad

	insqh $17,$6,$4		# U : New bits
	bis $2,$4,$1		# E : Put it all together
	stq $1,0($5)		# L : And back to memory
	ret $31,($26),1		# L0 :

within_quad_w:
	ldq_u $1,0($16)		# L :
	insql $17,$16,$2	# U : New bits
	mskql $1,$16,$4		# U : Clear old
	bis $2,$4,$2		# E : New result

	mskql $2,$6,$4		# U :
	mskqh $1,$6,$2		# U :
	bis $2,$4,$1		# E :
	stq_u $1,0($16)		# L :

end_w:
	nop
	nop
	nop
	ret $31,($26),1		# L0 :

	.end __memsetw

memset = ___memset
__memset = ___memset