summaryrefslogtreecommitdiffstats
path: root/kernel/Documentation/devicetree/bindings/powerpc/fsl/fman.txt
blob: edda55f7400415a41d70efc9ecc9245d0cc60996 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
=============================================================================
Freescale Frame Manager Device Bindings

CONTENTS
  - FMan Node
  - FMan Port Node
  - FMan MURAM Node
  - FMan dTSEC/XGEC/mEMAC Node
  - FMan IEEE 1588 Node
  - FMan MDIO Node
  - Example

=============================================================================
FMan Node

DESCRIPTION

Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
etc.) the FMan node will have child nodes for each of them.

PROPERTIES

- compatible
		Usage: required
		Value type: <stringlist>
		Definition: Must include "fsl,fman"
		FMan version can be determined via FM_IP_REV_1 register in the
		FMan block. The offset is 0xc4 from the beginning of the
		Frame Processing Manager memory map (0xc3000 from the
		beginning of the FMan node).

- cell-index
		Usage: required
		Value type: <u32>
		Definition: Specifies the index of the FMan unit.

		The cell-index value may be used by the SoC, to identify the
		FMan unit in the SoC memory map. In the table bellow,
		there's a description of the cell-index use in each SoC:

		- P1023:
		register[bit]			FMan unit	cell-index
		============================================================
		DEVDISR[1]			1		0

		- P2041, P3041, P4080 P5020, P5040:
		register[bit]			FMan unit	cell-index
		============================================================
		DCFG_DEVDISR2[6]		1		0
		DCFG_DEVDISR2[14]		2		1
			(Second FM available only in P4080 and P5040)

		- B4860, T1040, T2080, T4240:
		register[bit]			FMan unit	cell-index
		============================================================
		DCFG_CCSR_DEVDISR2[24]		1		0
		DCFG_CCSR_DEVDISR2[25]		2		1
			(Second FM available only in T4240)

		DEVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in
		the specific SoC "Device Configuration/Pin Control" Memory
		Map.

- reg
		Usage: required
		Value type: <prop-encoded-array>
		Definition: A standard property. Specifies the offset of the
		following configuration registers:
		- BMI configuration registers.
		- QMI configuration registers.
		- DMA configuration registers.
		- FPM configuration registers.
		- FMan controller configuration registers.

- ranges
		Usage: required
		Value type: <prop-encoded-array>
		Definition: A standard property.

- clocks
		Usage: required
		Value type: <prop-encoded-array>
		Definition: phandle for the fman input clock.

- clock-names
		usage: required
		Value type: <stringlist>
		Definition: "fmanclk" for the fman input clock.

- interrupts
		Usage: required
		Value type: <prop-encoded-array>
		Definition: A pair of IRQs are specified in this property.
		The first element is associated with the event interrupts and
		the second element is associated with the error interrupts.

- fsl,qman-channel-range
		Usage: required
		Value type: <prop-encoded-array>
		Definition: Specifies the range of the available dedicated
		channels in the FMan. The first cell specifies the beginning
		of the range and the second cell specifies the number of
		channels.
		Further information available at:
		"Work Queue (WQ) Channel Assignments in the QMan" section
		in DPAA Reference Manual.

- fsl,qman
- fsl,bman
		Usage: required
		Definition: See soc/fsl/qman.txt and soc/fsl/bman.txt

=============================================================================
FMan MURAM Node

DESCRIPTION

FMan Internal memory - shared between all the FMan modules.
It contains data structures that are common and written to or read by
the modules.
FMan internal memory is split into the following parts:
	Packet buffering (Tx/Rx FIFOs)
	Frames internal context

PROPERTIES

- compatible
		Usage: required
		Value type: <stringlist>
		Definition: Must include "fsl,fman-muram"

- ranges
		Usage: required
		Value type: <prop-encoded-array>
		Definition: A standard property.
		Specifies the multi-user memory offset and the size within
		the FMan.

EXAMPLE

muram@0 {
	compatible = "fsl,fman-muram";
	ranges = <0 0x000000 0x28000>;
};

=============================================================================
FMan Port Node

DESCRIPTION

The Frame Manager (FMan) supports several types of hardware ports:
	Ethernet receiver (RX)
	Ethernet transmitter (TX)
	Offline/Host command (O/H)

PROPERTIES

- compatible
		Usage: required
		Value type: <stringlist>
		Definition: A standard property.
		Must include one of the following:
			- "fsl,fman-v2-port-oh" for FManV2 OH ports
			- "fsl,fman-v2-port-rx" for FManV2 RX ports
			- "fsl,fman-v2-port-tx" for FManV2 TX ports
			- "fsl,fman-v3-port-oh" for FManV3 OH ports
			- "fsl,fman-v3-port-rx" for FManV3 RX ports
			- "fsl,fman-v3-port-tx" for FManV3 TX ports

- cell-index
		Usage: required
		Value type: <u32>
		Definition: Specifies the hardware port id.
		Each hardware port on the FMan has its own hardware PortID.
		Super set of all hardware Port IDs available at FMan Reference
		Manual under "FMan Hardware Ports in Freescale Devices" table.

		Each hardware port is assigned a 4KB, port-specific page in
		the FMan hardware port memory region (which is part of the
		FMan memory map). The first 4 KB in the FMan hardware ports
		memory region is used for what are called common registers.
		The subsequent 63 4KB pages are allocated to the hardware
		ports.
		The page of a specific port is determined by the cell-index.

- reg
		Usage: required
		Value type: <prop-encoded-array>
		Definition: There is one reg region describing the port
		configuration registers.

EXAMPLE

port@a8000 {
	cell-index = <0x28>;
	compatible = "fsl,fman-v2-port-tx";
	reg = <0xa8000 0x1000>;
};

port@88000 {
	cell-index = <0x8>;
	compatible = "fsl,fman-v2-port-rx";
	reg = <0x88000 0x1000>;
};

port@81000 {
	cell-index = <0x1>;
	compatible = "fsl,fman-v2-port-oh";
	reg = <0x81000 0x1000>;
};

=============================================================================
FMan dTSEC/XGEC/mEMAC Node

DESCRIPTION

mEMAC/dTSEC/XGEC are the Ethernet network interfaces

PROPERTIES

- compatible
		Usage: required
		Value type: <stringlist>
		Definition: A standard property.
		Must include one of the following:
		- "fsl,fman-dtsec" for dTSEC MAC
		- "fsl,fman-xgec" for XGEC MAC
		- "fsl,fman-memac for mEMAC MAC

- cell-index
		Usage: required
		Value type: <u32>
		Definition: Specifies the MAC id.

		The cell-index value may be used by the FMan or the SoC, to
		identify the MAC unit in the FMan (or SoC) memory map.
		In the tables bellow there's a description of the cell-index
		use, there are two tables, one describes the use of cell-index
		by the FMan, the second describes the use by the SoC:

		1. FMan Registers

		FManV2:
		register[bit]		MAC		cell-index
		============================================================
		FM_EPI[16]		XGEC		8
		FM_EPI[16+n]		dTSECn		n-1
		FM_NPI[11+n]		dTSECn		n-1
			n = 1,..,5

		FManV3:
		register[bit]		MAC		cell-index
		============================================================
		FM_EPI[16+n]		mEMACn		n-1
		FM_EPI[25]		mEMAC10		9

		FM_NPI[11+n]		mEMACn		n-1
		FM_NPI[10]		mEMAC10		9
		FM_NPI[11]		mEMAC9		8
			n = 1,..8

		FM_EPI and FM_NPI are located in the FMan memory map.

		2. SoC registers:

		- P2041, P3041, P4080 P5020, P5040:
		register[bit]		FMan		MAC		cell
					Unit				index
		============================================================
		DCFG_DEVDISR2[7]	1		XGEC		8
		DCFG_DEVDISR2[7+n]	1		dTSECn		n-1
		DCFG_DEVDISR2[15]	2		XGEC		8
		DCFG_DEVDISR2[15+n]	2		dTSECn		n-1
			n = 1,..5

		- T1040, T2080, T4240, B4860:
		register[bit]			FMan	MAC		cell
						Unit			index
		============================================================
		DCFG_CCSR_DEVDISR2[n-1]		1	mEMACn		n-1
		DCFG_CCSR_DEVDISR2[11+n]	2	mEMACn		n-1
			n = 1,..6,9,10

		EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in
		the specific SoC "Device Configuration/Pin Control" Memory
		Map.

- reg
		Usage: required
		Value type: <prop-encoded-array>
		Definition: A standard property.

- fsl,fman-ports
		Usage: required
		Value type: <prop-encoded-array>
		Definition: An array of two phandles - the first references is
		the FMan RX port and the second is the TX port used by this
		MAC.

- ptp-timer
		Usage required
		Value type: <phandle>
		Definition: A phandle for 1EEE1588 timer.

EXAMPLE

fman1_tx28: port@a8000 {
	cell-index = <0x28>;
	compatible = "fsl,fman-v2-port-tx";
	reg = <0xa8000 0x1000>;
};

fman1_rx8: port@88000 {
	cell-index = <0x8>;
	compatible = "fsl,fman-v2-port-rx";
	reg = <0x88000 0x1000>;
};

ptp-timer: ptp_timer@fe000 {
	compatible = "fsl,fman-ptp-timer";
	reg = <0xfe000 0x1000>;
};

ethernet@e0000 {
	compatible = "fsl,fman-dtsec";
	cell-index = <0>;
	reg = <0xe0000 0x1000>;
	fsl,fman-ports = <&fman1_rx8 &fman1_tx28>;
	ptp-timer = <&ptp-timer>;
};

============================================================================
FMan IEEE 1588 Node

DESCRIPTION

The FMan interface to support IEEE 1588


PROPERTIES

- compatible
		Usage: required
		Value type: <stringlist>
		Definition: A standard property.
		Must include "fsl,fman-ptp-timer".

- reg
		Usage: required
		Value type: <prop-encoded-array>
		Definition: A standard property.

EXAMPLE

ptp-timer@fe000 {
	compatible = "fsl,fman-ptp-timer";
	reg = <0xfe000 0x1000>;
};

=============================================================================
FMan MDIO Node

DESCRIPTION

The MDIO is a bus to which the PHY devices are connected.

PROPERTIES

- compatible
		Usage: required
		Value type: <stringlist>
		Definition: A standard property.
		Must include "fsl,fman-mdio" for 1 Gb/s MDIO from FMan v2.
		Must include "fsl,fman-xmdio" for 10 Gb/s MDIO from FMan v2.
		Must include "fsl,fman-memac-mdio" for 1/10 Gb/s MDIO from
		FMan v3.

- reg
		Usage: required
		Value type: <prop-encoded-array>
		Definition: A standard property.

- bus-frequency
		Usage: optional
		Value type: <u32>
		Definition: Specifies the external MDIO bus clock speed to
		be used, if different from the standard 2.5 MHz.
		This may be due to the standard speed being unsupported (e.g.
		due to a hardware problem), or to advertise that all relevant
		components in the system support a faster speed.

- interrupts
		Usage: required for external MDIO
		Value type: <prop-encoded-array>
		Definition: Event interrupt of external MDIO controller.

- fsl,fman-internal-mdio
		Usage: required for internal MDIO
		Value type: boolean
		Definition: Fman has internal MDIO for internal PCS(Physical
		Coding Sublayer) PHYs and external MDIO for external PHYs.
		The settings and programming routines for internal/external
		MDIO are different. Must be included for internal MDIO.

EXAMPLE

Example for FMan v2 external MDIO:

mdio@f1000 {
	compatible = "fsl,fman-xmdio";
	reg = <0xf1000 0x1000>;
	interrupts = <101 2 0 0>;
};

Example for FMan v3 internal MDIO:

mdio@f1000 {
	compatible = "fsl,fman-memac-mdio";
	reg = <0xf1000 0x1000>;
	fsl,fman-internal-mdio;
};

=============================================================================
Example

fman@400000 {
	#address-cells = <1>;
	#size-cells = <1>;
	cell-index = <1>;
	compatible = "fsl,fman"
	ranges = <0 0x400000 0x100000>;
	reg = <0x400000 0x100000>;
	clocks = <&fman_clk>;
	clock-names = "fmanclk";
	interrupts = <
		96 2 0 0
		16 2 1 1>;
	fsl,qman-channel-range = <0x40 0xc>;

	muram@0 {
		compatible = "fsl,fman-muram";
		reg = <0x0 0x28000>;
	};

	port@81000 {
		cell-index = <1>;
		compatible = "fsl,fman-v2-port-oh";
		reg = <0x81000 0x1000>;
	};

	port@82000 {
		cell-index = <2>;
		compatible = "fsl,fman-v2-port-oh";
		reg = <0x82000 0x1000>;
	};

	port@83000 {
		cell-index = <3>;
		compatible = "fsl,fman-v2-port-oh";
		reg = <0x83000 0x1000>;
	};

	port@84000 {
		cell-index = <4>;
		compatible = "fsl,fman-v2-port-oh";
		reg = <0x84000 0x1000>;
	};

	port@85000 {
		cell-index = <5>;
		compatible = "fsl,fman-v2-port-oh";
		reg = <0x85000 0x1000>;
	};

	port@86000 {
		cell-index = <6>;
		compatible = "fsl,fman-v2-port-oh";
		reg = <0x86000 0x1000>;
	};

	fman1_rx_0x8: port@88000 {
		cell-index = <0x8>;
		compatible = "fsl,fman-v2-port-rx";
		reg = <0x88000 0x1000>;
	};

	fman1_rx_0x9: port@89000 {
		cell-index = <0x9>;
		compatible = "fsl,fman-v2-port-rx";
		reg = <0x89000 0x1000>;
	};

	fman1_rx_0xa: port@8a000 {
		cell-index = <0xa>;
		compatible = "fsl,fman-v2-port-rx";
		reg = <0x8a000 0x1000>;
	};

	fman1_rx_0xb: port@8b000 {
		cell-index = <0xb>;
		compatible = "fsl,fman-v2-port-rx";
		reg = <0x8b000 0x1000>;
	};

	fman1_rx_0xc: port@8c000 {
		cell-index = <0xc>;
		compatible = "fsl,fman-v2-port-rx";
		reg = <0x8c000 0x1000>;
	};

	fman1_rx_0x10: port@90000 {
		cell-index = <0x10>;
		compatible = "fsl,fman-v2-port-rx";
		reg = <0x90000 0x1000>;
	};

	fman1_tx_0x28: port@a8000 {
		cell-index = <0x28>;
		compatible = "fsl,fman-v2-port-tx";
		reg = <0xa8000 0x1000>;
	};

	fman1_tx_0x29: port@a9000 {
		cell-index = <0x29>;
		compatible = "fsl,fman-v2-port-tx";
		reg = <0xa9000 0x1000>;
	};

	fman1_tx_0x2a: port@aa000 {
		cell-index = <0x2a>;
		compatible = "fsl,fman-v2-port-tx";
		reg = <0xaa000 0x1000>;
	};

	fman1_tx_0x2b: port@ab000 {
		cell-index = <0x2b>;
		compatible = "fsl,fman-v2-port-tx";
		reg = <0xab000 0x1000>;
	};

	fman1_tx_0x2c: port@ac0000 {
		cell-index = <0x2c>;
		compatible = "fsl,fman-v2-port-tx";
		reg = <0xac000 0x1000>;
	};

	fman1_tx_0x30: port@b0000 {
		cell-index = <0x30>;
		compatible = "fsl,fman-v2-port-tx";
		reg = <0xb0000 0x1000>;
	};

	ethernet@e0000 {
		compatible = "fsl,fman-dtsec";
		cell-index = <0>;
		reg = <0xe0000 0x1000>;
		fsl,fman-ports = <&fman1_rx_0x8 &fman1_tx_0x28>;
	};

	ethernet@e2000 {
		compatible = "fsl,fman-dtsec";
		cell-index = <1>;
		reg = <0xe2000 0x1000>;
		fsl,fman-ports = <&fman1_rx_0x9 &fman1_tx_0x29>;
	};

	ethernet@e4000 {
		compatible = "fsl,fman-dtsec";
		cell-index = <2>;
		reg = <0xe4000 0x1000>;
		fsl,fman-ports = <&fman1_rx_0xa &fman1_tx_0x2a>;
	};

	ethernet@e6000 {
		compatible = "fsl,fman-dtsec";
		cell-index = <3>;
		reg = <0xe6000 0x1000>;
		fsl,fman-ports = <&fman1_rx_0xb &fman1_tx_0x2b>;
	};

	ethernet@e8000 {
		compatible = "fsl,fman-dtsec";
		cell-index = <4>;
		reg = <0xf0000 0x1000>;
		fsl,fman-ports = <&fman1_rx_0xc &fman1_tx_0x2c>;

	ethernet@f0000 {
		cell-index = <8>;
		compatible = "fsl,fman-xgec";
		reg = <0xf0000 0x1000>;
		fsl,fman-ports = <&fman1_rx_0x10 &fman1_tx_0x30>;
	};

	ptp-timer@fe000 {
		compatible = "fsl,fman-ptp-timer";
		reg = <0xfe000 0x1000>;
	};

	mdio@f1000 {
		compatible = "fsl,fman-xmdio";
		reg = <0xf1000 0x1000>;
		interrupts = <101 2 0 0>;
	};
};