diff options
Diffstat (limited to 'qemu/roms/u-boot/include/configs/devkit8000.h')
| -rw-r--r-- | qemu/roms/u-boot/include/configs/devkit8000.h | 356 |
1 files changed, 0 insertions, 356 deletions
diff --git a/qemu/roms/u-boot/include/configs/devkit8000.h b/qemu/roms/u-boot/include/configs/devkit8000.h deleted file mode 100644 index 16a00ebe8..000000000 --- a/qemu/roms/u-boot/include/configs/devkit8000.h +++ /dev/null @@ -1,356 +0,0 @@ -/* - * (C) Copyright 2006-2008 - * Texas Instruments. - * Richard Woodruff <r-woodruff2@ti.com> - * Syed Mohammed Khasim <x0khasim@ti.com> - * - * (C) Copyright 2009 - * Frederik Kriewitz <frederik@kriewitz.eu> - * - * Configuration settings for the DevKit8000 board. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* High Level Configuration Options */ -#define CONFIG_OMAP 1 /* in a TI OMAP core */ -#define CONFIG_OMAP34XX 1 /* which is a 34XX */ -#define CONFIG_OMAP3_DEVKIT8000 1 /* working with DevKit8000 */ -#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000 -#define CONFIG_OMAP_GPIO -#define CONFIG_OMAP_COMMON - -/* - * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM - * 64 bytes before this address should be set aside for u-boot.img's - * header. That is 0x800FFFC0--0x80100000 should not be used for any - * other needs. - */ -#define CONFIG_SYS_TEXT_BASE 0x80100000 - -#define CONFIG_SDRC /* The chip has SDRC controller */ - -#include <asm/arch/cpu.h> /* get chip and board defs */ -#include <asm/arch/omap3.h> - -/* Display CPU and Board information */ -#define CONFIG_DISPLAY_CPUINFO 1 -#define CONFIG_DISPLAY_BOARDINFO 1 - -/* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - -#define CONFIG_MISC_INIT_R - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 -#define CONFIG_REVISION_TAG 1 - -#define CONFIG_OF_LIBFDT 1 - -/* Size of malloc() pool */ -#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ - /* Sector */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) - -/* Hardware drivers */ -/* DM9000 */ -#define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_DRIVER_DM9000 1 -#define CONFIG_DM9000_BASE 0x2c000000 -#define DM9000_IO CONFIG_DM9000_BASE -#define DM9000_DATA (CONFIG_DM9000_BASE + 0x400) -#define CONFIG_DM9000_USE_16BIT 1 -#define CONFIG_DM9000_NO_SROM 1 -#undef CONFIG_DM9000_DEBUG - -/* NS16550 Configuration */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ - -/* select serial console configuration */ -#define CONFIG_CONS_INDEX 3 -#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ - 115200} - -/* MMC */ -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_OMAP_HSMMC 1 -#define CONFIG_DOS_PARTITION 1 - -/* I2C */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 -#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 -#define CONFIG_SYS_I2C_OMAP34XX - -/* TWL4030 */ -#define CONFIG_TWL4030_POWER 1 -#define CONFIG_TWL4030_LED 1 - -/* Board NAND Info */ -#define CONFIG_SYS_NO_FLASH /* no NOR flash */ -#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -#define MTDIDS_DEFAULT "nand0=nand" -#define MTDPARTS_DEFAULT "mtdparts=nand:" \ - "512k(x-loader)," \ - "1920k(u-boot)," \ - "128k(u-boot-env)," \ - "4m(kernel)," \ - "-(fs)" - -#define CONFIG_NAND_OMAP_GPMC -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ -#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ - /* to access nand at */ - /* CS0 */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ - /* devices */ -#define CONFIG_JFFS2_NAND -/* nand device jffs2 lives on */ -#define CONFIG_JFFS2_DEV "nand0" -/* start of jffs2 partition */ -#define CONFIG_JFFS2_PART_OFFSET 0x680000 -#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ - /* partition */ - -/* commands to include */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_DHCP /* DHCP support */ -#define CONFIG_CMD_EXT2 /* EXT2 Support */ -#define CONFIG_CMD_FAT /* FAT support */ -#define CONFIG_CMD_I2C /* I2C serial bus support */ -#define CONFIG_CMD_JFFS2 /* JFFS2 Support */ -#define CONFIG_CMD_MMC /* MMC support */ -#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ -#define CONFIG_CMD_NAND /* NAND support */ -#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ - -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ - -/* BOOTP/DHCP options */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_NISDOMAIN -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_DNS -#define CONFIG_BOOTP_DNS2 -#define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_NTPSERVER -#define CONFIG_BOOTP_TIMEOFFSET -#undef CONFIG_BOOTP_VENDOREX - -/* Environment information */ -#define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */ - -#define CONFIG_BOOTDELAY 3 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x82000000\0" \ - "console=ttyO2,115200n8\0" \ - "mmcdev=0\0" \ - "vram=12M\0" \ - "dvimode=1024x768MR-16@60\0" \ - "defaultdisplay=dvi\0" \ - "nfsopts=hard,tcp,rsize=65536,wsize=65536\0" \ - "kernelopts=rw\0" \ - "commonargs=" \ - "setenv bootargs console=${console} " \ - "vram=${vram} " \ - "omapfb.mode=dvi:${dvimode} " \ - "omapdss.def_disp=${defaultdisplay}\0" \ - "mmcargs=" \ - "run commonargs; " \ - "setenv bootargs ${bootargs} " \ - "root=/dev/mmcblk0p2 " \ - "rootwait " \ - "${kernelopts}\0" \ - "nandargs=" \ - "run commonargs; " \ - "setenv bootargs ${bootargs} " \ - "omapfb.mode=dvi:${dvimode} " \ - "omapdss.def_disp=${defaultdisplay} " \ - "root=/dev/mtdblock4 " \ - "rootfstype=jffs2 " \ - "${kernelopts}\0" \ - "netargs=" \ - "run commonargs; " \ - "setenv bootargs ${bootargs} " \ - "root=/dev/nfs " \ - "nfsroot=${serverip}:${rootpath},${nfsopts} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off " \ - "${kernelopts} " \ - "dnsip1=${dnsip} " \ - "dnsip2=${dnsip2}\0" \ - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source ${loadaddr}\0" \ - "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ - "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - "nandboot=echo Booting from nand ...; " \ - "run nandargs; " \ - "nand read ${loadaddr} 280000 400000; " \ - "bootm ${loadaddr}\0" \ - "netboot=echo Booting from network ...; " \ - "dhcp ${loadaddr}; " \ - "run netargs; " \ - "bootm ${loadaddr}\0" \ - "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loaduimage; then " \ - "run mmcboot; " \ - "else run nandboot; " \ - "fi; " \ - "fi; " \ - "else run nandboot; fi\0" - - -#define CONFIG_BOOTCOMMAND "run autoboot" - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#define CONFIG_AUTO_COMPLETE 1 -#define CONFIG_SYS_PROMPT "OMAP3 DevKit8000 # " -#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 128 /* max number of command args */ - -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) - -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - 0x01000000) /* 16MB */ - -#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) - -/* - * OMAP3 has 12 GP timers, they can be driven by the system clock - * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). - * This rate is divided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ - -/* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 - -/* NAND and environment organization */ -#define PISMO1_NAND_SIZE GPMC_SIZE_128M - -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ - -#define CONFIG_ENV_IS_IN_NAND 1 -#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ - -#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - -/* SRAM config */ -#define CONFIG_SYS_SRAM_START 0x40200000 -#define CONFIG_SYS_SRAM_SIZE 0x10000 - -/* Defines for SPL */ -#define CONFIG_SPL -#define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_NAND_SIMPLE - -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBDISK_SUPPORT -#define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_GPIO_SUPPORT -#define CONFIG_SPL_POWER_SUPPORT -#define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_BASE -#define CONFIG_SPL_NAND_DRIVERS -#define CONFIG_SPL_NAND_ECC -#define CONFIG_SPL_MMC_SUPPORT -#define CONFIG_SPL_FAT_SUPPORT -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" -#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" -#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ - -#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK - -#define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/ -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 - -/* NAND boot config */ -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 -#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ - 10, 11, 12, 13} - -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW - -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE - -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000 - -#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ - -/* SPL OS boot options */ -#define CONFIG_SPL_OS_BOOT - -#define CONFIG_CMD_SPL -#define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */ -#define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\ - 0x400000) -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 - -#define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage" -#define CONFIG_SPL_FAT_LOAD_ARGS_NAME "args" - -#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x500 /* address 0xa0000 */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8 /* address 0x1000 */ -#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8 /* 4KB */ - -#define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100) - -#endif /* __CONFIG_H */ |