diff options
Diffstat (limited to 'qemu/roms/u-boot/drivers/usb/eth')
-rw-r--r-- | qemu/roms/u-boot/drivers/usb/eth/Makefile | 12 | ||||
-rw-r--r-- | qemu/roms/u-boot/drivers/usb/eth/asix.c | 700 | ||||
-rw-r--r-- | qemu/roms/u-boot/drivers/usb/eth/mcs7830.c | 812 | ||||
-rw-r--r-- | qemu/roms/u-boot/drivers/usb/eth/smsc95xx.c | 897 | ||||
-rw-r--r-- | qemu/roms/u-boot/drivers/usb/eth/usb_ether.c | 156 |
5 files changed, 2577 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/drivers/usb/eth/Makefile b/qemu/roms/u-boot/drivers/usb/eth/Makefile new file mode 100644 index 000000000..94551c4c0 --- /dev/null +++ b/qemu/roms/u-boot/drivers/usb/eth/Makefile @@ -0,0 +1,12 @@ +# +# Copyright (c) 2011 The Chromium OS Authors. +# SPDX-License-Identifier: GPL-2.0+ +# + +# new USB host ethernet layer dependencies +obj-$(CONFIG_USB_HOST_ETHER) += usb_ether.o +ifdef CONFIG_USB_ETHER_ASIX +obj-y += asix.o +endif +obj-$(CONFIG_USB_ETHER_MCS7830) += mcs7830.o +obj-$(CONFIG_USB_ETHER_SMSC95XX) += smsc95xx.o diff --git a/qemu/roms/u-boot/drivers/usb/eth/asix.c b/qemu/roms/u-boot/drivers/usb/eth/asix.c new file mode 100644 index 000000000..ce133f006 --- /dev/null +++ b/qemu/roms/u-boot/drivers/usb/eth/asix.c @@ -0,0 +1,700 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <usb.h> +#include <linux/mii.h> +#include "usb_ether.h" +#include <malloc.h> + + +/* ASIX AX8817X based USB 2.0 Ethernet Devices */ + +#define AX_CMD_SET_SW_MII 0x06 +#define AX_CMD_READ_MII_REG 0x07 +#define AX_CMD_WRITE_MII_REG 0x08 +#define AX_CMD_SET_HW_MII 0x0a +#define AX_CMD_READ_EEPROM 0x0b +#define AX_CMD_READ_RX_CTL 0x0f +#define AX_CMD_WRITE_RX_CTL 0x10 +#define AX_CMD_WRITE_IPG0 0x12 +#define AX_CMD_READ_NODE_ID 0x13 +#define AX_CMD_WRITE_NODE_ID 0x14 +#define AX_CMD_READ_PHY_ID 0x19 +#define AX_CMD_WRITE_MEDIUM_MODE 0x1b +#define AX_CMD_WRITE_GPIOS 0x1f +#define AX_CMD_SW_RESET 0x20 +#define AX_CMD_SW_PHY_SELECT 0x22 + +#define AX_SWRESET_CLEAR 0x00 +#define AX_SWRESET_PRTE 0x04 +#define AX_SWRESET_PRL 0x08 +#define AX_SWRESET_IPRL 0x20 +#define AX_SWRESET_IPPD 0x40 + +#define AX88772_IPG0_DEFAULT 0x15 +#define AX88772_IPG1_DEFAULT 0x0c +#define AX88772_IPG2_DEFAULT 0x12 + +/* AX88772 & AX88178 Medium Mode Register */ +#define AX_MEDIUM_PF 0x0080 +#define AX_MEDIUM_JFE 0x0040 +#define AX_MEDIUM_TFC 0x0020 +#define AX_MEDIUM_RFC 0x0010 +#define AX_MEDIUM_ENCK 0x0008 +#define AX_MEDIUM_AC 0x0004 +#define AX_MEDIUM_FD 0x0002 +#define AX_MEDIUM_GM 0x0001 +#define AX_MEDIUM_SM 0x1000 +#define AX_MEDIUM_SBP 0x0800 +#define AX_MEDIUM_PS 0x0200 +#define AX_MEDIUM_RE 0x0100 + +#define AX88178_MEDIUM_DEFAULT \ + (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \ + AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \ + AX_MEDIUM_RE) + +#define AX88772_MEDIUM_DEFAULT \ + (AX_MEDIUM_FD | AX_MEDIUM_RFC | \ + AX_MEDIUM_TFC | AX_MEDIUM_PS | \ + AX_MEDIUM_AC | AX_MEDIUM_RE) + +/* AX88772 & AX88178 RX_CTL values */ +#define AX_RX_CTL_SO 0x0080 +#define AX_RX_CTL_AB 0x0008 + +#define AX_DEFAULT_RX_CTL \ + (AX_RX_CTL_SO | AX_RX_CTL_AB) + +/* GPIO 2 toggles */ +#define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */ +#define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */ +#define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */ + +/* local defines */ +#define ASIX_BASE_NAME "asx" +#define USB_CTRL_SET_TIMEOUT 5000 +#define USB_CTRL_GET_TIMEOUT 5000 +#define USB_BULK_SEND_TIMEOUT 5000 +#define USB_BULK_RECV_TIMEOUT 5000 + +#define AX_RX_URB_SIZE 2048 +#define PHY_CONNECT_TIMEOUT 5000 + +/* asix_flags defines */ +#define FLAG_NONE 0 +#define FLAG_TYPE_AX88172 (1U << 0) +#define FLAG_TYPE_AX88772 (1U << 1) +#define FLAG_TYPE_AX88772B (1U << 2) +#define FLAG_EEPROM_MAC (1U << 3) /* initial mac address in eeprom */ + +/* local vars */ +static int curr_eth_dev; /* index for name of next device detected */ + +/* driver private */ +struct asix_private { + int flags; +}; + +/* + * Asix infrastructure commands + */ +static int asix_write_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index, + u16 size, void *data) +{ + int len; + + debug("asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x " + "size=%d\n", cmd, value, index, size); + + len = usb_control_msg( + dev->pusb_dev, + usb_sndctrlpipe(dev->pusb_dev, 0), + cmd, + USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, + value, + index, + data, + size, + USB_CTRL_SET_TIMEOUT); + + return len == size ? 0 : -1; +} + +static int asix_read_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index, + u16 size, void *data) +{ + int len; + + debug("asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", + cmd, value, index, size); + + len = usb_control_msg( + dev->pusb_dev, + usb_rcvctrlpipe(dev->pusb_dev, 0), + cmd, + USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, + value, + index, + data, + size, + USB_CTRL_GET_TIMEOUT); + return len == size ? 0 : -1; +} + +static inline int asix_set_sw_mii(struct ueth_data *dev) +{ + int ret; + + ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL); + if (ret < 0) + debug("Failed to enable software MII access\n"); + return ret; +} + +static inline int asix_set_hw_mii(struct ueth_data *dev) +{ + int ret; + + ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL); + if (ret < 0) + debug("Failed to enable hardware MII access\n"); + return ret; +} + +static int asix_mdio_read(struct ueth_data *dev, int phy_id, int loc) +{ + ALLOC_CACHE_ALIGN_BUFFER(__le16, res, 1); + + asix_set_sw_mii(dev); + asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id, (__u16)loc, 2, res); + asix_set_hw_mii(dev); + + debug("asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n", + phy_id, loc, le16_to_cpu(*res)); + + return le16_to_cpu(*res); +} + +static void +asix_mdio_write(struct ueth_data *dev, int phy_id, int loc, int val) +{ + ALLOC_CACHE_ALIGN_BUFFER(__le16, res, 1); + *res = cpu_to_le16(val); + + debug("asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n", + phy_id, loc, val); + asix_set_sw_mii(dev); + asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, res); + asix_set_hw_mii(dev); +} + +/* + * Asix "high level" commands + */ +static int asix_sw_reset(struct ueth_data *dev, u8 flags) +{ + int ret; + + ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL); + if (ret < 0) + debug("Failed to send software reset: %02x\n", ret); + else + udelay(150 * 1000); + + return ret; +} + +static inline int asix_get_phy_addr(struct ueth_data *dev) +{ + ALLOC_CACHE_ALIGN_BUFFER(u8, buf, 2); + + int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf); + + debug("asix_get_phy_addr()\n"); + + if (ret < 0) { + debug("Error reading PHYID register: %02x\n", ret); + goto out; + } + debug("asix_get_phy_addr() returning 0x%02x%02x\n", buf[0], buf[1]); + ret = buf[1]; + +out: + return ret; +} + +static int asix_write_medium_mode(struct ueth_data *dev, u16 mode) +{ + int ret; + + debug("asix_write_medium_mode() - mode = 0x%04x\n", mode); + ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, + 0, 0, NULL); + if (ret < 0) { + debug("Failed to write Medium Mode mode to 0x%04x: %02x\n", + mode, ret); + } + return ret; +} + +static u16 asix_read_rx_ctl(struct ueth_data *dev) +{ + ALLOC_CACHE_ALIGN_BUFFER(__le16, v, 1); + + int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, v); + + if (ret < 0) + debug("Error reading RX_CTL register: %02x\n", ret); + else + ret = le16_to_cpu(*v); + return ret; +} + +static int asix_write_rx_ctl(struct ueth_data *dev, u16 mode) +{ + int ret; + + debug("asix_write_rx_ctl() - mode = 0x%04x\n", mode); + ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL); + if (ret < 0) { + debug("Failed to write RX_CTL mode to 0x%04x: %02x\n", + mode, ret); + } + return ret; +} + +static int asix_write_gpio(struct ueth_data *dev, u16 value, int sleep) +{ + int ret; + + debug("asix_write_gpio() - value = 0x%04x\n", value); + ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL); + if (ret < 0) { + debug("Failed to write GPIO value 0x%04x: %02x\n", + value, ret); + } + if (sleep) + udelay(sleep * 1000); + + return ret; +} + +static int asix_write_hwaddr(struct eth_device *eth) +{ + struct ueth_data *dev = (struct ueth_data *)eth->priv; + int ret; + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, ETH_ALEN); + + memcpy(buf, eth->enetaddr, ETH_ALEN); + + ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, buf); + if (ret < 0) + debug("Failed to set MAC address: %02x\n", ret); + + return ret; +} + +/* + * mii commands + */ + +/* + * mii_nway_restart - restart NWay (autonegotiation) for this interface + * + * Returns 0 on success, negative on error. + */ +static int mii_nway_restart(struct ueth_data *dev) +{ + int bmcr; + int r = -1; + + /* if autoneg is off, it's an error */ + bmcr = asix_mdio_read(dev, dev->phy_id, MII_BMCR); + + if (bmcr & BMCR_ANENABLE) { + bmcr |= BMCR_ANRESTART; + asix_mdio_write(dev, dev->phy_id, MII_BMCR, bmcr); + r = 0; + } + + return r; +} + +static int asix_read_mac(struct eth_device *eth) +{ + struct ueth_data *dev = (struct ueth_data *)eth->priv; + struct asix_private *priv = (struct asix_private *)dev->dev_priv; + int i; + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, ETH_ALEN); + + if (priv->flags & FLAG_EEPROM_MAC) { + for (i = 0; i < (ETH_ALEN >> 1); i++) { + if (asix_read_cmd(dev, AX_CMD_READ_EEPROM, + 0x04 + i, 0, 2, buf) < 0) { + debug("Failed to read SROM address 04h.\n"); + return -1; + } + memcpy((eth->enetaddr + i * 2), buf, 2); + } + } else { + if (asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf) + < 0) { + debug("Failed to read MAC address.\n"); + return -1; + } + memcpy(eth->enetaddr, buf, ETH_ALEN); + } + + return 0; +} + +static int asix_basic_reset(struct ueth_data *dev) +{ + int embd_phy; + u16 rx_ctl; + + if (asix_write_gpio(dev, + AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5) < 0) + return -1; + + /* 0x10 is the phy id of the embedded 10/100 ethernet phy */ + embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0); + if (asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, + embd_phy, 0, 0, NULL) < 0) { + debug("Select PHY #1 failed\n"); + return -1; + } + + if (asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL) < 0) + return -1; + + if (asix_sw_reset(dev, AX_SWRESET_CLEAR) < 0) + return -1; + + if (embd_phy) { + if (asix_sw_reset(dev, AX_SWRESET_IPRL) < 0) + return -1; + } else { + if (asix_sw_reset(dev, AX_SWRESET_PRTE) < 0) + return -1; + } + + rx_ctl = asix_read_rx_ctl(dev); + debug("RX_CTL is 0x%04x after software reset\n", rx_ctl); + if (asix_write_rx_ctl(dev, 0x0000) < 0) + return -1; + + rx_ctl = asix_read_rx_ctl(dev); + debug("RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl); + + dev->phy_id = asix_get_phy_addr(dev); + if (dev->phy_id < 0) + debug("Failed to read phy id\n"); + + asix_mdio_write(dev, dev->phy_id, MII_BMCR, BMCR_RESET); + asix_mdio_write(dev, dev->phy_id, MII_ADVERTISE, + ADVERTISE_ALL | ADVERTISE_CSMA); + mii_nway_restart(dev); + + if (asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT) < 0) + return -1; + + if (asix_write_cmd(dev, AX_CMD_WRITE_IPG0, + AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT, + AX88772_IPG2_DEFAULT, 0, NULL) < 0) { + debug("Write IPG,IPG1,IPG2 failed\n"); + return -1; + } + + return 0; +} + +/* + * Asix callbacks + */ +static int asix_init(struct eth_device *eth, bd_t *bd) +{ + struct ueth_data *dev = (struct ueth_data *)eth->priv; + int timeout = 0; +#define TIMEOUT_RESOLUTION 50 /* ms */ + int link_detected; + + debug("** %s()\n", __func__); + + if (asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL) < 0) + goto out_err; + + do { + link_detected = asix_mdio_read(dev, dev->phy_id, MII_BMSR) & + BMSR_LSTATUS; + if (!link_detected) { + if (timeout == 0) + printf("Waiting for Ethernet connection... "); + udelay(TIMEOUT_RESOLUTION * 1000); + timeout += TIMEOUT_RESOLUTION; + } + } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT); + if (link_detected) { + if (timeout != 0) + printf("done.\n"); + } else { + printf("unable to connect.\n"); + goto out_err; + } + + return 0; +out_err: + return -1; +} + +static int asix_send(struct eth_device *eth, void *packet, int length) +{ + struct ueth_data *dev = (struct ueth_data *)eth->priv; + int err; + u32 packet_len; + int actual_len; + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg, + PKTSIZE + sizeof(packet_len)); + + debug("** %s(), len %d\n", __func__, length); + + packet_len = (((length) ^ 0x0000ffff) << 16) + (length); + cpu_to_le32s(&packet_len); + + memcpy(msg, &packet_len, sizeof(packet_len)); + memcpy(msg + sizeof(packet_len), (void *)packet, length); + + err = usb_bulk_msg(dev->pusb_dev, + usb_sndbulkpipe(dev->pusb_dev, dev->ep_out), + (void *)msg, + length + sizeof(packet_len), + &actual_len, + USB_BULK_SEND_TIMEOUT); + debug("Tx: len = %u, actual = %u, err = %d\n", + length + sizeof(packet_len), actual_len, err); + + return err; +} + +static int asix_recv(struct eth_device *eth) +{ + struct ueth_data *dev = (struct ueth_data *)eth->priv; + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, recv_buf, AX_RX_URB_SIZE); + unsigned char *buf_ptr; + int err; + int actual_len; + u32 packet_len; + + debug("** %s()\n", __func__); + + err = usb_bulk_msg(dev->pusb_dev, + usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in), + (void *)recv_buf, + AX_RX_URB_SIZE, + &actual_len, + USB_BULK_RECV_TIMEOUT); + debug("Rx: len = %u, actual = %u, err = %d\n", AX_RX_URB_SIZE, + actual_len, err); + if (err != 0) { + debug("Rx: failed to receive\n"); + return -1; + } + if (actual_len > AX_RX_URB_SIZE) { + debug("Rx: received too many bytes %d\n", actual_len); + return -1; + } + + buf_ptr = recv_buf; + while (actual_len > 0) { + /* + * 1st 4 bytes contain the length of the actual data as two + * complementary 16-bit words. Extract the length of the data. + */ + if (actual_len < sizeof(packet_len)) { + debug("Rx: incomplete packet length\n"); + return -1; + } + memcpy(&packet_len, buf_ptr, sizeof(packet_len)); + le32_to_cpus(&packet_len); + if (((~packet_len >> 16) & 0x7ff) != (packet_len & 0x7ff)) { + debug("Rx: malformed packet length: %#x (%#x:%#x)\n", + packet_len, (~packet_len >> 16) & 0x7ff, + packet_len & 0x7ff); + return -1; + } + packet_len = packet_len & 0x7ff; + if (packet_len > actual_len - sizeof(packet_len)) { + debug("Rx: too large packet: %d\n", packet_len); + return -1; + } + + /* Notify net stack */ + NetReceive(buf_ptr + sizeof(packet_len), packet_len); + + /* Adjust for next iteration. Packets are padded to 16-bits */ + if (packet_len & 1) + packet_len++; + actual_len -= sizeof(packet_len) + packet_len; + buf_ptr += sizeof(packet_len) + packet_len; + } + + return err; +} + +static void asix_halt(struct eth_device *eth) +{ + debug("** %s()\n", __func__); +} + +/* + * Asix probing functions + */ +void asix_eth_before_probe(void) +{ + curr_eth_dev = 0; +} + +struct asix_dongle { + unsigned short vendor; + unsigned short product; + int flags; +}; + +static const struct asix_dongle const asix_dongles[] = { + { 0x05ac, 0x1402, FLAG_TYPE_AX88772 }, /* Apple USB Ethernet Adapter */ + { 0x07d1, 0x3c05, FLAG_TYPE_AX88772 }, /* D-Link DUB-E100 H/W Ver B1 */ + { 0x2001, 0x1a02, FLAG_TYPE_AX88772 }, /* D-Link DUB-E100 H/W Ver C1 */ + /* Cables-to-Go USB Ethernet Adapter */ + { 0x0b95, 0x772a, FLAG_TYPE_AX88772 }, + { 0x0b95, 0x7720, FLAG_TYPE_AX88772 }, /* Trendnet TU2-ET100 V3.0R */ + { 0x0b95, 0x1720, FLAG_TYPE_AX88172 }, /* SMC */ + { 0x0db0, 0xa877, FLAG_TYPE_AX88772 }, /* MSI - ASIX 88772a */ + { 0x13b1, 0x0018, FLAG_TYPE_AX88172 }, /* Linksys 200M v2.1 */ + { 0x1557, 0x7720, FLAG_TYPE_AX88772 }, /* 0Q0 cable ethernet */ + /* DLink DUB-E100 H/W Ver B1 Alternate */ + { 0x2001, 0x3c05, FLAG_TYPE_AX88772 }, + /* ASIX 88772B */ + { 0x0b95, 0x772b, FLAG_TYPE_AX88772B | FLAG_EEPROM_MAC }, + { 0x0000, 0x0000, FLAG_NONE } /* END - Do not remove */ +}; + +/* Probe to see if a new device is actually an asix device */ +int asix_eth_probe(struct usb_device *dev, unsigned int ifnum, + struct ueth_data *ss) +{ + struct usb_interface *iface; + struct usb_interface_descriptor *iface_desc; + int ep_in_found = 0, ep_out_found = 0; + int i; + + /* let's examine the device now */ + iface = &dev->config.if_desc[ifnum]; + iface_desc = &dev->config.if_desc[ifnum].desc; + + for (i = 0; asix_dongles[i].vendor != 0; i++) { + if (dev->descriptor.idVendor == asix_dongles[i].vendor && + dev->descriptor.idProduct == asix_dongles[i].product) + /* Found a supported dongle */ + break; + } + + if (asix_dongles[i].vendor == 0) + return 0; + + memset(ss, 0, sizeof(struct ueth_data)); + + /* At this point, we know we've got a live one */ + debug("\n\nUSB Ethernet device detected: %#04x:%#04x\n", + dev->descriptor.idVendor, dev->descriptor.idProduct); + + /* Initialize the ueth_data structure with some useful info */ + ss->ifnum = ifnum; + ss->pusb_dev = dev; + ss->subclass = iface_desc->bInterfaceSubClass; + ss->protocol = iface_desc->bInterfaceProtocol; + + /* alloc driver private */ + ss->dev_priv = calloc(1, sizeof(struct asix_private)); + if (!ss->dev_priv) + return 0; + + ((struct asix_private *)ss->dev_priv)->flags = asix_dongles[i].flags; + + /* + * We are expecting a minimum of 3 endpoints - in, out (bulk), and + * int. We will ignore any others. + */ + for (i = 0; i < iface_desc->bNumEndpoints; i++) { + /* is it an BULK endpoint? */ + if ((iface->ep_desc[i].bmAttributes & + USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) { + u8 ep_addr = iface->ep_desc[i].bEndpointAddress; + if (ep_addr & USB_DIR_IN) { + if (!ep_in_found) { + ss->ep_in = ep_addr & + USB_ENDPOINT_NUMBER_MASK; + ep_in_found = 1; + } + } else { + if (!ep_out_found) { + ss->ep_out = ep_addr & + USB_ENDPOINT_NUMBER_MASK; + ep_out_found = 1; + } + } + } + + /* is it an interrupt endpoint? */ + if ((iface->ep_desc[i].bmAttributes & + USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) { + ss->ep_int = iface->ep_desc[i].bEndpointAddress & + USB_ENDPOINT_NUMBER_MASK; + ss->irqinterval = iface->ep_desc[i].bInterval; + } + } + debug("Endpoints In %d Out %d Int %d\n", + ss->ep_in, ss->ep_out, ss->ep_int); + + /* Do some basic sanity checks, and bail if we find a problem */ + if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) || + !ss->ep_in || !ss->ep_out || !ss->ep_int) { + debug("Problems with device\n"); + return 0; + } + dev->privptr = (void *)ss; + return 1; +} + +int asix_eth_get_info(struct usb_device *dev, struct ueth_data *ss, + struct eth_device *eth) +{ + struct asix_private *priv = (struct asix_private *)ss->dev_priv; + + if (!eth) { + debug("%s: missing parameter.\n", __func__); + return 0; + } + sprintf(eth->name, "%s%d", ASIX_BASE_NAME, curr_eth_dev++); + eth->init = asix_init; + eth->send = asix_send; + eth->recv = asix_recv; + eth->halt = asix_halt; + if (!(priv->flags & FLAG_TYPE_AX88172)) + eth->write_hwaddr = asix_write_hwaddr; + eth->priv = ss; + + if (asix_basic_reset(ss)) + return 0; + + /* Get the MAC address */ + if (asix_read_mac(eth)) + return 0; + debug("MAC %pM\n", eth->enetaddr); + + return 1; +} diff --git a/qemu/roms/u-boot/drivers/usb/eth/mcs7830.c b/qemu/roms/u-boot/drivers/usb/eth/mcs7830.c new file mode 100644 index 000000000..c353286b6 --- /dev/null +++ b/qemu/roms/u-boot/drivers/usb/eth/mcs7830.c @@ -0,0 +1,812 @@ +/* + * Copyright (c) 2013 Gerhard Sittig <gsi@denx.de> + * based on the U-Boot Asix driver as well as information + * from the Linux Moschip driver + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * MOSCHIP MCS7830 based (7730/7830/7832) USB 2.0 Ethernet Devices + */ + +#include <common.h> +#include <errno.h> +#include <linux/mii.h> +#include <malloc.h> +#include <usb.h> + +#include "usb_ether.h" + +#define MCS7830_BASE_NAME "mcs" + +#define USBCALL_TIMEOUT 1000 +#define LINKSTATUS_TIMEOUT 5000 /* link status, connect timeout */ +#define LINKSTATUS_TIMEOUT_RES 50 /* link status, resolution in msec */ + +#define MCS7830_RX_URB_SIZE 2048 + +/* command opcodes */ +#define MCS7830_WR_BREQ 0x0d +#define MCS7830_RD_BREQ 0x0e + +/* register layout, numerical offset specs for USB API calls */ +struct mcs7830_regs { + uint8_t multicast_hashes[8]; + uint8_t packet_gap[2]; + uint8_t phy_data[2]; + uint8_t phy_command[2]; + uint8_t configuration; + uint8_t ether_address[6]; + uint8_t frame_drop_count; + uint8_t pause_threshold; +}; +#define REG_MULTICAST_HASH offsetof(struct mcs7830_regs, multicast_hashes) +#define REG_PHY_DATA offsetof(struct mcs7830_regs, phy_data) +#define REG_PHY_CMD offsetof(struct mcs7830_regs, phy_command) +#define REG_CONFIG offsetof(struct mcs7830_regs, configuration) +#define REG_ETHER_ADDR offsetof(struct mcs7830_regs, ether_address) +#define REG_FRAME_DROP_COUNTER offsetof(struct mcs7830_regs, frame_drop_count) +#define REG_PAUSE_THRESHOLD offsetof(struct mcs7830_regs, pause_threshold) + +/* bit masks and default values for the above registers */ +#define PHY_CMD1_READ 0x40 +#define PHY_CMD1_WRITE 0x20 +#define PHY_CMD1_PHYADDR 0x01 + +#define PHY_CMD2_PEND 0x80 +#define PHY_CMD2_READY 0x40 + +#define CONF_CFG 0x80 +#define CONF_SPEED100 0x40 +#define CONF_FDX_ENABLE 0x20 +#define CONF_RXENABLE 0x10 +#define CONF_TXENABLE 0x08 +#define CONF_SLEEPMODE 0x04 +#define CONF_ALLMULTICAST 0x02 +#define CONF_PROMISCUOUS 0x01 + +#define PAUSE_THRESHOLD_DEFAULT 0 + +/* bit masks for the status byte which follows received ethernet frames */ +#define STAT_RX_FRAME_CORRECT 0x20 +#define STAT_RX_LARGE_FRAME 0x10 +#define STAT_RX_CRC_ERROR 0x08 +#define STAT_RX_ALIGNMENT_ERROR 0x04 +#define STAT_RX_LENGTH_ERROR 0x02 +#define STAT_RX_SHORT_FRAME 0x01 + +/* + * struct mcs7830_private - private driver data for an individual adapter + * @config: shadow for the network adapter's configuration register + * @mchash: shadow for the network adapter's multicast hash registers + */ +struct mcs7830_private { + uint8_t config; + uint8_t mchash[8]; +}; + +/* + * mcs7830_read_reg() - read a register of the network adapter + * @dev: network device to read from + * @idx: index of the register to start reading from + * @size: number of bytes to read + * @data: buffer to read into + * Return: zero upon success, negative upon error + */ +static int mcs7830_read_reg(struct ueth_data *dev, uint8_t idx, + uint16_t size, void *data) +{ + int len; + ALLOC_CACHE_ALIGN_BUFFER(uint8_t, buf, size); + + debug("%s() idx=0x%04X sz=%d\n", __func__, idx, size); + + len = usb_control_msg(dev->pusb_dev, + usb_rcvctrlpipe(dev->pusb_dev, 0), + MCS7830_RD_BREQ, + USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, + 0, idx, buf, size, + USBCALL_TIMEOUT); + if (len != size) { + debug("%s() len=%d != sz=%d\n", __func__, len, size); + return -EIO; + } + memcpy(data, buf, size); + return 0; +} + +/* + * mcs7830_write_reg() - write a register of the network adapter + * @dev: network device to write to + * @idx: index of the register to start writing to + * @size: number of bytes to write + * @data: buffer holding the data to write + * Return: zero upon success, negative upon error + */ +static int mcs7830_write_reg(struct ueth_data *dev, uint8_t idx, + uint16_t size, void *data) +{ + int len; + ALLOC_CACHE_ALIGN_BUFFER(uint8_t, buf, size); + + debug("%s() idx=0x%04X sz=%d\n", __func__, idx, size); + + memcpy(buf, data, size); + len = usb_control_msg(dev->pusb_dev, + usb_sndctrlpipe(dev->pusb_dev, 0), + MCS7830_WR_BREQ, + USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, + 0, idx, buf, size, + USBCALL_TIMEOUT); + if (len != size) { + debug("%s() len=%d != sz=%d\n", __func__, len, size); + return -EIO; + } + return 0; +} + +/* + * mcs7830_phy_emit_wait() - emit PHY read/write access, wait for its execution + * @dev: network device to talk to + * @rwflag: PHY_CMD1_READ or PHY_CMD1_WRITE opcode + * @index: number of the PHY register to read or write + * Return: zero upon success, negative upon error + */ +static int mcs7830_phy_emit_wait(struct ueth_data *dev, + uint8_t rwflag, uint8_t index) +{ + int rc; + int retry; + uint8_t cmd[2]; + + /* send the PHY read/write request */ + cmd[0] = rwflag | PHY_CMD1_PHYADDR; + cmd[1] = PHY_CMD2_PEND | (index & 0x1f); + rc = mcs7830_write_reg(dev, REG_PHY_CMD, sizeof(cmd), cmd); + if (rc < 0) + return rc; + + /* wait for the response to become available (usually < 1ms) */ + retry = 10; + do { + rc = mcs7830_read_reg(dev, REG_PHY_CMD, sizeof(cmd), cmd); + if (rc < 0) + return rc; + if (cmd[1] & PHY_CMD2_READY) + return 0; + if (!retry--) + return -ETIMEDOUT; + mdelay(1); + } while (1); + /* UNREACH */ +} + +/* + * mcs7830_read_phy() - read a PHY register of the network adapter + * @dev: network device to read from + * @index: index of the PHY register to read from + * Return: non-negative 16bit register content, negative upon error + */ +static int mcs7830_read_phy(struct ueth_data *dev, uint8_t index) +{ + int rc; + uint16_t val; + + /* issue the PHY read request and wait for its execution */ + rc = mcs7830_phy_emit_wait(dev, PHY_CMD1_READ, index); + if (rc < 0) + return rc; + + /* fetch the PHY data which was read */ + rc = mcs7830_read_reg(dev, REG_PHY_DATA, sizeof(val), &val); + if (rc < 0) + return rc; + rc = le16_to_cpu(val); + debug("%s(%s, %d) => 0x%04X\n", __func__, dev->eth_dev.name, index, rc); + return rc; +} + +/* + * mcs7830_write_phy() - write a PHY register of the network adapter + * @dev: network device to write to + * @index: index of the PHY register to write to + * @val: value to write to the PHY register + * Return: zero upon success, negative upon error + */ +static int mcs7830_write_phy(struct ueth_data *dev, uint8_t index, uint16_t val) +{ + int rc; + + debug("%s(%s, %d, 0x%04X)\n", __func__, dev->eth_dev.name, index, val); + + /* setup the PHY data which is to get written */ + val = cpu_to_le16(val); + rc = mcs7830_write_reg(dev, REG_PHY_DATA, sizeof(val), &val); + if (rc < 0) + return rc; + + /* issue the PHY write request and wait for its execution */ + rc = mcs7830_phy_emit_wait(dev, PHY_CMD1_WRITE, index); + if (rc < 0) + return rc; + + return 0; +} + +/* + * mcs7830_write_config() - write to the network adapter's config register + * @eth: network device to write to + * Return: zero upon success, negative upon error + * + * the data which gets written is taken from the shadow config register + * within the device driver's private data + */ +static int mcs7830_write_config(struct ueth_data *dev) +{ + struct mcs7830_private *priv; + int rc; + + debug("%s()\n", __func__); + priv = dev->dev_priv; + + rc = mcs7830_write_reg(dev, REG_CONFIG, + sizeof(priv->config), &priv->config); + if (rc < 0) { + debug("writing config to adapter failed\n"); + return rc; + } + + return 0; +} + +/* + * mcs7830_write_mchash() - write the network adapter's multicast filter + * @eth: network device to write to + * Return: zero upon success, negative upon error + * + * the data which gets written is taken from the shadow multicast hashes + * within the device driver's private data + */ +static int mcs7830_write_mchash(struct ueth_data *dev) +{ + struct mcs7830_private *priv; + int rc; + + debug("%s()\n", __func__); + priv = dev->dev_priv; + + rc = mcs7830_write_reg(dev, REG_MULTICAST_HASH, + sizeof(priv->mchash), &priv->mchash); + if (rc < 0) { + debug("writing multicast hash to adapter failed\n"); + return rc; + } + + return 0; +} + +/* + * mcs7830_set_autoneg() - setup and trigger ethernet link autonegotiation + * @eth: network device to run link negotiation on + * Return: zero upon success, negative upon error + * + * the routine advertises available media and starts autonegotiation + */ +static int mcs7830_set_autoneg(struct ueth_data *dev) +{ + int adv, flg; + int rc; + + debug("%s()\n", __func__); + + /* + * algorithm taken from the Linux driver, which took it from + * "the original mcs7830 version 1.4 driver": + * + * enable all media, reset BMCR, enable auto neg, restart + * auto neg while keeping the enable auto neg flag set + */ + + adv = ADVERTISE_PAUSE_CAP | ADVERTISE_ALL | ADVERTISE_CSMA; + rc = mcs7830_write_phy(dev, MII_ADVERTISE, adv); + + flg = 0; + if (!rc) + rc = mcs7830_write_phy(dev, MII_BMCR, flg); + + flg |= BMCR_ANENABLE; + if (!rc) + rc = mcs7830_write_phy(dev, MII_BMCR, flg); + + flg |= BMCR_ANRESTART; + if (!rc) + rc = mcs7830_write_phy(dev, MII_BMCR, flg); + + return rc; +} + +/* + * mcs7830_get_rev() - identify a network adapter's chip revision + * @eth: network device to identify + * Return: non-negative number, reflecting the revision number + * + * currently, only "rev C and higher" and "below rev C" are needed, so + * the return value is #1 for "below rev C", and #2 for "rev C and above" + */ +static int mcs7830_get_rev(struct ueth_data *dev) +{ + uint8_t buf[2]; + int rc; + int rev; + + /* register 22 is readable in rev C and higher */ + rc = mcs7830_read_reg(dev, REG_FRAME_DROP_COUNTER, sizeof(buf), buf); + if (rc < 0) + rev = 1; + else + rev = 2; + debug("%s() rc=%d, rev=%d\n", __func__, rc, rev); + return rev; +} + +/* + * mcs7830_apply_fixup() - identify an adapter and potentially apply fixups + * @eth: network device to identify and apply fixups to + * Return: zero upon success (no errors emitted from here) + * + * this routine identifies the network adapter's chip revision, and applies + * fixups for known issues + */ +static int mcs7830_apply_fixup(struct ueth_data *dev) +{ + int rev; + int i; + uint8_t thr; + + rev = mcs7830_get_rev(dev); + debug("%s() rev=%d\n", __func__, rev); + + /* + * rev C requires setting the pause threshold (the Linux driver + * is inconsistent, the implementation does it for "rev C + * exactly", the introductory comment says "rev C and above") + */ + if (rev == 2) { + debug("%s: applying rev C fixup\n", dev->eth_dev.name); + thr = PAUSE_THRESHOLD_DEFAULT; + for (i = 0; i < 2; i++) { + (void)mcs7830_write_reg(dev, REG_PAUSE_THRESHOLD, + sizeof(thr), &thr); + mdelay(1); + } + } + + return 0; +} + +/* + * mcs7830_basic_reset() - bring the network adapter into a known first state + * @eth: network device to act upon + * Return: zero upon success, negative upon error + * + * this routine initializes the network adapter such that subsequent invocations + * of the interface callbacks can exchange ethernet frames; link negotiation is + * triggered from here already and continues in background + */ +static int mcs7830_basic_reset(struct ueth_data *dev) +{ + struct mcs7830_private *priv; + int rc; + + debug("%s()\n", __func__); + priv = dev->dev_priv; + + /* + * comment from the respective Linux driver, which + * unconditionally sets the ALLMULTICAST flag as well: + * should not be needed, but does not work otherwise + */ + priv->config = CONF_TXENABLE; + priv->config |= CONF_ALLMULTICAST; + + rc = mcs7830_set_autoneg(dev); + if (rc < 0) { + error("setting autoneg failed\n"); + return rc; + } + + rc = mcs7830_write_mchash(dev); + if (rc < 0) { + error("failed to set multicast hash\n"); + return rc; + } + + rc = mcs7830_write_config(dev); + if (rc < 0) { + error("failed to set configuration\n"); + return rc; + } + + rc = mcs7830_apply_fixup(dev); + if (rc < 0) { + error("fixup application failed\n"); + return rc; + } + + return 0; +} + +/* + * mcs7830_read_mac() - read an ethernet adapter's MAC address + * @eth: network device to read from + * Return: zero upon success, negative upon error + * + * this routine fetches the MAC address stored within the ethernet adapter, + * and stores it in the ethernet interface's data structure + */ +static int mcs7830_read_mac(struct eth_device *eth) +{ + struct ueth_data *dev; + int rc; + uint8_t buf[ETH_ALEN]; + + debug("%s()\n", __func__); + dev = eth->priv; + + rc = mcs7830_read_reg(dev, REG_ETHER_ADDR, ETH_ALEN, buf); + if (rc < 0) { + debug("reading MAC from adapter failed\n"); + return rc; + } + + memcpy(ð->enetaddr[0], buf, ETH_ALEN); + return 0; +} + +/* + * mcs7830_write_mac() - write an ethernet adapter's MAC address + * @eth: network device to write to + * Return: zero upon success, negative upon error + * + * this routine takes the MAC address from the ethernet interface's data + * structure, and writes it into the ethernet adapter such that subsequent + * exchange of ethernet frames uses this address + */ +static int mcs7830_write_mac(struct eth_device *eth) +{ + struct ueth_data *dev; + int rc; + + debug("%s()\n", __func__); + dev = eth->priv; + + if (sizeof(eth->enetaddr) != ETH_ALEN) + return -EINVAL; + rc = mcs7830_write_reg(dev, REG_ETHER_ADDR, ETH_ALEN, eth->enetaddr); + if (rc < 0) { + debug("writing MAC to adapter failed\n"); + return rc; + } + return 0; +} + +/* + * mcs7830_init() - network interface's init callback + * @eth: network device to initialize + * @bd: board information + * Return: zero upon success, negative upon error + * + * after initial setup during probe() and get_info(), this init() callback + * ensures that the link is up and subsequent send() and recv() calls can + * exchange ethernet frames + */ +static int mcs7830_init(struct eth_device *eth, bd_t *bd) +{ + struct ueth_data *dev; + int timeout; + int have_link; + + debug("%s()\n", __func__); + dev = eth->priv; + + timeout = 0; + do { + have_link = mcs7830_read_phy(dev, MII_BMSR) & BMSR_LSTATUS; + if (have_link) + break; + udelay(LINKSTATUS_TIMEOUT_RES * 1000); + timeout += LINKSTATUS_TIMEOUT_RES; + } while (timeout < LINKSTATUS_TIMEOUT); + if (!have_link) { + debug("ethernet link is down\n"); + return -ETIMEDOUT; + } + return 0; +} + +/* + * mcs7830_send() - network interface's send callback + * @eth: network device to send the frame from + * @packet: ethernet frame content + * @length: ethernet frame length + * Return: zero upon success, negative upon error + * + * this routine send an ethernet frame out of the network interface + */ +static int mcs7830_send(struct eth_device *eth, void *packet, int length) +{ + struct ueth_data *dev; + int rc; + int gotlen; + /* there is a status byte after the ethernet frame */ + ALLOC_CACHE_ALIGN_BUFFER(uint8_t, buf, PKTSIZE + sizeof(uint8_t)); + + dev = eth->priv; + + memcpy(buf, packet, length); + rc = usb_bulk_msg(dev->pusb_dev, + usb_sndbulkpipe(dev->pusb_dev, dev->ep_out), + &buf[0], length, &gotlen, + USBCALL_TIMEOUT); + debug("%s() TX want len %d, got len %d, rc %d\n", + __func__, length, gotlen, rc); + return rc; +} + +/* + * mcs7830_recv() - network interface's recv callback + * @eth: network device to receive frames from + * Return: zero upon success, negative upon error + * + * this routine checks for available ethernet frames that the network + * interface might have received, and notifies the network stack + */ +static int mcs7830_recv(struct eth_device *eth) +{ + struct ueth_data *dev; + ALLOC_CACHE_ALIGN_BUFFER(uint8_t, buf, MCS7830_RX_URB_SIZE); + int rc, wantlen, gotlen; + uint8_t sts; + + debug("%s()\n", __func__); + dev = eth->priv; + + /* fetch input data from the adapter */ + wantlen = MCS7830_RX_URB_SIZE; + rc = usb_bulk_msg(dev->pusb_dev, + usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in), + &buf[0], wantlen, &gotlen, + USBCALL_TIMEOUT); + debug("%s() RX want len %d, got len %d, rc %d\n", + __func__, wantlen, gotlen, rc); + if (rc != 0) { + error("RX: failed to receive\n"); + return rc; + } + if (gotlen > wantlen) { + error("RX: got too many bytes (%d)\n", gotlen); + return -EIO; + } + + /* + * the bulk message that we received from USB contains exactly + * one ethernet frame and a trailing status byte + */ + if (gotlen < sizeof(sts)) + return -EIO; + gotlen -= sizeof(sts); + sts = buf[gotlen]; + + if (sts == STAT_RX_FRAME_CORRECT) { + debug("%s() got a frame, len=%d\n", __func__, gotlen); + NetReceive(buf, gotlen); + return 0; + } + + debug("RX: frame error (sts 0x%02X, %s %s %s %s %s)\n", + sts, + (sts & STAT_RX_LARGE_FRAME) ? "large" : "-", + (sts & STAT_RX_LENGTH_ERROR) ? "length" : "-", + (sts & STAT_RX_SHORT_FRAME) ? "short" : "-", + (sts & STAT_RX_CRC_ERROR) ? "crc" : "-", + (sts & STAT_RX_ALIGNMENT_ERROR) ? "align" : "-"); + return -EIO; +} + +/* + * mcs7830_halt() - network interface's halt callback + * @eth: network device to cease operation of + * Return: none + * + * this routine is supposed to undo the effect of previous initialization and + * ethernet frames exchange; in this implementation it's a NOP + */ +static void mcs7830_halt(struct eth_device *eth) +{ + debug("%s()\n", __func__); +} + +/* + * mcs7830_iface_idx - index of detected network interfaces + * + * this counter keeps track of identified supported interfaces, + * to assign unique names as more interfaces are found + */ +static int mcs7830_iface_idx; + +/* + * mcs7830_eth_before_probe() - network driver's before_probe callback + * Return: none + * + * this routine initializes driver's internal data in preparation of + * subsequent probe callbacks + */ +void mcs7830_eth_before_probe(void) +{ + mcs7830_iface_idx = 0; +} + +/* + * struct mcs7830_dongle - description of a supported Moschip ethernet dongle + * @vendor: 16bit USB vendor identification + * @product: 16bit USB product identification + * + * this structure describes a supported USB ethernet dongle by means of the + * vendor and product codes found during USB enumeration; no flags are held + * here since all supported dongles have identical behaviour, and required + * fixups get determined at runtime, such that no manual configuration is + * needed + */ +struct mcs7830_dongle { + uint16_t vendor; + uint16_t product; +}; + +/* + * mcs7830_dongles - the list of supported Moschip based USB ethernet dongles + */ +static const struct mcs7830_dongle const mcs7830_dongles[] = { + { 0x9710, 0x7832, }, /* Moschip 7832 */ + { 0x9710, 0x7830, }, /* Moschip 7830 */ + { 0x9710, 0x7730, }, /* Moschip 7730 */ + { 0x0df6, 0x0021, }, /* Sitecom LN 30 */ +}; + +/* + * mcs7830_eth_probe() - network driver's probe callback + * @dev: detected USB device to check + * @ifnum: detected USB interface to check + * @ss: USB ethernet data structure to fill in upon match + * Return: #1 upon match, #0 upon mismatch or error + * + * this routine checks whether the found USB device is supported by + * this ethernet driver, and upon match fills in the USB ethernet + * data structure which later is passed to the get_info callback + */ +int mcs7830_eth_probe(struct usb_device *dev, unsigned int ifnum, + struct ueth_data *ss) +{ + struct usb_interface *iface; + struct usb_interface_descriptor *iface_desc; + int i; + struct mcs7830_private *priv; + int ep_in_found, ep_out_found, ep_intr_found; + + debug("%s()\n", __func__); + + /* iterate the list of supported dongles */ + iface = &dev->config.if_desc[ifnum]; + iface_desc = &iface->desc; + for (i = 0; i < ARRAY_SIZE(mcs7830_dongles); i++) { + if (dev->descriptor.idVendor == mcs7830_dongles[i].vendor && + dev->descriptor.idProduct == mcs7830_dongles[i].product) + break; + } + if (i == ARRAY_SIZE(mcs7830_dongles)) + return 0; + debug("detected USB ethernet device: %04X:%04X\n", + dev->descriptor.idVendor, dev->descriptor.idProduct); + + /* fill in driver private data */ + priv = calloc(1, sizeof(*priv)); + if (!priv) + return 0; + + /* fill in the ueth_data structure, attach private data */ + memset(ss, 0, sizeof(*ss)); + ss->ifnum = ifnum; + ss->pusb_dev = dev; + ss->subclass = iface_desc->bInterfaceSubClass; + ss->protocol = iface_desc->bInterfaceProtocol; + ss->dev_priv = priv; + + /* + * a minimum of three endpoints is expected: in (bulk), + * out (bulk), and interrupt; ignore all others + */ + ep_in_found = ep_out_found = ep_intr_found = 0; + for (i = 0; i < iface_desc->bNumEndpoints; i++) { + uint8_t eptype, epaddr; + bool is_input; + + eptype = iface->ep_desc[i].bmAttributes; + eptype &= USB_ENDPOINT_XFERTYPE_MASK; + + epaddr = iface->ep_desc[i].bEndpointAddress; + is_input = epaddr & USB_DIR_IN; + epaddr &= USB_ENDPOINT_NUMBER_MASK; + + if (eptype == USB_ENDPOINT_XFER_BULK) { + if (is_input && !ep_in_found) { + ss->ep_in = epaddr; + ep_in_found++; + } + if (!is_input && !ep_out_found) { + ss->ep_out = epaddr; + ep_out_found++; + } + } + + if (eptype == USB_ENDPOINT_XFER_INT) { + if (is_input && !ep_intr_found) { + ss->ep_int = epaddr; + ss->irqinterval = iface->ep_desc[i].bInterval; + ep_intr_found++; + } + } + } + debug("endpoints: in %d, out %d, intr %d\n", + ss->ep_in, ss->ep_out, ss->ep_int); + + /* apply basic sanity checks */ + if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) || + !ss->ep_in || !ss->ep_out || !ss->ep_int) { + debug("device probe incomplete\n"); + return 0; + } + + dev->privptr = ss; + return 1; +} + +/* + * mcs7830_eth_get_info() - network driver's get_info callback + * @dev: detected USB device + * @ss: USB ethernet data structure filled in at probe() + * @eth: ethernet interface data structure to fill in + * Return: #1 upon success, #0 upon error + * + * this routine registers the mandatory init(), send(), recv(), and + * halt() callbacks with the ethernet interface, can register the + * optional write_hwaddr() callback with the ethernet interface, + * and initiates configuration of the interface such that subsequent + * calls to those callbacks results in network communication + */ +int mcs7830_eth_get_info(struct usb_device *dev, struct ueth_data *ss, + struct eth_device *eth) +{ + debug("%s()\n", __func__); + if (!eth) { + debug("%s: missing parameter.\n", __func__); + return 0; + } + + snprintf(eth->name, sizeof(eth->name), "%s%d", + MCS7830_BASE_NAME, mcs7830_iface_idx++); + eth->init = mcs7830_init; + eth->send = mcs7830_send; + eth->recv = mcs7830_recv; + eth->halt = mcs7830_halt; + eth->write_hwaddr = mcs7830_write_mac; + eth->priv = ss; + + if (mcs7830_basic_reset(ss)) + return 0; + + if (mcs7830_read_mac(eth)) + return 0; + debug("MAC %pM\n", eth->enetaddr); + + return 1; +} diff --git a/qemu/roms/u-boot/drivers/usb/eth/smsc95xx.c b/qemu/roms/u-boot/drivers/usb/eth/smsc95xx.c new file mode 100644 index 000000000..7bf0a3407 --- /dev/null +++ b/qemu/roms/u-boot/drivers/usb/eth/smsc95xx.c @@ -0,0 +1,897 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * Copyright (C) 2009 NVIDIA, Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/unaligned.h> +#include <common.h> +#include <usb.h> +#include <linux/mii.h> +#include "usb_ether.h" +#include <malloc.h> + +/* SMSC LAN95xx based USB 2.0 Ethernet Devices */ + +/* LED defines */ +#define LED_GPIO_CFG (0x24) +#define LED_GPIO_CFG_SPD_LED (0x01000000) +#define LED_GPIO_CFG_LNK_LED (0x00100000) +#define LED_GPIO_CFG_FDX_LED (0x00010000) + +/* Tx command words */ +#define TX_CMD_A_FIRST_SEG_ 0x00002000 +#define TX_CMD_A_LAST_SEG_ 0x00001000 + +/* Rx status word */ +#define RX_STS_FL_ 0x3FFF0000 /* Frame Length */ +#define RX_STS_ES_ 0x00008000 /* Error Summary */ + +/* SCSRs */ +#define ID_REV 0x00 + +#define INT_STS 0x08 + +#define TX_CFG 0x10 +#define TX_CFG_ON_ 0x00000004 + +#define HW_CFG 0x14 +#define HW_CFG_BIR_ 0x00001000 +#define HW_CFG_RXDOFF_ 0x00000600 +#define HW_CFG_MEF_ 0x00000020 +#define HW_CFG_BCE_ 0x00000002 +#define HW_CFG_LRST_ 0x00000008 + +#define PM_CTRL 0x20 +#define PM_CTL_PHY_RST_ 0x00000010 + +#define AFC_CFG 0x2C + +/* + * Hi watermark = 15.5Kb (~10 mtu pkts) + * low watermark = 3k (~2 mtu pkts) + * backpressure duration = ~ 350us + * Apply FC on any frame. + */ +#define AFC_CFG_DEFAULT 0x00F830A1 + +#define E2P_CMD 0x30 +#define E2P_CMD_BUSY_ 0x80000000 +#define E2P_CMD_READ_ 0x00000000 +#define E2P_CMD_TIMEOUT_ 0x00000400 +#define E2P_CMD_LOADED_ 0x00000200 +#define E2P_CMD_ADDR_ 0x000001FF + +#define E2P_DATA 0x34 + +#define BURST_CAP 0x38 + +#define INT_EP_CTL 0x68 +#define INT_EP_CTL_PHY_INT_ 0x00008000 + +#define BULK_IN_DLY 0x6C + +/* MAC CSRs */ +#define MAC_CR 0x100 +#define MAC_CR_MCPAS_ 0x00080000 +#define MAC_CR_PRMS_ 0x00040000 +#define MAC_CR_HPFILT_ 0x00002000 +#define MAC_CR_TXEN_ 0x00000008 +#define MAC_CR_RXEN_ 0x00000004 + +#define ADDRH 0x104 + +#define ADDRL 0x108 + +#define MII_ADDR 0x114 +#define MII_WRITE_ 0x02 +#define MII_BUSY_ 0x01 +#define MII_READ_ 0x00 /* ~of MII Write bit */ + +#define MII_DATA 0x118 + +#define FLOW 0x11C + +#define VLAN1 0x120 + +#define COE_CR 0x130 +#define Tx_COE_EN_ 0x00010000 +#define Rx_COE_EN_ 0x00000001 + +/* Vendor-specific PHY Definitions */ +#define PHY_INT_SRC 29 + +#define PHY_INT_MASK 30 +#define PHY_INT_MASK_ANEG_COMP_ ((u16)0x0040) +#define PHY_INT_MASK_LINK_DOWN_ ((u16)0x0010) +#define PHY_INT_MASK_DEFAULT_ (PHY_INT_MASK_ANEG_COMP_ | \ + PHY_INT_MASK_LINK_DOWN_) + +/* USB Vendor Requests */ +#define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0 +#define USB_VENDOR_REQUEST_READ_REGISTER 0xA1 + +/* Some extra defines */ +#define HS_USB_PKT_SIZE 512 +#define FS_USB_PKT_SIZE 64 +#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) +#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) +#define DEFAULT_BULK_IN_DELAY 0x00002000 +#define MAX_SINGLE_PACKET_SIZE 2048 +#define EEPROM_MAC_OFFSET 0x01 +#define SMSC95XX_INTERNAL_PHY_ID 1 +#define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */ + +/* local defines */ +#define SMSC95XX_BASE_NAME "sms" +#define USB_CTRL_SET_TIMEOUT 5000 +#define USB_CTRL_GET_TIMEOUT 5000 +#define USB_BULK_SEND_TIMEOUT 5000 +#define USB_BULK_RECV_TIMEOUT 5000 + +#define AX_RX_URB_SIZE 2048 +#define PHY_CONNECT_TIMEOUT 5000 + +#define TURBO_MODE + +/* local vars */ +static int curr_eth_dev; /* index for name of next device detected */ + +/* driver private */ +struct smsc95xx_private { + size_t rx_urb_size; /* maximum USB URB size */ + u32 mac_cr; /* MAC control register value */ + int have_hwaddr; /* 1 if we have a hardware MAC address */ +}; + +/* + * Smsc95xx infrastructure commands + */ +static int smsc95xx_write_reg(struct ueth_data *dev, u32 index, u32 data) +{ + int len; + ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1); + + cpu_to_le32s(&data); + tmpbuf[0] = data; + + len = usb_control_msg(dev->pusb_dev, usb_sndctrlpipe(dev->pusb_dev, 0), + USB_VENDOR_REQUEST_WRITE_REGISTER, + USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, + 00, index, tmpbuf, sizeof(data), USB_CTRL_SET_TIMEOUT); + if (len != sizeof(data)) { + debug("smsc95xx_write_reg failed: index=%d, data=%d, len=%d", + index, data, len); + return -1; + } + return 0; +} + +static int smsc95xx_read_reg(struct ueth_data *dev, u32 index, u32 *data) +{ + int len; + ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1); + + len = usb_control_msg(dev->pusb_dev, usb_rcvctrlpipe(dev->pusb_dev, 0), + USB_VENDOR_REQUEST_READ_REGISTER, + USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, + 00, index, tmpbuf, sizeof(data), USB_CTRL_GET_TIMEOUT); + *data = tmpbuf[0]; + if (len != sizeof(data)) { + debug("smsc95xx_read_reg failed: index=%d, len=%d", + index, len); + return -1; + } + + le32_to_cpus(data); + return 0; +} + +/* Loop until the read is completed with timeout */ +static int smsc95xx_phy_wait_not_busy(struct ueth_data *dev) +{ + unsigned long start_time = get_timer(0); + u32 val; + + do { + smsc95xx_read_reg(dev, MII_ADDR, &val); + if (!(val & MII_BUSY_)) + return 0; + } while (get_timer(start_time) < 1 * 1000 * 1000); + + return -1; +} + +static int smsc95xx_mdio_read(struct ueth_data *dev, int phy_id, int idx) +{ + u32 val, addr; + + /* confirm MII not busy */ + if (smsc95xx_phy_wait_not_busy(dev)) { + debug("MII is busy in smsc95xx_mdio_read\n"); + return -1; + } + + /* set the address, index & direction (read from PHY) */ + addr = (phy_id << 11) | (idx << 6) | MII_READ_; + smsc95xx_write_reg(dev, MII_ADDR, addr); + + if (smsc95xx_phy_wait_not_busy(dev)) { + debug("Timed out reading MII reg %02X\n", idx); + return -1; + } + + smsc95xx_read_reg(dev, MII_DATA, &val); + + return (u16)(val & 0xFFFF); +} + +static void smsc95xx_mdio_write(struct ueth_data *dev, int phy_id, int idx, + int regval) +{ + u32 val, addr; + + /* confirm MII not busy */ + if (smsc95xx_phy_wait_not_busy(dev)) { + debug("MII is busy in smsc95xx_mdio_write\n"); + return; + } + + val = regval; + smsc95xx_write_reg(dev, MII_DATA, val); + + /* set the address, index & direction (write to PHY) */ + addr = (phy_id << 11) | (idx << 6) | MII_WRITE_; + smsc95xx_write_reg(dev, MII_ADDR, addr); + + if (smsc95xx_phy_wait_not_busy(dev)) + debug("Timed out writing MII reg %02X\n", idx); +} + +static int smsc95xx_eeprom_confirm_not_busy(struct ueth_data *dev) +{ + unsigned long start_time = get_timer(0); + u32 val; + + do { + smsc95xx_read_reg(dev, E2P_CMD, &val); + if (!(val & E2P_CMD_BUSY_)) + return 0; + udelay(40); + } while (get_timer(start_time) < 1 * 1000 * 1000); + + debug("EEPROM is busy\n"); + return -1; +} + +static int smsc95xx_wait_eeprom(struct ueth_data *dev) +{ + unsigned long start_time = get_timer(0); + u32 val; + + do { + smsc95xx_read_reg(dev, E2P_CMD, &val); + if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) + break; + udelay(40); + } while (get_timer(start_time) < 1 * 1000 * 1000); + + if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { + debug("EEPROM read operation timeout\n"); + return -1; + } + return 0; +} + +static int smsc95xx_read_eeprom(struct ueth_data *dev, u32 offset, u32 length, + u8 *data) +{ + u32 val; + int i, ret; + + ret = smsc95xx_eeprom_confirm_not_busy(dev); + if (ret) + return ret; + + for (i = 0; i < length; i++) { + val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); + smsc95xx_write_reg(dev, E2P_CMD, val); + + ret = smsc95xx_wait_eeprom(dev); + if (ret < 0) + return ret; + + smsc95xx_read_reg(dev, E2P_DATA, &val); + data[i] = val & 0xFF; + offset++; + } + return 0; +} + +/* + * mii_nway_restart - restart NWay (autonegotiation) for this interface + * + * Returns 0 on success, negative on error. + */ +static int mii_nway_restart(struct ueth_data *dev) +{ + int bmcr; + int r = -1; + + /* if autoneg is off, it's an error */ + bmcr = smsc95xx_mdio_read(dev, dev->phy_id, MII_BMCR); + + if (bmcr & BMCR_ANENABLE) { + bmcr |= BMCR_ANRESTART; + smsc95xx_mdio_write(dev, dev->phy_id, MII_BMCR, bmcr); + r = 0; + } + return r; +} + +static int smsc95xx_phy_initialize(struct ueth_data *dev) +{ + smsc95xx_mdio_write(dev, dev->phy_id, MII_BMCR, BMCR_RESET); + smsc95xx_mdio_write(dev, dev->phy_id, MII_ADVERTISE, + ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | + ADVERTISE_PAUSE_ASYM); + + /* read to clear */ + smsc95xx_mdio_read(dev, dev->phy_id, PHY_INT_SRC); + + smsc95xx_mdio_write(dev, dev->phy_id, PHY_INT_MASK, + PHY_INT_MASK_DEFAULT_); + mii_nway_restart(dev); + + debug("phy initialised succesfully\n"); + return 0; +} + +static int smsc95xx_init_mac_address(struct eth_device *eth, + struct ueth_data *dev) +{ + /* try reading mac address from EEPROM */ + if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, + eth->enetaddr) == 0) { + if (is_valid_ether_addr(eth->enetaddr)) { + /* eeprom values are valid so use them */ + debug("MAC address read from EEPROM\n"); + return 0; + } + } + + /* + * No eeprom, or eeprom values are invalid. Generating a random MAC + * address is not safe. Just return an error. + */ + return -1; +} + +static int smsc95xx_write_hwaddr(struct eth_device *eth) +{ + struct ueth_data *dev = (struct ueth_data *)eth->priv; + struct smsc95xx_private *priv = dev->dev_priv; + u32 addr_lo = __get_unaligned_le32(ð->enetaddr[0]); + u32 addr_hi = __get_unaligned_le16(ð->enetaddr[4]); + int ret; + + /* set hardware address */ + debug("** %s()\n", __func__); + ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); + if (ret < 0) + return ret; + + ret = smsc95xx_write_reg(dev, ADDRH, addr_hi); + if (ret < 0) + return ret; + + debug("MAC %pM\n", eth->enetaddr); + priv->have_hwaddr = 1; + return 0; +} + +/* Enable or disable Tx & Rx checksum offload engines */ +static int smsc95xx_set_csums(struct ueth_data *dev, + int use_tx_csum, int use_rx_csum) +{ + u32 read_buf; + int ret = smsc95xx_read_reg(dev, COE_CR, &read_buf); + if (ret < 0) + return ret; + + if (use_tx_csum) + read_buf |= Tx_COE_EN_; + else + read_buf &= ~Tx_COE_EN_; + + if (use_rx_csum) + read_buf |= Rx_COE_EN_; + else + read_buf &= ~Rx_COE_EN_; + + ret = smsc95xx_write_reg(dev, COE_CR, read_buf); + if (ret < 0) + return ret; + + debug("COE_CR = 0x%08x\n", read_buf); + return 0; +} + +static void smsc95xx_set_multicast(struct ueth_data *dev) +{ + struct smsc95xx_private *priv = dev->dev_priv; + + /* No multicast in u-boot */ + priv->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); +} + +/* starts the TX path */ +static void smsc95xx_start_tx_path(struct ueth_data *dev) +{ + struct smsc95xx_private *priv = dev->dev_priv; + u32 reg_val; + + /* Enable Tx at MAC */ + priv->mac_cr |= MAC_CR_TXEN_; + + smsc95xx_write_reg(dev, MAC_CR, priv->mac_cr); + + /* Enable Tx at SCSRs */ + reg_val = TX_CFG_ON_; + smsc95xx_write_reg(dev, TX_CFG, reg_val); +} + +/* Starts the Receive path */ +static void smsc95xx_start_rx_path(struct ueth_data *dev) +{ + struct smsc95xx_private *priv = dev->dev_priv; + + priv->mac_cr |= MAC_CR_RXEN_; + smsc95xx_write_reg(dev, MAC_CR, priv->mac_cr); +} + +/* + * Smsc95xx callbacks + */ +static int smsc95xx_init(struct eth_device *eth, bd_t *bd) +{ + int ret; + u32 write_buf; + u32 read_buf; + u32 burst_cap; + int timeout; + struct ueth_data *dev = (struct ueth_data *)eth->priv; + struct smsc95xx_private *priv = + (struct smsc95xx_private *)dev->dev_priv; +#define TIMEOUT_RESOLUTION 50 /* ms */ + int link_detected; + + debug("** %s()\n", __func__); + dev->phy_id = SMSC95XX_INTERNAL_PHY_ID; /* fixed phy id */ + + write_buf = HW_CFG_LRST_; + ret = smsc95xx_write_reg(dev, HW_CFG, write_buf); + if (ret < 0) + return ret; + + timeout = 0; + do { + ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); + if (ret < 0) + return ret; + udelay(10 * 1000); + timeout++; + } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); + + if (timeout >= 100) { + debug("timeout waiting for completion of Lite Reset\n"); + return -1; + } + + write_buf = PM_CTL_PHY_RST_; + ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf); + if (ret < 0) + return ret; + + timeout = 0; + do { + ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf); + if (ret < 0) + return ret; + udelay(10 * 1000); + timeout++; + } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); + if (timeout >= 100) { + debug("timeout waiting for PHY Reset\n"); + return -1; + } + if (!priv->have_hwaddr && smsc95xx_init_mac_address(eth, dev) == 0) + priv->have_hwaddr = 1; + if (!priv->have_hwaddr) { + puts("Error: SMSC95xx: No MAC address set - set usbethaddr\n"); + return -1; + } + if (smsc95xx_write_hwaddr(eth) < 0) + return -1; + + ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); + if (ret < 0) + return ret; + debug("Read Value from HW_CFG : 0x%08x\n", read_buf); + + read_buf |= HW_CFG_BIR_; + ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); + if (ret < 0) + return ret; + + ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); + if (ret < 0) + return ret; + debug("Read Value from HW_CFG after writing " + "HW_CFG_BIR_: 0x%08x\n", read_buf); + +#ifdef TURBO_MODE + if (dev->pusb_dev->speed == USB_SPEED_HIGH) { + burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; + priv->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; + } else { + burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; + priv->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; + } +#else + burst_cap = 0; + priv->rx_urb_size = MAX_SINGLE_PACKET_SIZE; +#endif + debug("rx_urb_size=%ld\n", (ulong)priv->rx_urb_size); + + ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap); + if (ret < 0) + return ret; + + ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf); + if (ret < 0) + return ret; + debug("Read Value from BURST_CAP after writing: 0x%08x\n", read_buf); + + read_buf = DEFAULT_BULK_IN_DELAY; + ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf); + if (ret < 0) + return ret; + + ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf); + if (ret < 0) + return ret; + debug("Read Value from BULK_IN_DLY after writing: " + "0x%08x\n", read_buf); + + ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); + if (ret < 0) + return ret; + debug("Read Value from HW_CFG: 0x%08x\n", read_buf); + +#ifdef TURBO_MODE + read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); +#endif + read_buf &= ~HW_CFG_RXDOFF_; + +#define NET_IP_ALIGN 0 + read_buf |= NET_IP_ALIGN << 9; + + ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); + if (ret < 0) + return ret; + + ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); + if (ret < 0) + return ret; + debug("Read Value from HW_CFG after writing: 0x%08x\n", read_buf); + + write_buf = 0xFFFFFFFF; + ret = smsc95xx_write_reg(dev, INT_STS, write_buf); + if (ret < 0) + return ret; + + ret = smsc95xx_read_reg(dev, ID_REV, &read_buf); + if (ret < 0) + return ret; + debug("ID_REV = 0x%08x\n", read_buf); + + /* Configure GPIO pins as LED outputs */ + write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | + LED_GPIO_CFG_FDX_LED; + ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf); + if (ret < 0) + return ret; + debug("LED_GPIO_CFG set\n"); + + /* Init Tx */ + write_buf = 0; + ret = smsc95xx_write_reg(dev, FLOW, write_buf); + if (ret < 0) + return ret; + + read_buf = AFC_CFG_DEFAULT; + ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf); + if (ret < 0) + return ret; + + ret = smsc95xx_read_reg(dev, MAC_CR, &priv->mac_cr); + if (ret < 0) + return ret; + + /* Init Rx. Set Vlan */ + write_buf = (u32)ETH_P_8021Q; + ret = smsc95xx_write_reg(dev, VLAN1, write_buf); + if (ret < 0) + return ret; + + /* Disable checksum offload engines */ + ret = smsc95xx_set_csums(dev, 0, 0); + if (ret < 0) { + debug("Failed to set csum offload: %d\n", ret); + return ret; + } + smsc95xx_set_multicast(dev); + + if (smsc95xx_phy_initialize(dev) < 0) + return -1; + ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf); + if (ret < 0) + return ret; + + /* enable PHY interrupts */ + read_buf |= INT_EP_CTL_PHY_INT_; + + ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf); + if (ret < 0) + return ret; + + smsc95xx_start_tx_path(dev); + smsc95xx_start_rx_path(dev); + + timeout = 0; + do { + link_detected = smsc95xx_mdio_read(dev, dev->phy_id, MII_BMSR) + & BMSR_LSTATUS; + if (!link_detected) { + if (timeout == 0) + printf("Waiting for Ethernet connection... "); + udelay(TIMEOUT_RESOLUTION * 1000); + timeout += TIMEOUT_RESOLUTION; + } + } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT); + if (link_detected) { + if (timeout != 0) + printf("done.\n"); + } else { + printf("unable to connect.\n"); + return -1; + } + return 0; +} + +static int smsc95xx_send(struct eth_device *eth, void* packet, int length) +{ + struct ueth_data *dev = (struct ueth_data *)eth->priv; + int err; + int actual_len; + u32 tx_cmd_a; + u32 tx_cmd_b; + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg, + PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)); + + debug("** %s(), len %d, buf %#x\n", __func__, length, (int)msg); + if (length > PKTSIZE) + return -1; + + tx_cmd_a = (u32)length | TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_; + tx_cmd_b = (u32)length; + cpu_to_le32s(&tx_cmd_a); + cpu_to_le32s(&tx_cmd_b); + + /* prepend cmd_a and cmd_b */ + memcpy(msg, &tx_cmd_a, sizeof(tx_cmd_a)); + memcpy(msg + sizeof(tx_cmd_a), &tx_cmd_b, sizeof(tx_cmd_b)); + memcpy(msg + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), (void *)packet, + length); + err = usb_bulk_msg(dev->pusb_dev, + usb_sndbulkpipe(dev->pusb_dev, dev->ep_out), + (void *)msg, + length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), + &actual_len, + USB_BULK_SEND_TIMEOUT); + debug("Tx: len = %u, actual = %u, err = %d\n", + length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), + actual_len, err); + return err; +} + +static int smsc95xx_recv(struct eth_device *eth) +{ + struct ueth_data *dev = (struct ueth_data *)eth->priv; + DEFINE_CACHE_ALIGN_BUFFER(unsigned char, recv_buf, AX_RX_URB_SIZE); + unsigned char *buf_ptr; + int err; + int actual_len; + u32 packet_len; + int cur_buf_align; + + debug("** %s()\n", __func__); + err = usb_bulk_msg(dev->pusb_dev, + usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in), + (void *)recv_buf, + AX_RX_URB_SIZE, + &actual_len, + USB_BULK_RECV_TIMEOUT); + debug("Rx: len = %u, actual = %u, err = %d\n", AX_RX_URB_SIZE, + actual_len, err); + if (err != 0) { + debug("Rx: failed to receive\n"); + return -1; + } + if (actual_len > AX_RX_URB_SIZE) { + debug("Rx: received too many bytes %d\n", actual_len); + return -1; + } + + buf_ptr = recv_buf; + while (actual_len > 0) { + /* + * 1st 4 bytes contain the length of the actual data plus error + * info. Extract data length. + */ + if (actual_len < sizeof(packet_len)) { + debug("Rx: incomplete packet length\n"); + return -1; + } + memcpy(&packet_len, buf_ptr, sizeof(packet_len)); + le32_to_cpus(&packet_len); + if (packet_len & RX_STS_ES_) { + debug("Rx: Error header=%#x", packet_len); + return -1; + } + packet_len = ((packet_len & RX_STS_FL_) >> 16); + + if (packet_len > actual_len - sizeof(packet_len)) { + debug("Rx: too large packet: %d\n", packet_len); + return -1; + } + + /* Notify net stack */ + NetReceive(buf_ptr + sizeof(packet_len), packet_len - 4); + + /* Adjust for next iteration */ + actual_len -= sizeof(packet_len) + packet_len; + buf_ptr += sizeof(packet_len) + packet_len; + cur_buf_align = (int)buf_ptr - (int)recv_buf; + + if (cur_buf_align & 0x03) { + int align = 4 - (cur_buf_align & 0x03); + + actual_len -= align; + buf_ptr += align; + } + } + return err; +} + +static void smsc95xx_halt(struct eth_device *eth) +{ + debug("** %s()\n", __func__); +} + +/* + * SMSC probing functions + */ +void smsc95xx_eth_before_probe(void) +{ + curr_eth_dev = 0; +} + +struct smsc95xx_dongle { + unsigned short vendor; + unsigned short product; +}; + +static const struct smsc95xx_dongle smsc95xx_dongles[] = { + { 0x0424, 0xec00 }, /* LAN9512/LAN9514 Ethernet */ + { 0x0424, 0x9500 }, /* LAN9500 Ethernet */ + { 0x0424, 0x9730 }, /* LAN9730 Ethernet (HSIC) */ + { 0x0424, 0x9900 }, /* SMSC9500 USB Ethernet Device (SAL10) */ + { 0x0000, 0x0000 } /* END - Do not remove */ +}; + +/* Probe to see if a new device is actually an SMSC device */ +int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum, + struct ueth_data *ss) +{ + struct usb_interface *iface; + struct usb_interface_descriptor *iface_desc; + int i; + + /* let's examine the device now */ + iface = &dev->config.if_desc[ifnum]; + iface_desc = &dev->config.if_desc[ifnum].desc; + + for (i = 0; smsc95xx_dongles[i].vendor != 0; i++) { + if (dev->descriptor.idVendor == smsc95xx_dongles[i].vendor && + dev->descriptor.idProduct == smsc95xx_dongles[i].product) + /* Found a supported dongle */ + break; + } + if (smsc95xx_dongles[i].vendor == 0) + return 0; + + /* At this point, we know we've got a live one */ + debug("\n\nUSB Ethernet device detected\n"); + memset(ss, '\0', sizeof(struct ueth_data)); + + /* Initialize the ueth_data structure with some useful info */ + ss->ifnum = ifnum; + ss->pusb_dev = dev; + ss->subclass = iface_desc->bInterfaceSubClass; + ss->protocol = iface_desc->bInterfaceProtocol; + + /* + * We are expecting a minimum of 3 endpoints - in, out (bulk), and int. + * We will ignore any others. + */ + for (i = 0; i < iface_desc->bNumEndpoints; i++) { + /* is it an BULK endpoint? */ + if ((iface->ep_desc[i].bmAttributes & + USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) { + if (iface->ep_desc[i].bEndpointAddress & USB_DIR_IN) + ss->ep_in = + iface->ep_desc[i].bEndpointAddress & + USB_ENDPOINT_NUMBER_MASK; + else + ss->ep_out = + iface->ep_desc[i].bEndpointAddress & + USB_ENDPOINT_NUMBER_MASK; + } + + /* is it an interrupt endpoint? */ + if ((iface->ep_desc[i].bmAttributes & + USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) { + ss->ep_int = iface->ep_desc[i].bEndpointAddress & + USB_ENDPOINT_NUMBER_MASK; + ss->irqinterval = iface->ep_desc[i].bInterval; + } + } + debug("Endpoints In %d Out %d Int %d\n", + ss->ep_in, ss->ep_out, ss->ep_int); + + /* Do some basic sanity checks, and bail if we find a problem */ + if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) || + !ss->ep_in || !ss->ep_out || !ss->ep_int) { + debug("Problems with device\n"); + return 0; + } + dev->privptr = (void *)ss; + + /* alloc driver private */ + ss->dev_priv = calloc(1, sizeof(struct smsc95xx_private)); + if (!ss->dev_priv) + return 0; + + return 1; +} + +int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss, + struct eth_device *eth) +{ + debug("** %s()\n", __func__); + if (!eth) { + debug("%s: missing parameter.\n", __func__); + return 0; + } + sprintf(eth->name, "%s%d", SMSC95XX_BASE_NAME, curr_eth_dev++); + eth->init = smsc95xx_init; + eth->send = smsc95xx_send; + eth->recv = smsc95xx_recv; + eth->halt = smsc95xx_halt; + eth->write_hwaddr = smsc95xx_write_hwaddr; + eth->priv = ss; + return 1; +} diff --git a/qemu/roms/u-boot/drivers/usb/eth/usb_ether.c b/qemu/roms/u-boot/drivers/usb/eth/usb_ether.c new file mode 100644 index 000000000..1dda54c2f --- /dev/null +++ b/qemu/roms/u-boot/drivers/usb/eth/usb_ether.c @@ -0,0 +1,156 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <usb.h> + +#include "usb_ether.h" + +typedef void (*usb_eth_before_probe)(void); +typedef int (*usb_eth_probe)(struct usb_device *dev, unsigned int ifnum, + struct ueth_data *ss); +typedef int (*usb_eth_get_info)(struct usb_device *dev, struct ueth_data *ss, + struct eth_device *dev_desc); + +struct usb_eth_prob_dev { + usb_eth_before_probe before_probe; /* optional */ + usb_eth_probe probe; + usb_eth_get_info get_info; +}; + +/* driver functions go here, each bracketed by #ifdef CONFIG_USB_ETHER_xxx */ +static const struct usb_eth_prob_dev prob_dev[] = { +#ifdef CONFIG_USB_ETHER_ASIX + { + .before_probe = asix_eth_before_probe, + .probe = asix_eth_probe, + .get_info = asix_eth_get_info, + }, +#endif +#ifdef CONFIG_USB_ETHER_MCS7830 + { + .before_probe = mcs7830_eth_before_probe, + .probe = mcs7830_eth_probe, + .get_info = mcs7830_eth_get_info, + }, +#endif +#ifdef CONFIG_USB_ETHER_SMSC95XX + { + .before_probe = smsc95xx_eth_before_probe, + .probe = smsc95xx_eth_probe, + .get_info = smsc95xx_eth_get_info, + }, +#endif + { }, /* END */ +}; + +static int usb_max_eth_dev; /* number of highest available usb eth device */ +static struct ueth_data usb_eth[USB_MAX_ETH_DEV]; + +/******************************************************************************* + * tell if current ethernet device is a usb dongle + */ +int is_eth_dev_on_usb_host(void) +{ + int i; + struct eth_device *dev = eth_get_dev(); + + if (dev) { + for (i = 0; i < usb_max_eth_dev; i++) + if (&usb_eth[i].eth_dev == dev) + return 1; + } + return 0; +} + +/* + * Given a USB device, ask each driver if it can support it, and attach it + * to the first driver that says 'yes' + */ +static void probe_valid_drivers(struct usb_device *dev) +{ + struct eth_device *eth; + int j; + + for (j = 0; prob_dev[j].probe && prob_dev[j].get_info; j++) { + if (!prob_dev[j].probe(dev, 0, &usb_eth[usb_max_eth_dev])) + continue; + /* + * ok, it is a supported eth device. Get info and fill it in + */ + eth = &usb_eth[usb_max_eth_dev].eth_dev; + if (prob_dev[j].get_info(dev, + &usb_eth[usb_max_eth_dev], + eth)) { + /* found proper driver */ + /* register with networking stack */ + usb_max_eth_dev++; + + /* + * usb_max_eth_dev must be incremented prior to this + * call since eth_current_changed (internally called) + * relies on it + */ + eth_register(eth); + if (eth_write_hwaddr(eth, "usbeth", + usb_max_eth_dev - 1)) + puts("Warning: failed to set MAC address\n"); + break; + } + } + } + +/******************************************************************************* + * scan the usb and reports device info + * to the user if mode = 1 + * returns current device or -1 if no + */ +int usb_host_eth_scan(int mode) +{ + int i, old_async; + struct usb_device *dev; + + + if (mode == 1) + printf(" scanning usb for ethernet devices... "); + + old_async = usb_disable_asynch(1); /* asynch transfer not allowed */ + + /* unregister a previously detected device */ + for (i = 0; i < usb_max_eth_dev; i++) + eth_unregister(&usb_eth[i].eth_dev); + + memset(usb_eth, 0, sizeof(usb_eth)); + + for (i = 0; prob_dev[i].probe; i++) { + if (prob_dev[i].before_probe) + prob_dev[i].before_probe(); + } + + usb_max_eth_dev = 0; + for (i = 0; i < USB_MAX_DEVICE; i++) { + dev = usb_get_dev_index(i); /* get device */ + debug("i=%d\n", i); + if (dev == NULL) + break; /* no more devices available */ + + /* find valid usb_ether driver for this device, if any */ + probe_valid_drivers(dev); + + /* check limit */ + if (usb_max_eth_dev == USB_MAX_ETH_DEV) { + printf("max USB Ethernet Device reached: %d stopping\n", + usb_max_eth_dev); + break; + } + } /* for */ + + usb_disable_asynch(old_async); /* restore asynch value */ + printf("%d Ethernet Device(s) found\n", usb_max_eth_dev); + if (usb_max_eth_dev > 0) + return 0; + return -1; +} |