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-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/README17
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/clock/nvidia,tegra20-car.txt207
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/exynos/dwmmc.txt54
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/exynos/isp-spi.txt22
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/exynos/sound.txt27
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/exynos/tmu.txt44
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/i2c/tegra20-i2c.txt23
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/input/cros-ec-keyb.txt79
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/misc/cros-ec.txt38
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/nand/nvidia,tegra20-nand.txt53
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/pwm/tegra20-pwm.txt18
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/spi/spi-bus.txt92
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/usb/tegra-usb.txt25
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/video/displaymode.txt42
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/video/exynos-dp.txt69
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/video/exynos-fb.txt92
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/video/exynos_mipi_dsi.txt82
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/video/sandbox-fb.txt13
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/video/simple-framebuffer.txt25
-rw-r--r--qemu/roms/u-boot/doc/device-tree-bindings/video/tegra20-dc.txt85
20 files changed, 0 insertions, 1107 deletions
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/README b/qemu/roms/u-boot/doc/device-tree-bindings/README
deleted file mode 100644
index 2ea3439a1..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/README
+++ /dev/null
@@ -1,17 +0,0 @@
-Device Tree Bindings Staging Area
-=================================
-
-This directory contains device tree bindings for U-Boot.
-
-These follow along with Linux kernel bindings, with a few additions. By
-adding the files here, U-Boot patches can clearly show thees additions.
-This makes it easier for device tree people to review these additions in
-patches sent to the U-Boot mailing list.
-
-The intent IS to commit these files to U-Boot. Hopefully at some point
-the files will be stored in another repo (shared with Linux) which is
-brought in as needed. Changes here are intended to mirror changes in the
-Linux Documentation/devicetree/bindings/ directory.
-
-sjg@chromium.org
-17-Jan-12
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/clock/nvidia,tegra20-car.txt b/qemu/roms/u-boot/doc/device-tree-bindings/clock/nvidia,tegra20-car.txt
deleted file mode 100644
index 5c07fcaed..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/clock/nvidia,tegra20-car.txt
+++ /dev/null
@@ -1,207 +0,0 @@
-NVIDIA Tegra20 Clock And Reset Controller
-
-This binding uses the common clock binding:
-Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
-for muxing and gating Tegra's clocks, and setting their rates.
-
-Required properties :
-- compatible : Should be "nvidia,tegra20-car"
-- reg : Should contain CAR registers location and length
-- clocks : Should contain phandle and clock specifiers for two clocks:
- the 32 KHz "32k_in", and the board-specific oscillator "osc".
-- #clock-cells : Should be 1.
- In clock consumers, this cell represents the clock ID exposed by the CAR.
-
- The first 96 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB
- registers. These IDs often match those in the CAR's RST_DEVICES registers,
- but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In
- this case, those clocks are assigned IDs above 95 in order to highlight
- this issue. Implementations that interpret these clock IDs as bit values
- within the CLK_OUT_ENB or RST_DEVICES registers should be careful to
- explicitly handle these special cases.
-
- The balance of the clocks controlled by the CAR are assigned IDs of 96 and
- above.
-
- 0 cpu
- 1 unassigned
- 2 unassigned
- 3 ac97
- 4 rtc
- 5 tmr
- 6 uart1
- 7 unassigned (register bit affects uart2 and vfir)
- 8 gpio
- 9 sdmmc2
- 10 unassigned (register bit affects spdif_in and spdif_out)
- 11 i2s1
- 12 i2c1
- 13 ndflash
- 14 sdmmc1
- 15 sdmmc4
- 16 twc
- 17 pwm
- 18 i2s2
- 19 epp
- 20 unassigned (register bit affects vi and vi_sensor)
- 21 2d
- 22 usbd
- 23 isp
- 24 3d
- 25 ide
- 26 disp2
- 27 disp1
- 28 host1x
- 29 vcp
- 30 unassigned
- 31 cache2
-
- 32 mem
- 33 ahbdma
- 34 apbdma
- 35 unassigned
- 36 kbc
- 37 stat_mon
- 38 pmc
- 39 fuse
- 40 kfuse
- 41 sbc1
- 42 snor
- 43 spi1
- 44 sbc2
- 45 xio
- 46 sbc3
- 47 dvc
- 48 dsi
- 49 unassigned (register bit affects tvo and cve)
- 50 mipi
- 51 hdmi
- 52 csi
- 53 tvdac
- 54 i2c2
- 55 uart3
- 56 unassigned
- 57 emc
- 58 usb2
- 59 usb3
- 60 mpe
- 61 vde
- 62 bsea
- 63 bsev
-
- 64 speedo
- 65 uart4
- 66 uart5
- 67 i2c3
- 68 sbc4
- 69 sdmmc3
- 70 pcie
- 71 owr
- 72 afi
- 73 csite
- 74 unassigned
- 75 avpucq
- 76 la
- 77 unassigned
- 78 unassigned
- 79 unassigned
- 80 unassigned
- 81 unassigned
- 82 unassigned
- 83 unassigned
- 84 irama
- 85 iramb
- 86 iramc
- 87 iramd
- 88 cram2
- 89 audio_2x a/k/a audio_2x_sync_clk
- 90 clk_d
- 91 unassigned
- 92 sus
- 93 cdev1
- 94 cdev2
- 95 unassigned
-
- 96 uart2
- 97 vfir
- 98 spdif_in
- 99 spdif_out
- 100 vi
- 101 vi_sensor
- 102 tvo
- 103 cve
- 104 osc
- 105 clk_32k a/k/a clk_s
- 106 clk_m
- 107 sclk
- 108 cclk
- 109 hclk
- 110 pclk
- 111 blink
- 112 pll_a
- 113 pll_a_out0
- 114 pll_c
- 115 pll_c_out1
- 116 pll_d
- 117 pll_d_out0
- 118 pll_e
- 119 pll_m
- 120 pll_m_out1
- 121 pll_p
- 122 pll_p_out1
- 123 pll_p_out2
- 124 pll_p_out3
- 125 pll_p_out4
- 126 pll_s
- 127 pll_u
- 128 pll_x
- 129 cop a/k/a avp
- 130 audio a/k/a audio_sync_clk
-
-Example SoC include file:
-
-/ {
- tegra_car: clock@60006000 {
- compatible = "nvidia,tegra20-car";
- reg = <0x60006000 0x1000>;
- #clock-cells = <1>;
- };
-
- usb@c5004000 {
- clocks = <&tegra_car 58>; /* usb2 */
- };
-};
-
-Example board file:
-
-/ {
- clocks {
- #address-cells = <1>;
- #size-cells = <0>;
-
- osc: clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <12000000>;
- };
- };
-
- i2c@7000d000 {
- pmic@34 {
- compatible = "ti,tps6586x";
- reg = <0x34>;
-
- clk_32k: clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
- };
- };
-
- &tegra_car {
- clocks = <&clk_32k> <&osc>;
- };
-};
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/exynos/dwmmc.txt b/qemu/roms/u-boot/doc/device-tree-bindings/exynos/dwmmc.txt
deleted file mode 100644
index 566da3b63..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/exynos/dwmmc.txt
+++ /dev/null
@@ -1,54 +0,0 @@
-* Exynos 5250 DWC_mobile_storage
-
-The Exynos 5250 provides DWC_mobile_storage interface which supports
-. Embedded Multimedia Cards (EMMC-version 4.5)
-. Secure Digital memory (SD mem-version 2.0)
-. Secure Digital I/O (SDIO-version 3.0)
-. Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1)
-
-The Exynos 5250 DWC_mobile_storage provides four channels.
-SOC specific and Board specific properties are channel specific.
-
-Required SoC Specific Properties:
-
-- compatible: should be
- - samsung,exynos5250-dwmmc: for exynos5250 platforms
-
-- reg: physical base address of the controller and length of memory mapped
- region.
-
-- interrupts: The interrupt number to the cpu.
-
-Required Board Specific Properties:
-
-- #address-cells: should be 1.
-- #size-cells: should be 0.
-- samsung,bus-width: The width of the bus used to interface the devices
- supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO).
- . Typically the bus width is 4 or 8.
-- samsung,timing: The timing values to be written into the
- Drv/sample clock selection register of corresponding channel.
- . It is comprised of 3 values corresponding to the 3 fileds
- 'SelClk_sample', 'SelClk_drv' and 'DIVRATIO' of CLKSEL register.
- . SelClk_sample: Select sample clock among 8 shifted clocks.
- . SelClk_drv: Select drv clock among 8 shifted clocks.
- . DIVRATIO: Clock Divide ratio select.
- . The above 3 values are used by the clock phase shifter.
-
-Example:
-
-mmc@12200000 {
- samsung,bus-width = <8>;
- samsung,timing = <1 3 3>;
- samsung,removable = <1>;
-}
-In the above example,
- . The bus width is 8
- . Timing is comprised of 3 values as explained below
- 1 - SelClk_sample
- 3 - SelClk_drv
- 3 - DIVRATIO
- . The 'removable' flag indicates whether the the particilar device
- cannot be removed (always present) or it is a removable device.
- 1 - Indicates that the device is removable.
- 0 - Indicates that the device cannot be removed.
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/exynos/isp-spi.txt b/qemu/roms/u-boot/doc/device-tree-bindings/exynos/isp-spi.txt
deleted file mode 100644
index b8086e82b..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/exynos/isp-spi.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-Exynos ISP SPI Subsystem
-
-The device node for ISP SPI subsytem.
-Since Peripheral id in EXYNOS is decoded based on Interrupts, currently
-ISP SPI have no individual interrupts hence we add ad dummy interrupt node
-which will have a value beyond the maximum number of interrupts exynos5 can
-support.
-
-Required properties :
- - compatible : Should be "samsung,exynos-spi" for spi.
- - reg : Base adrress of the the subsystem.
- - interrupts : A value which is beyond the maximum number of interrupts
-exynos5 can support.
-
-Example:
-spi@131a0000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "samsung,exynos-spi";
- reg = <0x131a0000 0x30>;
- interrupts = <0 129 0>;
-};
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/exynos/sound.txt b/qemu/roms/u-boot/doc/device-tree-bindings/exynos/sound.txt
deleted file mode 100644
index 98d1798d0..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/exynos/sound.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-Exynos Sound Subsystem
-
-The device node for sound subsytem which contains codec and i2s block
-that is a part of Exynos5250
-
-Required properties :
- - compatible : Should be "samsung,exynos-sound" for sound
- - samsung,i2s-epll-clock-frequency : epll clock output frequency in Hz
- - samsung,i2s-sampling-rate : sampling rate, default is 48000
- - samsung,i2s-bits-per-sample : sample width, defalut is 16 bit
- - samsung,i2s-channels : nummber of channels, default is 2
- - samsung,i2s-lr-clk-framesize : lr clock frame size
- - samsung,i2s-bit-clk-framesize : bit clock frame size
- - samsung,codec-type : sound codec type
-
-Example:
-
-sound@12d60000 {
- compatible = "samsung,exynos-sound"
- samsung,i2s-epll-clock-frequency = <192000000>;
- samsung,i2s-sampling-rate = <48000>;
- samsung,i2s-bits-per-sample = <16>;
- samsung,i2s-channels = <2>;
- samsung,i2s-lr-clk-framesize = <256>;
- samsung,i2s-bit-clk-framesize = <32>;
- samsung,codec-type = "wm8994";
-};
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/exynos/tmu.txt b/qemu/roms/u-boot/doc/device-tree-bindings/exynos/tmu.txt
deleted file mode 100644
index 89d3bf05f..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/exynos/tmu.txt
+++ /dev/null
@@ -1,44 +0,0 @@
-Exynos Thermal management Unit
-
-Required properties:
-
- - compatible : Should be "samsung,exynos-tmu" for TMU
- - samsung,min-temp : Minimum temperature value (25 degree celsius)
- - Current temperature of SoC should be more than this value.
- - samsung,max-temp : Maximum temperature value (125 degree celsius)
- - Current temperature of SoC should be less than this value.
- - samsung,start-warning : Temperature at which TMU starts giving warning (degree celsius)
- - samsung,start-tripping : Temperature at which TMU shuts down the system (degree celsius)
- - samsung,hw-tripping : Temperature at which hardware tripping should happen
- in case TMU fails to power off (degree celsius)
- - samsung,efuse-min-value : SOC efuse min value (Constant 40)
- - efuse-value should be more than this value.
- - samsung,efuse-value : SOC actual efuse value (Literal value)
- - This is the data trimming info.
- - This value is used to calculate measuring error.
- - samsung,efuse-max-value : SoC max efuse value (Constant 100)
- - efuse-value should be less than this value.
- - samsung,slope : Default value 274761730 (Constant 0x1060_8802).
- - This is the default value for TMU_CONTROL register.
- - It sets the gain of amplifier to the positive-tc generator block.
- - It selects thermal tripping mode and enables thermal tripping.
- - samsung,dc-value : Measured data calibration value (Constant 25)
- - Used for tempearture calculation.
- - This is 25 because temperature measured is always above 25 degrees.
-
-
-Example:
-
-tmu@10060000 {
- compatible = "samsung,exynos-tmu"
- samsung,min-temp = <25>;
- samsung,max-temp = <125>;
- samsung,start-warning = <95>;
- samsung,start-tripping = <105>;
- samsung,hw-tripping = <110>;
- samsung,efuse-min-value = <40>;
- samsung,efuse-value = <55>;
- samsung,efuse-max-value = <100>;
- samsung,slope = <274761730>;
- samsung,dc-value = <25>;
-};
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/i2c/tegra20-i2c.txt b/qemu/roms/u-boot/doc/device-tree-bindings/i2c/tegra20-i2c.txt
deleted file mode 100644
index 72649dffa..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/i2c/tegra20-i2c.txt
+++ /dev/null
@@ -1,23 +0,0 @@
-(Placeholder note while we locate the kernel Tegra20 bindings)
-
-Added in U-Boot:
-
-Required properties:
- - clocks : Two clocks must be given, each as a phandle to the Tegra's
- CAR node and the clock number as a parameter:
- - the I2C clock to use for the peripheral
- - the pll_p_out3 clock, which can be used for fast operation. This
- does not change and is the same for all I2C nodes.
-
-Example:
-(TODO: merge with existing example):
-
- i2c@7000c400 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "nvidia,tegra20-i2c";
- reg = <0x7000C400 0x100>;
- interrupts = < 116 >;
- /* PERIPH_ID_I2C2, PLL_P_OUT3 */
- clocks = <&tegra_car 54>, <&tegra_car 124>;
- };
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/input/cros-ec-keyb.txt b/qemu/roms/u-boot/doc/device-tree-bindings/input/cros-ec-keyb.txt
deleted file mode 100644
index 311827607..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/input/cros-ec-keyb.txt
+++ /dev/null
@@ -1,79 +0,0 @@
-CROS_EC Keyboard
-
-The CROS_EC (Matrix Keyboard Protocol) allows communcation with a secondary
-micro used for keyboard, and possible other features.
-
-The CROS_EC keyboard uses this protocol to receive key scans and produce input
-in U-Boot.
-
-Required properties :
-- compatible : "google,cros-ec-keyb"
-- google,key-rows : Number of key rows
-- google,key-columns : Number of key columns
-
-Optional properties, in addition to those specified by the shared
-matrix-keyboard bindings:
-
-- linux,fn-keymap: a second keymap, same specification as the
- matrix-keyboard-controller spec but to be used when the KEY_FN modifier
- key is pressed.
-- google,repeat-delay-ms : delay in milliseconds before repeat starts
-- google,repeat-rate-ms : delay between each subsequent key press
-- google,ghost-filter : enable ghost filtering for this device
-
-Example, taken from daisy:
-
-cros-ec-keyb {
- compatible = "google,cros-ec-keyb";
- google,key-rows = <8>;
- google,key-columns = <13>;
- google,ghost-filter;
- google,repeat-delay-ms = <240>;
- google,repeat-rate-ms = <30>;
- /*
- * Keymap entries take the form of 0xRRCCKKKK where
- * RR=Row CC=Column KKKK=Key Code
- * The values below are for a US keyboard layout and
- * are taken from the Linux driver. Note that the
- * 102ND key is not used for US keyboards.
- */
- linux,keymap = <
- /* CAPSLCK F1 B F10 */
- 0x0001003a 0x0002003c 0x00030030 0x00040044
- /* N = R_ALT ESC */
- 0x00060031 0x0008000d 0x000a0064 0x01010001
- /* F4 G F7 H */
- 0x0102003e 0x01030022 0x01040041 0x01060023
- /* ' F9 BKSPACE L_CTRL */
- 0x01080028 0x01090043 0x010b000e 0x0200001d
- /* TAB F3 T F6 */
- 0x0201000f 0x0202003d 0x02030014 0x02040040
- /* ] Y 102ND [ */
- 0x0205001b 0x02060015 0x02070056 0x0208001a
- /* F8 GRAVE F2 5 */
- 0x02090042 0x03010029 0x0302003c 0x03030006
- /* F5 6 - \ */
- 0x0304003f 0x03060007 0x0308000c 0x030b002b
- /* R_CTRL A D F */
- 0x04000061 0x0401001e 0x04020020 0x04030021
- /* S K J ; */
- 0x0404001f 0x04050025 0x04060024 0x04080027
- /* L ENTER Z C */
- 0x04090026 0x040b001c 0x0501002c 0x0502002e
- /* V X , M */
- 0x0503002f 0x0504002d 0x05050033 0x05060032
- /* L_SHIFT / . SPACE */
- 0x0507002a 0x05080035 0x05090034 0x050B0039
- /* 1 3 4 2 */
- 0x06010002 0x06020004 0x06030005 0x06040003
- /* 8 7 0 9 */
- 0x06050009 0x06060008 0x0608000b 0x0609000a
- /* L_ALT DOWN RIGHT Q */
- 0x060a0038 0x060b006c 0x060c006a 0x07010010
- /* E R W I */
- 0x07020012 0x07030013 0x07040011 0x07050017
- /* U R_SHIFT P O */
- 0x07060016 0x07070036 0x07080019 0x07090018
- /* UP LEFT */
- 0x070b0067 0x070c0069>;
-};
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/misc/cros-ec.txt b/qemu/roms/u-boot/doc/device-tree-bindings/misc/cros-ec.txt
deleted file mode 100644
index 07ea7cdea..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/misc/cros-ec.txt
+++ /dev/null
@@ -1,38 +0,0 @@
-Chrome OS CROS_EC Binding
-======================
-
-The device tree node which describes the operation of the CROS_EC interface
-is as follows:
-
-Required properties :
-- compatible = "google,cros-ec"
-
-Optional properties :
-- spi-max-frequency : Sets the maximum frequency (in Hz) for SPI bus
- operation
-- i2c-max-frequency : Sets the maximum frequency (in Hz) for I2C bus
- operation
-- ec-interrupt : Selects the EC interrupt, defined as a GPIO according
- to the platform
-- optimise-flash-write : Boolean property - if present then flash blocks
- containing all 0xff will not be written, since we assume that the EC
- uses that pattern for erased blocks
-
-The CROS_EC node should appear as a subnode of the interrupt that connects it
-to the EC (e.g. i2c, spi, lpc). The reg property (as usual) will indicate
-the unit address on that bus.
-
-
-Example
-=======
-
- spi@131b0000 {
- cros-ec@0 {
- reg = <0>;
- compatible = "google,cros-ec";
- spi-max-frequency = <5000000>;
- ec-interrupt = <&gpio 174 1>;
- optimise-flash-write;
- status = "disabled";
- };
- };
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/nand/nvidia,tegra20-nand.txt b/qemu/roms/u-boot/doc/device-tree-bindings/nand/nvidia,tegra20-nand.txt
deleted file mode 100644
index 86ae4082d..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/nand/nvidia,tegra20-nand.txt
+++ /dev/null
@@ -1,53 +0,0 @@
-NAND Flash
-----------
-
-(there isn't yet a generic binding in Linux, so this describes what is in
-U-Boot. There should not be Linux-specific or U-Boot specific binding, just
-a binding that describes this hardware. But agreeing a binding in Linux in
-the absence of a driver may be beyond my powers.)
-
-The device node for a NAND flash device is as follows:
-
-Required properties :
- - compatible : Should be "manufacturer,device", "nand-flash"
-
-This node should sit inside its controller.
-
-
-Nvidia NAND Controller
-----------------------
-
-The device node for a NAND flash controller is as follows:
-
-Optional properties:
-
-nvidia,wp-gpios : GPIO of write-protect line, three cells in the format:
- phandle, parameter, flags
-nvidia,nand-width : bus width of the NAND device in bits
-
- - nvidia,nand-timing : Timing parameters for the NAND. Each is in ns.
- Order is: MAX_TRP_TREA, TWB, Max(tCS, tCH, tALS, tALH),
- TWHR, Max(tCS, tCH, tALS, tALH), TWH, TWP, TRH, TADL
-
- MAX_TRP_TREA is:
- non-EDO mode: Max(tRP, tREA) + 6ns
- EDO mode: tRP timing
-
-The 'reg' property should provide the chip select used by the flash chip.
-
-
-Example
--------
-
-nand-controller@0x70008000 {
- compatible = "nvidia,tegra20-nand";
- #address-cells = <1>;
- #size-cells = <0>;
- nvidia,wp-gpios = <&gpio 59 0>; /* PH3 */
- nvidia,nand-width = <8>;
- nvidia,timing = <26 100 20 80 20 10 12 10 70>;
- nand@0 {
- reg = <0>;
- compatible = "hynix,hy27uf4g2b", "nand-flash";
- };
-};
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/pwm/tegra20-pwm.txt b/qemu/roms/u-boot/doc/device-tree-bindings/pwm/tegra20-pwm.txt
deleted file mode 100644
index 01438ecd6..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/pwm/tegra20-pwm.txt
+++ /dev/null
@@ -1,18 +0,0 @@
-Tegra SoC PWFM controller
-
-Required properties:
-- compatible: should be one of:
- - "nvidia,tegra20-pwm"
- - "nvidia,tegra30-pwm"
-- reg: physical base address and length of the controller's registers
-- #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The
- first cell specifies the per-chip index of the PWM to use and the second
- cell is the period in nanoseconds.
-
-Example:
-
- pwm: pwm@7000a000 {
- compatible = "nvidia,tegra20-pwm";
- reg = <0x7000a000 0x100>;
- #pwm-cells = <2>;
- };
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/spi/spi-bus.txt b/qemu/roms/u-boot/doc/device-tree-bindings/spi/spi-bus.txt
deleted file mode 100644
index 800dafe5b..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/spi/spi-bus.txt
+++ /dev/null
@@ -1,92 +0,0 @@
-SPI (Serial Peripheral Interface) busses
-
-SPI busses can be described with a node for the SPI master device
-and a set of child nodes for each SPI slave on the bus. For this
-discussion, it is assumed that the system's SPI controller is in
-SPI master mode. This binding does not describe SPI controllers
-in slave mode.
-
-The SPI master node requires the following properties:
-- #address-cells - number of cells required to define a chip select
- address on the SPI bus.
-- #size-cells - should be zero.
-- compatible - name of SPI bus controller following generic names
- recommended practice.
-- cs-gpios - (optional) gpios chip select.
-No other properties are required in the SPI bus node. It is assumed
-that a driver for an SPI bus device will understand that it is an SPI bus.
-However, the binding does not attempt to define the specific method for
-assigning chip select numbers. Since SPI chip select configuration is
-flexible and non-standardized, it is left out of this binding with the
-assumption that board specific platform code will be used to manage
-chip selects. Individual drivers can define additional properties to
-support describing the chip select layout.
-
-Optional property:
-- num-cs : total number of chipselects
-
-If cs-gpios is used the number of chip select will automatically increased
-with max(cs-gpios > hw cs)
-
-So if for example the controller has 2 CS lines, and the cs-gpios
-property looks like this:
-
-cs-gpios = <&gpio1 0 0> <0> <&gpio1 1 0> <&gpio1 2 0>;
-
-Then it should be configured so that num_chipselect = 4 with the
-following mapping:
-
-cs0 : &gpio1 0 0
-cs1 : native
-cs2 : &gpio1 1 0
-cs3 : &gpio1 2 0
-
-SPI slave nodes must be children of the SPI master node and can
-contain the following properties.
-- reg - (required) chip select address of device.
-- compatible - (required) name of SPI device following generic names
- recommended practice
-- spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz
-- spi-cpol - (optional) Empty property indicating device requires
- inverse clock polarity (CPOL) mode
-- spi-cpha - (optional) Empty property indicating device requires
- shifted clock phase (CPHA) mode
-- spi-cs-high - (optional) Empty property indicating device requires
- chip select active high
-- spi-3wire - (optional) Empty property indicating device requires
- 3-wire mode.
-- spi-tx-bus-width - (optional) The bus width(number of data wires) that
- used for MOSI. Defaults to 1 if not present.
-- spi-rx-bus-width - (optional) The bus width(number of data wires) that
- used for MISO. Defaults to 1 if not present.
-
-Some SPI controllers and devices support Dual and Quad SPI transfer mode.
-It allows data in SPI system transfered in 2 wires(DUAL) or 4 wires(QUAD).
-Now the value that spi-tx-bus-width and spi-rx-bus-width can receive is
-only 1(SINGLE), 2(DUAL) and 4(QUAD).
-Dual/Quad mode is not allowed when 3-wire mode is used.
-
-If a gpio chipselect is used for the SPI slave the gpio number will be passed
-via the cs_gpio
-
-SPI example for an MPC5200 SPI bus:
- spi@f00 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
- reg = <0xf00 0x20>;
- interrupts = <2 13 0 2 14 0>;
- interrupt-parent = <&mpc5200_pic>;
-
- ethernet-switch@0 {
- compatible = "micrel,ks8995m";
- spi-max-frequency = <1000000>;
- reg = <0>;
- };
-
- codec@1 {
- compatible = "ti,tlv320aic26";
- spi-max-frequency = <100000>;
- reg = <1>;
- };
- };
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/usb/tegra-usb.txt b/qemu/roms/u-boot/doc/device-tree-bindings/usb/tegra-usb.txt
deleted file mode 100644
index 5282d44ac..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/usb/tegra-usb.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-Tegra SOC USB controllers
-
-The device node for a USB controller that is part of a Tegra
-SOC is as described in the document "Open Firmware Recommended
-Practice : Universal Serial Bus" with the following modifications
-and additions :
-
-Required properties :
- - compatible : Should be "nvidia,tegra20-ehci" for USB controllers
- used in host mode.
- - phy_type : Should be one of "ulpi" or "utmi".
- - nvidia,vbus-gpio : If present, specifies a gpio that needs to be
- activated for the bus to be powered.
-
-Optional properties:
- - dr_mode : dual role mode. Indicates the working mode for
- nvidia,tegra20-ehci compatible controllers. Can be "host", "peripheral",
- or "otg". Default to "host" if not defined for backward compatibility.
- host means this is a host controller
- peripheral means it is device controller
- otg means it can operate as either ("on the go")
- - nvidia,has-legacy-mode : boolean indicates whether this controller can
- operate in legacy mode (as APX 2500 / 2600). In legacy mode some
- registers are accessed through the APB_MISC base address instead of
- the USB controller.
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/video/displaymode.txt b/qemu/roms/u-boot/doc/device-tree-bindings/video/displaymode.txt
deleted file mode 100644
index 45ca42db5..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/video/displaymode.txt
+++ /dev/null
@@ -1,42 +0,0 @@
-videomode bindings
-==================
-
-(from http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html)
-
-Required properties:
- - xres, yres: Display resolution
- - left-margin, right-margin, hsync-len: Horizontal Display timing
- parameters in pixels
- - upper-margin, lower-margin, vsync-len: Vertical display timing
- parameters in lines
- - clock: display clock in Hz
-
-Optional properties:
- - width-mm, height-mm: Display dimensions in mm
- - hsync-active-high (bool): Hsync pulse is active high
- - vsync-active-high (bool): Vsync pulse is active high
- - interlaced (bool): This is an interlaced mode
- - doublescan (bool): This is a doublescan mode
-
-There are different ways of describing a display mode. The devicetree
-representation corresponds to the one used by the Linux Framebuffer
-framework described here in Documentation/fb/framebuffer.txt. This
-representation has been chosen because it's the only format which does
-not allow for inconsistent parameters. Unlike the Framebuffer framework
-the devicetree has the clock in Hz instead of ps.
-
-Example:
-
- display@0 {
- /* 1920x1080p24 */
- clock = <52000000>;
- xres = <1920>;
- yres = <1080>;
- left-margin = <25>;
- right-margin = <25>;
- hsync-len = <25>;
- lower-margin = <2>;
- upper-margin = <2>;
- vsync-len = <2>;
- hsync-active-high;
- };
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/video/exynos-dp.txt b/qemu/roms/u-boot/doc/device-tree-bindings/video/exynos-dp.txt
deleted file mode 100644
index 464a85302..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/video/exynos-dp.txt
+++ /dev/null
@@ -1,69 +0,0 @@
-Exynos Display port controller
-==============================
-
-Required properties:
-SOC specific:
- compatible: should be "samsung,exynos5-dp"
- reg: Base address of DP IP
-
-Optional properties:
- samsung,h-res: X resolution of the panel
- samsung,h-sync-width: hsync value
- samsung,h-back-porch: left margin
- samsung,h-front-porch right margin
- samsung,v-res: Y resolution of the panel
- samsung,v-sync-width: vsync value
- samsung,v-back-porch: upper margin
- samsung,v-front-porch: lower margin
- samsung,v-sync-rate: refresh rate
-
- samsung,lt-status: Link training status
- 0(DP_LT_NONE), 1(DP_LT_START), 2(DP_LT_CR), 3(DP_LT_ET),
- 4(DP_LT_FINISHED), 5(DP_LT_FAIL)
-
- samsung,master-mode: 1 if you want to run DP as master, else 0
- samsung,bist-mode: 1 to enable video bist mode, else 0
- samsung,bist-pattern: bist mode pattern type
- 0(NO_PATTERN), 1(COLOR_RAMP), 2(BALCK_WHITE_V_LINES),
- 3(COLOR_SQUARE), 4(INVALID_PATTERN), 5(COLORBAR_32),
- 6(COLORBAR_64),7(WHITE_GRAY_BALCKBAR_32),
- 8(WHITE_GRAY_BALCKBAR_64),9(MOBILE_WHITEBAR_32),
- 10(MOBILE_WHITEBAR_64)
- samsung,h-sync-polarity: Horizontal Sync polarity
- CONFIG_SYS_LOW if defined, else CONFIG_SYS_HIGH
- samsung,v-sync-polarity: Vertical Sync polarity
- CONFIG_SYS_LOW if defined, else CONFIG_SYS_HIGH
- samsung,interlaced: Progressive if 0, else Interlaced
- samsung,color-space: input video data format
- COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2
- samsung,dynamic-range: dynamic range for input video data
- VESA = 0, CEA = 1
- samsung,ycbcr-coeff: YCbCr co-efficients for input video
- COLOR_YCBCR601 = 0, COLOR_YCBCR709 = 1
- samsung,color-depth: number of bits per colour component
- COLOR_6 = 0, COLOR_8 = 1, COLOR_10 = 2, COLOR_12 = 3
-
-Example:
-SOC specific part:
- dp@145b0000 {
- compatible = "samsung,exynos5-dp";
- reg = <0x145b0000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
-
-Board(panel) specific part:
- dp@145b0000 {
- samsung,lt-status = <0>;
-
- samsung,master-mode = <0>;
- samsung,bist-mode = <0>;
- samsung,bist-pattern = <0>;
- samsung,h-sync-polarity = <0>;
- samsung,v-sync-polarity = <0>;
- samsung,interlaced = <0>;
- samsung,color-space = <0>;
- samsung,dynamic-range = <0>;
- samsung,ycbcr-coeff = <0>;
- samsung,color-depth = <1>;
- };
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/video/exynos-fb.txt b/qemu/roms/u-boot/doc/device-tree-bindings/video/exynos-fb.txt
deleted file mode 100644
index bb7441cbb..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/video/exynos-fb.txt
+++ /dev/null
@@ -1,92 +0,0 @@
-Exynos Display Controller
-=========================
-Required properties:
-SOC specific:
- compatible: should be "samsung,exynos-fimd"
- reg: Base address of FIMD IP.
-
-Board(panel specific):
- samsung,vl-col: X resolution of the panel
- samsung,vl-row: Y resolution of the panel
- samsung,vl-freq: Refresh rate
- samsung,vl-bpix: Bits per pixel
- samsung,vl-hspw: Hsync value
- samsung,vl-hfpd: Right margin
- samsung,vl-hbpd: Left margin
- samsung,vl-vspw: Vsync value
- samsung,vl-vfpd: Lower margin
- samsung,vl-vbpd: Upper margin
-
-Optional properties:
-Board(panel specific):
- samsung,vl-width: width of display area in mm
- samsung,vl-height: Height of display area in mm
-
- samsung,vl-clkp: Clock polarity
- CONFIG_SYS_LOW if defined, else CONFIG_SYS_HIGH
- samsung,vl-oep: Output Enable polarity
- CONFIG_SYS_LOW if defined, else CONFIG_SYS_HIGH
- samsung,vl-hsp: Horizontal Sync polarity
- CONFIG_SYS_LOW if defined, else CONFIG_SYS_HIGH
- samsung,vl-vsp: Vertical Sync polarity
- CONFIG_SYS_LOW if defined, else CONFIG_SYS_HIGH
- samsung,vl-dp: Data polarity
- CONFIG_SYS_LOW if defined, else CONFIG_SYS_HIGH
-
- samsung,vl-cmd-allow-len: Wait end of frame
- samsung,winid: Window number on which data is to be displayed
- samsung,init-delay: Delay before LCD initialization starts
- samsung,power-on-delay: Delay after LCD is powered on
- samsung,reset-delay: Delay after LCD is reset
- samsung,interface-mode: 1(FIMD_RGB_INTERFACE), 2(FIMD_CPU_INTERFACE)
- samsung,mipi-enabled: 1 if you want to use MIPI, else 0
- samsung,dp-enabled: 1is you want to use DP, else 0
- samsung,cs-setup: cs_setup value in FIMD_CPU_INTERFACE mode.
- samsung,wr-setup: wr_setup value in FIMD_CPU_INTERFACE mode.
- samsung,wr-act: wr_act value in FIMD_CPU_INTERFACE mode.
- samsung,wr-hold: wr_hold value in FIMD_CPU_INTERFACE mode.
- samsung,logo-on: 1 if you want to use custom logo.
- 0 if you want LCD console.
- samsung,logo-width: pixel width of logo image. Valid if logo_on = 1
- samsung,logo-height: pixel height of logo image. Valid if logo_on = 1
- samsung,logo-addr: Address of logo image. Valid if logo_on = 1
- samsung,rgb-mode: 0(MODE_RGB_P), 1(MODE_BGR_P),
- 2(MODE_RGB_S), 3(MODE_BGR_S)
- samsung,pclk-name: parent clock identifier: 1(MPLL), 2(EPLL), 3(VPLL)
- samsung,sclk-div: parent_clock/source_clock ratio
- samsung,dual-lcd-enabled: 1 if you support two LCD, else 0
-
-Example:
-SOC specific part:
- fimd@14400000 {
- compatible = "samsung,exynos-fimd";
- reg = <0x14400000 0x10000>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
-
-Board specific part:
- fimd@14400000 {
- samsung,vl-freq = <60>;
- samsung,vl-col = <2560>;
- samsung,vl-row = <1600>;
- samsung,vl-width = <2560>;
- samsung,vl-height = <1600>;
-
- samsung,vl-clkp;
- samsung,vl-dp;
- samsung,vl-bpix = <4>;
-
- samsung,vl-hspw = <32>;
- samsung,vl-hbpd = <80>;
- samsung,vl-hfpd = <48>;
- samsung,vl-vspw = <6>;
- samsung,vl-vbpd = <37>;
- samsung,vl-vfpd = <3>;
- samsung,vl-cmd-allow-len = <0xf>;
-
- samsung,winid = <3>;
- samsung,interface-mode = <1>;
- samsung,dp-enabled = <1>;
- samsung,dual-lcd-enabled = <0>;
- };
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/video/exynos_mipi_dsi.txt b/qemu/roms/u-boot/doc/device-tree-bindings/video/exynos_mipi_dsi.txt
deleted file mode 100644
index 4938ea01e..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/video/exynos_mipi_dsi.txt
+++ /dev/null
@@ -1,82 +0,0 @@
-Exynos MIPI-DSIM Controller
-=========================
-
-Required properties:
-SOC specific:
- compatible: should be "samsung,exynos-mipi-dsi"
- reg: Base address of MIPI-DSIM IP.
-
-Board specific:
- samsung,dsim-config-e-interface: interface to be used (RGB interface
- for main display or CPU interface for main or sub display).
- samsung,dsim-config-e-virtual-ch: virtual channel number that main
- or sub display uses.
- samsung,dsim-config-e-pixel-format: pixel stream format for main
- or sub display.
- samsung,dsim-config-e-burst-mode: selects Burst mode in Video mode.
- in Non-burst mode, RGB data area is filled with RGB data and
- NULL packets, according to input bandwidth of RGB interface.
- samsung,dsim-config-e-no-data-lane: data lane count used by Master.
- samsung,dsim-config-e-byte-clk: select byte clock source.
- It must be DSIM_PLL_OUT_DIV8.
- DSIM_EXT_CLK_DIV8 and DSIM_EXT_CLK_BYPASSS are not supported.
- samsung,dsim-config-hfp: HFP disable mode.
- If set, DSI master ignores HFP area in VIDEO mode.
- In command mode, this variable is ignored.
- samsung,dsim-config-p: P value for PMS setting.
- samsung,dsim-config-m: M value for PMS setting.
- samsung,dsim-config-s: S value for PMS setting.
- samsung,dsim-config-pll-stable-time: the PLL Timer for stability
- of the ganerated clock.
- samsung,dsim-config-esc-clk: escape clock frequency for getting
- the escape clock prescaler value.
- samsung,dsim-config-stop-holding-cnt: the interval value between
- transmitting read packet (or write "set_tear_on" command)
- and BTA request. After transmitting read packet or write
- "set_tear_on" command, BTA requests to D-PHY automatically.
- This counter value specifies the interval between them.
- samsung,dsim-config-bta-timeout: the timer for BTA. This register
- specifies time out from BTA request to change the direction
- with respect to Tx escape clock.
- samsung,dsim-config-rx-timeout: the timer for LP Rx mode timeout.
- this register specifies time out on how long RxValid deasserts,
- after RxLpdt asserts with respect to Tx escape clock.
- - RxValid specifies Rx data valid indicator.
- - RxLpdt specifies an indicator that D-PHY is under RxLpdt mode
- - RxValid and RxLpdt specifies signal from D-PHY.
- samsung,dsim-device-name: name of the device.
- samsung,dsim-device-id: unique device id.
- samsung,dsim-device-bus_id: bus id for identifing connected bus
- and this bus id should be same as id of mipi_dsim_device.
-
-Optional properties:
- samsung,dsim-device-reverse-panel: reverse panel.
-
-Example:
- mipidsi@11c80000 {
- compatible = "samsung,exynos-mipi-dsi";
- reg = <0x11c80000 0x5c>;
-
- samsung,dsim-config-e-interface = <1>;
- samsung,dsim-config-e-virtual-ch = <0>;
- samsung,dsim-config-e-pixel-format = <7>;
- samsung,dsim-config-e-burst-mode = <1>;
- samsung,dsim-config-e-no-data-lane = <3>;
- samsung,dsim-config-e-byte-clk = <0>;
- samsung,dsim-config-hfp = <1>;
-
- samsung,dsim-config-p = <3>;
- samsung,dsim-config-m = <120>;
- samsung,dsim-config-s = <1>;
-
- samsung,dsim-config-pll-stable-time = <500>;
- samsung,dsim-config-esc-clk = <20000000>;
- samsung,dsim-config-stop-holding-cnt = <0x7ff>;
- samsung,dsim-config-bta-timeout = <0xff>;
- samsung,dsim-config-rx-timeout = <0xffff>;
-
- samsung,dsim-device-id = <0xffffffff>;
- samsung,dsim-device-bus-id = <0>;
-
- samsung,dsim-device-reverse-panel = <1>;
- };
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/video/sandbox-fb.txt b/qemu/roms/u-boot/doc/device-tree-bindings/video/sandbox-fb.txt
deleted file mode 100644
index eb91b30e3..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/video/sandbox-fb.txt
+++ /dev/null
@@ -1,13 +0,0 @@
-Sandbox LCD
-===========
-
-This uses the displaymode.txt binding except that only xres and yres are
-required properties.
-
-Example:
-
- lcd {
- compatible = "sandbox,lcd-sdl";
- xres = <800>;
- yres = <600>;
- };
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/video/simple-framebuffer.txt b/qemu/roms/u-boot/doc/device-tree-bindings/video/simple-framebuffer.txt
deleted file mode 100644
index 3ea460583..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/video/simple-framebuffer.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-Simple Framebuffer
-
-A simple frame-buffer describes a raw memory region that may be rendered to,
-with the assumption that the display hardware has already been set up to scan
-out from that buffer.
-
-Required properties:
-- compatible: "simple-framebuffer"
-- reg: Should contain the location and size of the framebuffer memory.
-- width: The width of the framebuffer in pixels.
-- height: The height of the framebuffer in pixels.
-- stride: The number of bytes in each line of the framebuffer.
-- format: The format of the framebuffer surface. Valid values are:
- - r5g6b5 (16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b).
-
-Example:
-
- framebuffer {
- compatible = "simple-framebuffer";
- reg = <0x1d385000 (1600 * 1200 * 2)>;
- width = <1600>;
- height = <1200>;
- stride = <(1600 * 2)>;
- format = "r5g6b5";
- };
diff --git a/qemu/roms/u-boot/doc/device-tree-bindings/video/tegra20-dc.txt b/qemu/roms/u-boot/doc/device-tree-bindings/video/tegra20-dc.txt
deleted file mode 100644
index 4731c3fba..000000000
--- a/qemu/roms/u-boot/doc/device-tree-bindings/video/tegra20-dc.txt
+++ /dev/null
@@ -1,85 +0,0 @@
-Display Controller
-------------------
-
-(there isn't yet a generic binding in Linux, so this describes what is in
-U-Boot, and may change based on Linux activity)
-
-The device node for a display device is as described in the document
-"Open Firmware Recommended Practice : Universal Serial Bus" with the
-following modifications and additions :
-
-Required properties :
- - compatible : Should be "nvidia,tegra20-dc"
-
-Required subnode 'rgb' is as follows:
-
-Required properties (rgb) :
- - nvidia,panel : phandle of LCD panel information
-
-
-The panel node describes the panel itself. This has the properties listed in
-displaymode.txt as well as:
-
-Required properties (panel) :
- - nvidia,bits-per-pixel: number of bits per pixel (depth)
- - nvidia,pwm : pwm to use to set display contrast (see tegra20-pwm.txt)
- - nvidia,panel-timings: 4 cells containing required timings in ms:
- * delay before asserting panel_vdd
- * delay between panel_vdd-rise and data-rise
- * delay between data-rise and backlight_vdd-rise
- * delay between backlight_vdd and pwm-rise
- * delay between pwm-rise and backlight_en-rise
-
-Optional GPIO properies all have (phandle, GPIO number, flags):
- - nvidia,backlight-enable-gpios: backlight enable GPIO
- - nvidia,lvds-shutdown-gpios: LVDS power shutdown GPIO
- - nvidia,backlight-vdd-gpios: backlight power GPIO
- - nvidia,panel-vdd-gpios: panel power GPIO
-
-Example:
-
-host1x {
- compatible = "nvidia,tegra20-host1x", "simple-bus";
- reg = <0x50000000 0x00024000>;
- interrupts = <0 65 0x04 /* mpcore syncpt */
- 0 67 0x04>; /* mpcore general */
-
- #address-cells = <1>;
- #size-cells = <1>;
- status = "okay";
-
- ranges = <0x54000000 0x54000000 0x04000000>;
-
- dc@54200000 {
- compatible = "nvidia,tegra20-dc";
- reg = <0x54200000 0x00040000>;
- interrupts = <0 73 0x04>;
- status = "okay";
-
- rgb {
- status = "okay";
- nvidia,panel = <&lcd_panel>;
- };
- };
-};
-
-lcd_panel: panel {
- /* Seaboard has 1366x768 */
- clock = <70600000>;
- xres = <1366>;
- yres = <768>;
- left-margin = <58>;
- right-margin = <58>;
- hsync-len = <58>;
- lower-margin = <4>;
- upper-margin = <4>;
- vsync-len = <4>;
- hsync-active-high;
- nvidia,bits-per-pixel = <16>;
- nvidia,pwm = <&pwm 2 0>;
- nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */
- nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
- nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
- nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
- nvidia,panel-timings = <400 4 203 17 15>;
-};