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-rw-r--r--qemu/roms/u-boot/board/xilinx/zynq/Makefile9
-rw-r--r--qemu/roms/u-boot/board/xilinx/zynq/board.c162
-rw-r--r--qemu/roms/u-boot/board/xilinx/zynq/ps7_init.c12
3 files changed, 183 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/xilinx/zynq/Makefile b/qemu/roms/u-boot/board/xilinx/zynq/Makefile
new file mode 100644
index 000000000..3f19a1cd8
--- /dev/null
+++ b/qemu/roms/u-boot/board/xilinx/zynq/Makefile
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := board.o
+obj-$(CONFIG_SPL_BUILD) += ps7_init.o
diff --git a/qemu/roms/u-boot/board/xilinx/zynq/board.c b/qemu/roms/u-boot/board/xilinx/zynq/board.c
new file mode 100644
index 000000000..c8cc2bc93
--- /dev/null
+++ b/qemu/roms/u-boot/board/xilinx/zynq/board.c
@@ -0,0 +1,162 @@
+/*
+ * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <netdev.h>
+#include <zynqpl.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/sys_proto.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_FPGA
+xilinx_desc fpga;
+
+/* It can be done differently */
+xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
+xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15);
+xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
+xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
+xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
+xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100);
+#endif
+
+int board_init(void)
+{
+#ifdef CONFIG_FPGA
+ u32 idcode;
+
+ idcode = zynq_slcr_get_idcode();
+
+ switch (idcode) {
+ case XILINX_ZYNQ_7010:
+ fpga = fpga010;
+ break;
+ case XILINX_ZYNQ_7015:
+ fpga = fpga015;
+ break;
+ case XILINX_ZYNQ_7020:
+ fpga = fpga020;
+ break;
+ case XILINX_ZYNQ_7030:
+ fpga = fpga030;
+ break;
+ case XILINX_ZYNQ_7045:
+ fpga = fpga045;
+ break;
+ case XILINX_ZYNQ_7100:
+ fpga = fpga100;
+ break;
+ }
+#endif
+
+#ifdef CONFIG_FPGA
+ fpga_init();
+ fpga_add(fpga_xilinx, &fpga);
+#endif
+
+ return 0;
+}
+
+int board_late_init(void)
+{
+ switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
+ case ZYNQ_BM_NOR:
+ setenv("modeboot", "norboot");
+ break;
+ case ZYNQ_BM_SD:
+ setenv("modeboot", "sdboot");
+ break;
+ case ZYNQ_BM_JTAG:
+ setenv("modeboot", "jtagboot");
+ break;
+ default:
+ setenv("modeboot", "");
+ break;
+ }
+
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ u32 ret = 0;
+
+#ifdef CONFIG_XILINX_AXIEMAC
+ ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
+ XILINX_AXIDMA_BASEADDR);
+#endif
+#ifdef CONFIG_XILINX_EMACLITE
+ u32 txpp = 0;
+ u32 rxpp = 0;
+# ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
+ txpp = 1;
+# endif
+# ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
+ rxpp = 1;
+# endif
+ ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
+ txpp, rxpp);
+#endif
+
+#if defined(CONFIG_ZYNQ_GEM)
+# if defined(CONFIG_ZYNQ_GEM0)
+ ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0,
+ CONFIG_ZYNQ_GEM_PHY_ADDR0, 0);
+# endif
+# if defined(CONFIG_ZYNQ_GEM1)
+ ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR1,
+ CONFIG_ZYNQ_GEM_PHY_ADDR1, 0);
+# endif
+#endif
+ return ret;
+}
+
+#ifdef CONFIG_CMD_MMC
+int board_mmc_init(bd_t *bd)
+{
+ int ret = 0;
+
+#if defined(CONFIG_ZYNQ_SDHCI)
+# if defined(CONFIG_ZYNQ_SDHCI0)
+ ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0);
+# endif
+# if defined(CONFIG_ZYNQ_SDHCI1)
+ ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1);
+# endif
+#endif
+ return ret;
+}
+#endif
+
+int dram_init(void)
+{
+#ifdef CONFIG_OF_CONTROL
+ int node;
+ fdt_addr_t addr;
+ fdt_size_t size;
+ const void *blob = gd->fdt_blob;
+
+ node = fdt_node_offset_by_prop_value(blob, -1, "device_type",
+ "memory", 7);
+ if (node == -FDT_ERR_NOTFOUND) {
+ debug("ZYNQ DRAM: Can't get memory node\n");
+ return -1;
+ }
+ addr = fdtdec_get_addr_size(blob, node, "reg", &size);
+ if (addr == FDT_ADDR_T_NONE || size == 0) {
+ debug("ZYNQ DRAM: Can't get base address or size\n");
+ return -1;
+ }
+ gd->ram_size = size;
+#else
+ gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+#endif
+ zynq_ddrc_init();
+
+ return 0;
+}
diff --git a/qemu/roms/u-boot/board/xilinx/zynq/ps7_init.c b/qemu/roms/u-boot/board/xilinx/zynq/ps7_init.c
new file mode 100644
index 000000000..c47da09b9
--- /dev/null
+++ b/qemu/roms/u-boot/board/xilinx/zynq/ps7_init.c
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2014 Xilinx, Inc. Michal Simek
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <asm/arch/spl.h>
+
+__weak void ps7_init(void)
+{
+ puts("Please copy ps7_init.c/h from hw project\n");
+}