diff options
Diffstat (limited to 'qemu/roms/u-boot/board/xilinx/ml507')
| -rw-r--r-- | qemu/roms/u-boot/board/xilinx/ml507/Makefile | 11 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/xilinx/ml507/ml507.c | 17 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/xilinx/ml507/xparameters.h | 23 |
3 files changed, 51 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/xilinx/ml507/Makefile b/qemu/roms/u-boot/board/xilinx/ml507/Makefile new file mode 100644 index 000000000..9a3809f3c --- /dev/null +++ b/qemu/roms/u-boot/board/xilinx/ml507/Makefile @@ -0,0 +1,11 @@ +# +# (C) Copyright 2008 +# Ricardo Ribalda,Universidad Autonoma de Madrid, ricardo.ribalda@uam.es +# This work has been supported by: Qtechnology http://qtec.com/ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += ml507.o + +include $(srctree)/board/xilinx/ppc440-generic/Makefile diff --git a/qemu/roms/u-boot/board/xilinx/ml507/ml507.c b/qemu/roms/u-boot/board/xilinx/ml507/ml507.c new file mode 100644 index 000000000..83b764b73 --- /dev/null +++ b/qemu/roms/u-boot/board/xilinx/ml507/ml507.c @@ -0,0 +1,17 @@ +/* + * (C) Copyright 2008 + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * This work has been supported by: QTechnology http://qtec.com/ + * SPDX-License-Identifier: GPL-2.0+ +*/ + +#include <config.h> +#include <common.h> +#include <asm/processor.h> + + +int checkboard(void) +{ + puts("Xilinx ML507 Board\n"); + return 0; +} diff --git a/qemu/roms/u-boot/board/xilinx/ml507/xparameters.h b/qemu/roms/u-boot/board/xilinx/ml507/xparameters.h new file mode 100644 index 000000000..e30e592bb --- /dev/null +++ b/qemu/roms/u-boot/board/xilinx/ml507/xparameters.h @@ -0,0 +1,23 @@ +/* + * (C) Copyright 2008 + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * This work has been supported by: QTechnology http://qtec.com/ + * based on xparameters-ml507.h by Xilinx + * + * SPDX-License-Identifier: GPL-2.0+ +*/ + +#ifndef XPARAMETER_H +#define XPARAMETER_H + +#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000 +#define XPAR_IIC_EEPROM_BASEADDR 0x81600000 +#define XPAR_INTC_0_BASEADDR 0x81800000 +#define XPAR_UARTLITE_0_BASEADDR 0x84000000 +#define XPAR_FLASH_MEM0_BASEADDR 0xFE000000 +#define XPAR_PLB_CLOCK_FREQ_HZ 100000000 +#define XPAR_CORE_CLOCK_FREQ_HZ 400000000 +#define XPAR_INTC_MAX_NUM_INTR_INPUTS 13 +#define XPAR_UARTLITE_0_BAUDRATE 9600 + +#endif |