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-rw-r--r--qemu/roms/u-boot/board/musenki/Makefile8
-rw-r--r--qemu/roms/u-boot/board/musenki/README298
-rw-r--r--qemu/roms/u-boot/board/musenki/flash.c496
-rw-r--r--qemu/roms/u-boot/board/musenki/musenki.c94
4 files changed, 896 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/musenki/Makefile b/qemu/roms/u-boot/board/musenki/Makefile
new file mode 100644
index 000000000..d2b79ffd2
--- /dev/null
+++ b/qemu/roms/u-boot/board/musenki/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2001-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y = musenki.o flash.o
diff --git a/qemu/roms/u-boot/board/musenki/README b/qemu/roms/u-boot/board/musenki/README
new file mode 100644
index 000000000..084ab54ff
--- /dev/null
+++ b/qemu/roms/u-boot/board/musenki/README
@@ -0,0 +1,298 @@
+U-Boot for a Musenki M-3/M-1 board
+---------------------------
+
+Musenki M-1 and M-3 have two banks of flash of 4MB or 8MB each.
+
+In board's notation, bank 0 is the one at the address of 0xFF800000
+and bank 1 is the one at the address of 0xFF000000.
+
+On power-up the processor jumps to the address of 0xFFF00100, the last
+megabyte of the bank 0 of flash.
+
+Thus, U-Boot is configured to reside in flash starting at the address of
+0xFFF00000. The environment space is located in flash separately from
+U-Boot, at the address of 0xFF800000.
+
+There is a Davicom 9102A on-board, but I don't have it working yet.
+
+U-Boot test results
+--------------------
+
+x.x Operation on all available serial consoles
+
+x.x.x CONFIG_CONS_INDEX 1
+
+
+U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
+
+CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
+Board: MUSENKI Local Bus at 100 MHz
+DRAM: 32 MB
+FLASH: 4 MB
+In: serial
+Out: serial
+Err: serial
+Hit any key to stop autoboot: 0
+=> help
+base - print or set address offset
+bdinfo - print Board Info structure
+bootm - boot application image from memory
+bootp - boot image via network using BootP/TFTP protocol
+bootd - boot default, i.e., run 'bootcmd'
+cmp - memory compare
+coninfo - print console devices and informations
+cp - memory copy
+crc32 - checksum calculation
+dcache - enable or disable data cache
+echo - echo args to console
+erase - erase FLASH memory
+flinfo - print FLASH memory information
+go - start application at address 'addr'
+help - print online help
+icache - enable or disable instruction cache
+iminfo - print header information for application image
+loadb - load binary file over serial line (kermit mode)
+loads - load S-Record file over serial line
+loop - infinite loop on address range
+md - memory display
+mm - memory modify (auto-incrementing)
+mtest - simple RAM test
+mw - memory write (fill)
+nm - memory modify (constant address)
+printenv- print environment variables
+protect - enable or disable FLASH write protection
+rarpboot- boot image via network using RARP/TFTP protocol
+reset - Perform RESET of the CPU
+run - run commands in an environment variable
+saveenv - save environment variables to persistent storage
+setenv - set environment variables
+source - run script from memory
+tftpboot- boot image via network using TFTP protocol
+ and env variables ipaddr and serverip
+version - print monitor version
+? - alias for 'help'
+
+
+x.x.x CONFIG_CONS_INDEX 2
+
+**** NOT TESTED ****
+
+x.x Flash Driver Operation
+
+
+Boot 1.1.1 (Nov 20 2001 - 15:55:32)
+
+CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
+Board: MUSENKI Local Bus at 100 MHz
+DRAM: 32 MB
+FLASH: 4 MB
+*** Warning - bad CRC, using default environment
+
+In: serial
+Out: serial
+Err: serial
+Hit any key to stop autoboot: 0
+=>
+=> md ff800000
+ff800000: 46989bf8 626f6f74 636d643d 626f6f74 F...bootcmd=boot
+ff800010: 6d204646 38323030 30300062 6f6f7464 m FF820000.bootd
+ff800020: 656c6179 3d350062 61756472 6174653d elay=5.baudrate=
+ff800030: 39363030 00636c6f 636b735f 696e5f6d 9600.clocks_in_m
+ff800040: 687a3d31 00737464 696e3d73 65726961 hz=1.stdin=seria
+ff800050: 6c007374 646f7574 3d736572 69616c00 l.stdout=serial.
+ff800060: 73746465 72723d73 65726961 6c006970 stderr=serial.ip
+ff800070: 61646472 3d313932 2e313638 2e302e34 addr=192.168.0.4
+ff800080: 32007365 72766572 69703d31 39322e31 2.serverip=192.1
+ff800090: 36382e30 2e380000 00000000 00000000 68.0.8..........
+ff8000a0: 00000000 00000000 00000000 00000000 ................
+ff8000b0: 00000000 00000000 00000000 00000000 ................
+ff8000c0: 00000000 00000000 00000000 00000000 ................
+ff8000d0: 00000000 00000000 00000000 00000000 ................
+ff8000e0: 00000000 00000000 00000000 00000000 ................
+ff8000f0: 00000000 00000000 00000000 00000000 ................
+=> protect off ff800000 ff81ffff
+Un-Protected 1 sectors
+=> erase ff800000 ff81ffff
+Erase Flash from 0xff800000 to 0xff81ffff
+ done
+Erased 1 sectors
+=> md ff800000
+ff800000: ffffffff ffffffff ffffffff ffffffff ................
+ff800010: ffffffff ffffffff ffffffff ffffffff ................
+ff800020: ffffffff ffffffff ffffffff ffffffff ................
+ff800030: ffffffff ffffffff ffffffff ffffffff ................
+ff800040: ffffffff ffffffff ffffffff ffffffff ................
+ff800050: ffffffff ffffffff ffffffff ffffffff ................
+ff800060: ffffffff ffffffff ffffffff ffffffff ................
+ff800070: ffffffff ffffffff ffffffff ffffffff ................
+ff800080: ffffffff ffffffff ffffffff ffffffff ................
+ff800090: ffffffff ffffffff ffffffff ffffffff ................
+ff8000a0: ffffffff ffffffff ffffffff ffffffff ................
+ff8000b0: ffffffff ffffffff ffffffff ffffffff ................
+ff8000c0: ffffffff ffffffff ffffffff ffffffff ................
+ff8000d0: ffffffff ffffffff ffffffff ffffffff ................
+ff8000e0: ffffffff ffffffff ffffffff ffffffff ................
+ff8000f0: ffffffff ffffffff ffffffff ffffffff ................
+
+x.x.x Information
+
+
+U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
+
+CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
+Board: MUSENKI Local Bus at 100 MHz
+DRAM: 32 MB
+FLASH: 4 MB
+*** Warning - bad CRC, using default environment
+
+In: serial
+Out: serial
+Err: serial
+Hit any key to stop autoboot: 0
+=> flinfo
+
+Bank # 1: Intel 28F320J3A (32Mbit = 128K x 32)
+ Size: 4 MB in 32 Sectors
+ Sector Start Addresses:
+ FF800000 (RO) FF820000 FF840000 FF860000 FF880000
+ FF8A0000 FF8C0000 FF8E0000 FF900000 FF920000
+ FF940000 FF960000 FF980000 FF9A0000 FF9C0000
+ FF9E0000 FFA00000 FFA20000 FFA40000 FFA60000
+ FFA80000 FFAA0000 FFAC0000 FFAE0000 FFB00000
+ FFB20000 FFB40000 FFB60000 FFB80000 FFBA0000
+ FFBC0000 FFBE0000
+
+Bank # 2: missing or unknown FLASH type
+=>
+
+
+x.x.x Flash Programming
+
+
+U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
+
+CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
+Board: MUSENKI Local Bus at 100 MHz
+DRAM: 32 MB
+FLASH: 4 MB
+
+In: serial
+Out: serial
+Err: serial
+Hit any key to stop autoboot: 0
+=>
+=>
+=>
+=> protect off ff800000 ff81ffff
+Un-Protected 1 sectors
+=> cp 0 ff800000 20
+Copy to Flash... done
+=> md ff800000
+ff800000: 37ce33ec 33cc334c 33c031cc 33cc35cc 7.3.3.3L3.1.3.5.
+ff800010: 33ec13ce 30ccb3ec b3c833c4 31c836cc 3...0.....3.1.6.
+ff800020: 33cc3b9d 31ec33ee 13ecf3cc 338833ec 3.;.1.3.....3.3.
+ff800030: 234c33ec 32cc22cc 33883bdc 534433cc #L3.2.".3.;.SD3.
+ff800040: 33cc30c8 31cc32ec 338c33cc 330c33dc 3.0.1.2.3.3.3.3.
+ff800050: 33cc13dc 334c534c b1c433d8 128c13cc 3...3LSL..3.....
+ff800060: 37ec36cd 33dc33cc bbc9f7e8 bbcc77cc 7.6.3.3.......w.
+ff800070: 314c0adc 139c30ed 33cc334c 33c833ec 1L....0.3.3L3.3.
+ff800080: ffffffff ffffffff ffffffff ffffffff ................
+ff800090: ffffffff ffffffff ffffffff ffffffff ................
+ff8000a0: ffffffff ffffffff ffffffff ffffffff ................
+ff8000b0: ffffffff ffffffff ffffffff ffffffff ................
+ff8000c0: ffffffff ffffffff ffffffff ffffffff ................
+ff8000d0: ffffffff ffffffff ffffffff ffffffff ................
+ff8000e0: ffffffff ffffffff ffffffff ffffffff ................
+ff8000f0: ffffffff ffffffff ffffffff ffffffff ................
+
+
+x.x.x Storage of environment variables in flash
+
+
+U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
+
+CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
+Board: MUSENKI Local Bus at 100 MHz
+DRAM: 32 MB
+FLASH: 4 MB
+In: serial
+Out: serial
+Err: serial
+Hit any key to stop autoboot: 0
+=> printenv
+bootcmd=bootm FF820000
+bootdelay=5
+baudrate=9600
+clocks_in_mhz=1
+stdin=serial
+stdout=serial
+stderr=serial
+
+Environment size: 106/16380 bytes
+=> setenv myvar 1234
+=> saveenv
+Un-Protected 1 sectors
+Erasing Flash...
+ done
+Erased 1 sectors
+Saving Environment to Flash...
+Protected 1 sectors
+=> reset
+
+
+U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
+
+CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
+Board: MUSENKI Local Bus at 100 MHz
+DRAM: 32 MB
+FLASH: 4 MB
+In: serial
+Out: serial
+Err: serial
+Hit any key to stop autoboot: 0
+=> printenv
+bootcmd=bootm FF820000
+bootdelay=5
+baudrate=9600
+clocks_in_mhz=1
+myvar=1234
+stdin=serial
+stdout=serial
+stderr=serial
+
+Environment size: 117/16380 bytes
+
+x.x Image Download and run over serial port
+
+
+U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
+
+CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
+Board: MUSENKI Local Bus at 100 MHz
+DRAM: 32 MB
+FLASH: 4 MB
+In: serial
+Out: serial
+Err: serial
+Hit any key to stop autoboot: 0
+=> loads
+## Ready for S-Record download ...
+
+## First Load Addr = 0x00040000
+## Last Load Addr = 0x00050177
+## Total Size = 0x00010178 = 65912 Bytes
+## Start Addr = 0x00040004
+=> go 40004
+## Starting application at 0x00040004 ...
+Hello World
+argc = 1
+argv[0] = "40004"
+argv[1] = "<NULL>"
+Hit any key to exit ...
+
+## Application terminated, rc = 0x0
+
+
+x.x Image download and run over ethernet interface
+
+untested (not working yet, actually)
diff --git a/qemu/roms/u-boot/board/musenki/flash.c b/qemu/roms/u-boot/board/musenki/flash.c
new file mode 100644
index 000000000..080ec7fc3
--- /dev/null
+++ b/qemu/roms/u-boot/board/musenki/flash.c
@@ -0,0 +1,496 @@
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <mpc824x.h>
+
+#if defined(CONFIG_ENV_IS_IN_FLASH)
+# ifndef CONFIG_ENV_ADDR
+# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
+# endif
+# ifndef CONFIG_ENV_SIZE
+# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
+# endif
+# ifndef CONFIG_ENV_SECT_SIZE
+# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
+# endif
+#endif
+
+/*---------------------------------------------------------------------*/
+#undef DEBUG_FLASH
+
+#ifdef DEBUG_FLASH
+#define DEBUGF(fmt,args...) printf(fmt ,##args)
+#else
+#define DEBUGF(fmt,args...)
+#endif
+/*---------------------------------------------------------------------*/
+
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_char *addr, flash_info_t *info);
+static int write_data (flash_info_t *info, uchar *dest, uchar data);
+static void flash_get_offsets (ulong base, flash_info_t *info);
+
+
+/*
+ * don't ask. its stupid, but more than one soul has had to live with this mistake
+ * "swaptab[i]" is the value of "i" with the bits reversed.
+ */
+
+#define MUSENKI_BROKEN_FLASH 1
+
+#ifdef MUSENKI_BROKEN_FLASH
+unsigned char swaptab[256] = {
+ 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0,
+ 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0,
+ 0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8,
+ 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8,
+ 0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4,
+ 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4,
+ 0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec,
+ 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc,
+ 0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2,
+ 0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2,
+ 0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea,
+ 0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa,
+ 0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6,
+ 0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6,
+ 0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee,
+ 0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe,
+ 0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1,
+ 0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1,
+ 0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9,
+ 0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9,
+ 0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5,
+ 0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5,
+ 0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed,
+ 0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd,
+ 0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3,
+ 0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3,
+ 0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb,
+ 0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb,
+ 0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7,
+ 0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7,
+ 0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef,
+ 0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff,
+};
+
+#define BS(b) (swaptab[b])
+
+#else
+
+#define BS(b) (b)
+
+#endif
+
+#define BYTEME(x) ((x) & 0xFF)
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+ unsigned long size_b0, size_b1;
+ int i;
+
+ /* Init: no FLASHes known */
+ for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
+ flash_info[i].flash_id = FLASH_UNKNOWN;
+ }
+
+ /* Static FLASH Bank configuration here - FIXME XXX */
+
+ DEBUGF("\n## Get flash bank 1 size @ 0x%08x\n",CONFIG_SYS_FLASH_BASE0_PRELIM);
+
+ size_b0 = flash_get_size((vu_char *)CONFIG_SYS_FLASH_BASE0_PRELIM, &flash_info[0]);
+
+ if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+ printf ("## Unknown FLASH on Bank 0: "
+ "ID 0x%lx, Size = 0x%08lx = %ld MB\n",
+ flash_info[0].flash_id,
+ size_b0, size_b0<<20);
+ }
+
+ DEBUGF("## Get flash bank 2 size @ 0x%08x\n",CONFIG_SYS_FLASH_BASE1_PRELIM);
+ size_b1 = flash_get_size((vu_char *)CONFIG_SYS_FLASH_BASE1_PRELIM, &flash_info[1]);
+
+ DEBUGF("## Prelim. Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
+
+ flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
+
+ flash_info[0].size = size_b0;
+
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
+ DEBUGF("protect monitor %x @ %x\n", CONFIG_SYS_MONITOR_BASE, monitor_flash_len);
+ /* monitor protection ON by default */
+ flash_protect(FLAG_PROTECT_SET,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
+ &flash_info[0]);
+#endif
+
+#ifdef CONFIG_ENV_IS_IN_FLASH
+ /* ENV protection ON by default */
+ DEBUGF("protect environtment %x @ %x\n", CONFIG_ENV_ADDR, CONFIG_ENV_SECT_SIZE);
+ flash_protect(FLAG_PROTECT_SET,
+ CONFIG_ENV_ADDR,
+ CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
+ &flash_info[0]);
+#endif
+
+ if (size_b1) {
+ flash_info[1].size = size_b1;
+ flash_get_offsets (CONFIG_SYS_FLASH_BASE + size_b0, &flash_info[1]);
+
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
+ /* monitor protection ON by default */
+ flash_protect(FLAG_PROTECT_SET,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
+ &flash_info[1]);
+#endif
+
+#ifdef CONFIG_ENV_IS_IN_FLASH
+ /* ENV protection ON by default */
+ flash_protect(FLAG_PROTECT_SET,
+ CONFIG_ENV_ADDR,
+ CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
+ &flash_info[1]);
+#endif
+ } else {
+ flash_info[1].flash_id = FLASH_UNKNOWN;
+ flash_info[1].sector_count = -1;
+ flash_info[1].size = 0;
+ }
+
+ DEBUGF("## Final Flash bank sizes: %08lx + 0x%08lx\n",size_b0,size_b1);
+
+ return (size_b0 + size_b1);
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+ int i;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ return;
+ }
+
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case FLASH_MAN_INTEL:
+ for (i = 0; i < info->sector_count; i++) {
+ info->start[i] = base;
+ base += 0x00020000; /* 128k per bank */
+ }
+ return;
+
+ default:
+ printf ("Don't know sector ofsets for flash type 0x%lx\n", info->flash_id);
+ return;
+ }
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t *info)
+{
+ int i;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("missing or unknown FLASH type\n");
+ return;
+ }
+
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case FLASH_MAN_AMD: printf ("AMD "); break;
+ case FLASH_MAN_FUJ: printf ("Fujitsu "); break;
+ case FLASH_MAN_SST: printf ("SST "); break;
+ case FLASH_MAN_STM: printf ("STM "); break;
+ case FLASH_MAN_INTEL: printf ("Intel "); break;
+ case FLASH_MAN_MT: printf ("MT "); break;
+ default: printf ("Unknown Vendor "); break;
+ }
+
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case FLASH_28F320J3A: printf ("28F320J3A (32Mbit = 128K x 32)\n");
+ break;
+ case FLASH_28F640J3A: printf ("28F640J3A (64Mbit = 128K x 64)\n");
+ break;
+ case FLASH_28F128J3A: printf ("28F128J3A (128Mbit = 128K x 128)\n");
+ break;
+ default: printf ("Unknown Chip Type\n");
+ break;
+ }
+
+ if (info->size >= (1 << 20)) {
+ i = 20;
+ } else {
+ i = 10;
+ }
+ printf (" Size: %ld %cB in %d Sectors\n",
+ info->size >> i,
+ (i == 20) ? 'M' : 'k',
+ info->sector_count);
+
+ printf (" Sector Start Addresses:");
+ for (i=0; i<info->sector_count; ++i) {
+ if ((i % 5) == 0)
+ printf ("\n ");
+ printf (" %08lX%s",
+ info->start[i],
+ info->protect[i] ? " (RO)" : " "
+ );
+ }
+ printf ("\n");
+ return;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size (vu_char *addr, flash_info_t *info)
+{
+ vu_char manuf, device;
+
+ addr[0] = BS(0x90);
+ manuf = BS(addr[0]);
+ DEBUGF("Manuf. ID @ 0x%08lx: 0x%08x\n", (vu_char *)addr, manuf);
+
+ switch (manuf) {
+ case BYTEME(AMD_MANUFACT):
+ info->flash_id = FLASH_MAN_AMD;
+ break;
+ case BYTEME(FUJ_MANUFACT):
+ info->flash_id = FLASH_MAN_FUJ;
+ break;
+ case BYTEME(SST_MANUFACT):
+ info->flash_id = FLASH_MAN_SST;
+ break;
+ case BYTEME(STM_MANUFACT):
+ info->flash_id = FLASH_MAN_STM;
+ break;
+ case BYTEME(INTEL_MANUFACT):
+ info->flash_id = FLASH_MAN_INTEL;
+ break;
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ info->sector_count = 0;
+ info->size = 0;
+ addr[0] = BS(0xFF); /* restore read mode, (yes, BS is a NOP) */
+ return 0; /* no or unknown flash */
+ }
+
+ device = BS(addr[2]); /* device ID */
+
+ DEBUGF("Device ID @ 0x%08x: 0x%08x\n", (&addr[1]), device);
+
+ switch (device) {
+ case BYTEME(INTEL_ID_28F320J3A):
+ info->flash_id += FLASH_28F320J3A;
+ info->sector_count = 32;
+ info->size = 0x00400000;
+ break; /* => 4 MB */
+
+ case BYTEME(INTEL_ID_28F640J3A):
+ info->flash_id += FLASH_28F640J3A;
+ info->sector_count = 64;
+ info->size = 0x00800000;
+ break; /* => 8 MB */
+
+ case BYTEME(INTEL_ID_28F128J3A):
+ info->flash_id += FLASH_28F128J3A;
+ info->sector_count = 128;
+ info->size = 0x01000000;
+ break; /* => 16 MB */
+
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ addr[0] = BS(0xFF); /* restore read mode (yes, a NOP) */
+ return 0; /* => no or unknown flash */
+
+ }
+
+ if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
+ printf ("** ERROR: sector count %d > max (%d) **\n",
+ info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
+ info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
+ }
+
+ addr[0] = BS(0xFF); /* restore read mode */
+
+ return (info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+int flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+ int flag, prot, sect;
+ ulong start, now, last;
+
+ if ((s_first < 0) || (s_first > s_last)) {
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("- missing\n");
+ } else {
+ printf ("- no sectors to erase\n");
+ }
+ return 1;
+ }
+
+ if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
+ printf ("Can erase only Intel flash types - aborted\n");
+ return 1;
+ }
+
+ prot = 0;
+ for (sect=s_first; sect<=s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+
+ if (prot) {
+ printf ("- Warning: %d protected sectors will not be erased!\n", prot);
+ } else {
+ printf ("\n");
+ }
+
+ start = get_timer (0);
+ last = start;
+ /* Start erase on unprotected sectors */
+ for (sect = s_first; sect<=s_last; sect++) {
+ if (info->protect[sect] == 0) { /* not protected */
+ vu_char *addr = (vu_char *)(info->start[sect]);
+ unsigned long status;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ *addr = BS(0x50); /* clear status register */
+ *addr = BS(0x20); /* erase setup */
+ *addr = BS(0xD0); /* erase confirm */
+
+ /* re-enable interrupts if necessary */
+ if (flag) {
+ enable_interrupts();
+ }
+
+ /* wait at least 80us - let's wait 1 ms */
+ udelay (1000);
+
+ while (((status = BS(*addr)) & BYTEME(0x00800080)) != BYTEME(0x00800080)) {
+ if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
+ printf ("Timeout\n");
+ *addr = BS(0xB0); /* suspend erase */
+ *addr = BS(0xFF); /* reset to read mode */
+ return 1;
+ }
+
+ /* show that we're waiting */
+ if ((now - last) > 1000) { /* every second */
+ putc ('.');
+ last = now;
+ }
+ }
+
+ *addr = BS(0xFF); /* reset to read mode */
+ }
+ }
+ printf (" done\n");
+ return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ * 4 - Flash not identified
+ */
+
+#define FLASH_WIDTH 1 /* flash bus width in bytes */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+ uchar *wp = (uchar *)addr;
+ int rc;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ return 4;
+ }
+
+ while (cnt > 0) {
+ if ((rc = write_data(info, wp, *src)) != 0) {
+ return rc;
+ }
+ wp++;
+ src++;
+ cnt--;
+ }
+
+ return cnt;
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_data (flash_info_t *info, uchar *dest, uchar data)
+{
+ vu_char *addr = (vu_char *)dest;
+ ulong status;
+ ulong start;
+ int flag;
+
+ /* Check if Flash is (sufficiently) erased */
+ if ((BS(*addr) & data) != data) {
+ return 2;
+ }
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ *addr = BS(0x40); /* write setup */
+ *addr = data;
+
+ /* re-enable interrupts if necessary */
+ if (flag) {
+ enable_interrupts();
+ }
+
+ start = get_timer (0);
+
+ while (((status = BS(*addr)) & BYTEME(0x00800080)) != BYTEME(0x00800080)) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
+ *addr = BS(0xFF); /* restore read mode */
+ return 1;
+ }
+ }
+
+ *addr = BS(0xFF); /* restore read mode */
+
+ return 0;
+}
+
+/*-----------------------------------------------------------------------
+ */
diff --git a/qemu/roms/u-boot/board/musenki/musenki.c b/qemu/roms/u-boot/board/musenki/musenki.c
new file mode 100644
index 000000000..aa92fc428
--- /dev/null
+++ b/qemu/roms/u-boot/board/musenki/musenki.c
@@ -0,0 +1,94 @@
+/*
+ * (C) Copyright 2001
+ * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <mpc824x.h>
+#include <pci.h>
+#include <netdev.h>
+
+int checkboard (void)
+{
+ ulong busfreq = get_bus_freq(0);
+ char buf[32];
+
+ printf("Board: MUSENKI Local Bus at %s MHz\n", strmhz(buf, busfreq));
+ return 0;
+
+}
+
+#if 0 /* NOT USED */
+int checkflash (void)
+{
+ /* TODO: XXX XXX XXX */
+ printf ("## Test not implemented yet ##\n");
+
+ return (0);
+}
+#endif
+
+phys_size_t initdram (int board_type)
+{
+ long size;
+ long new_bank0_end;
+ long mear1;
+ long emear1;
+
+ size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
+
+ new_bank0_end = size - 1;
+ mear1 = mpc824x_mpc107_getreg(MEAR1);
+ emear1 = mpc824x_mpc107_getreg(EMEAR1);
+ mear1 = (mear1 & 0xFFFFFF00) |
+ ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
+ emear1 = (emear1 & 0xFFFFFF00) |
+ ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
+ mpc824x_mpc107_setreg(MEAR1, mear1);
+ mpc824x_mpc107_setreg(EMEAR1, emear1);
+
+ return (size);
+}
+
+/*
+ * Initialize PCI Devices
+ */
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_sandpoint_config_table[] = {
+#if 0
+ { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+ 0x0, 0x0, 0x0, /* unknown eth0 divice */
+ pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
+ PCI_ENET0_MEMADDR,
+ PCI_COMMAND_IO |
+ PCI_COMMAND_MEMORY |
+ PCI_COMMAND_MASTER }},
+ { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+ 0x0, 0x0, 0x0, /* unknown eth1 device */
+ pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
+ PCI_ENET1_MEMADDR,
+ PCI_COMMAND_IO |
+ PCI_COMMAND_MEMORY |
+ PCI_COMMAND_MASTER }},
+#endif
+ { }
+};
+#endif
+
+struct pci_controller hose = {
+#ifndef CONFIG_PCI_PNP
+ config_table: pci_sandpoint_config_table,
+#endif
+};
+
+void pci_init_board(void)
+{
+ pci_mpc824x_init(&hose);
+}
+
+int board_eth_init(bd_t *bis)
+{
+ return pci_eth_init(bis);
+}