diff options
Diffstat (limited to 'qemu/roms/u-boot/board/gaisler')
20 files changed, 997 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/board/gaisler/gr_cpci_ax2000/Makefile b/qemu/roms/u-boot/board/gaisler/gr_cpci_ax2000/Makefile new file mode 100644 index 000000000..a08e04dbe --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/gr_cpci_ax2000/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := gr_cpci_ax2000.o diff --git a/qemu/roms/u-boot/board/gaisler/gr_cpci_ax2000/config.mk b/qemu/roms/u-boot/board/gaisler/gr_cpci_ax2000/config.mk new file mode 100644 index 000000000..731a53905 --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/gr_cpci_ax2000/config.mk @@ -0,0 +1,19 @@ +# +# (C) Copyright 2008 +# Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +# +# GR-CPCI-AX2000 board +# + +# U-BOOT IN FLASH +CONFIG_SYS_TEXT_BASE = 0x00000000 + +# U-BOOT IN RAM or SDRAM with -nosram flag set when starting GRMON +#CONFIG_SYS_TEXT_BASE = 0x40000000 + +# U-BOOT IN SDRAM +#CONFIG_SYS_TEXT_BASE = 0x60000000 diff --git a/qemu/roms/u-boot/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c b/qemu/roms/u-boot/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c new file mode 100644 index 000000000..d26212ea8 --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c @@ -0,0 +1,38 @@ +/* + * (C) Copyright 2008 + * Daniel Hellstrom, daniel@gaisler.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <netdev.h> +#include <config.h> +#include <asm/leon.h> + +phys_size_t initdram(int board_type) +{ + return 1; +} + +int checkboard(void) +{ + puts("Board: GR-CPCI-AX2000\n"); + return 0; +} + +int misc_init_r(void) +{ + return 0; +} + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/qemu/roms/u-boot/board/gaisler/gr_cpci_ax2000/u-boot.lds b/qemu/roms/u-boot/board/gaisler/gr_cpci_ax2000/u-boot.lds new file mode 100644 index 000000000..6d9c90cd7 --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/gr_cpci_ax2000/u-boot.lds @@ -0,0 +1,143 @@ +/* + * Linker script for Gaisler Research AB's GR-CPCI-AX2000 board + * with template design. + * + * (C) Copyright 2008 + * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") +OUTPUT_ARCH(sparc) +ENTRY(_start) +SECTIONS +{ + +/* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + + .text : { + _load_addr = .; + _text = .; + + *(.start) + arch/sparc/cpu/leon3/start.o (.text) +/* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */ + . = ALIGN(8192); +/* PROM CODE, Will be relocated to the end of memory, + * no global data accesses please. + */ + __prom_start = .; + *(.prom.pgt) + *(.prom.data) + *(.prom.text) + . = ALIGN(16); + __prom_end = .; + *(.text) + *(.fixup) + *(.gnu.warning) +/* *(.got1)*/ + . = ALIGN(16); + *(.eh_frame) + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + . = ALIGN(4); + _etext = .; + + /* CMD Table */ + + + . = ALIGN(4); + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + .data : + { + *(.data) + *(.data1) + *(.data.rel) + *(.data.rel.*) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = ALIGN(4); + __got_start = .; + .got : { + *(.got) +/* *(.data.rel) + *(.data.rel.local)*/ + . = ALIGN(16); + } + __got_end = .; + +/* .data.rel : { } */ + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + . = ALIGN(16); /* to speed clearing of bss up */ + } + __bss_end = . ; + __bss_end = . ; + PROVIDE (end = .); + +/* Relocated into main memory */ + + /* Start of main memory */ + /*. = 0x40000000;*/ + + .stack (NOLOAD) : { *(.stack) } + + /* PROM CODE */ + + /* global data in RAM passed to kernel after booting */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + +} diff --git a/qemu/roms/u-boot/board/gaisler/gr_ep2s60/Makefile b/qemu/roms/u-boot/board/gaisler/gr_ep2s60/Makefile new file mode 100644 index 000000000..059a9c03c --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/gr_ep2s60/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := gr_ep2s60.o diff --git a/qemu/roms/u-boot/board/gaisler/gr_ep2s60/config.mk b/qemu/roms/u-boot/board/gaisler/gr_ep2s60/config.mk new file mode 100644 index 000000000..6e01f07c0 --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/gr_ep2s60/config.mk @@ -0,0 +1,17 @@ +# +# (C) Copyright 2008 +# Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +# +# Altera NIOS delopment board Stratix II edition, FPGA device EP2S60, +# with GRLIB Template design (GPL Open Source SPARC/LEON3) +# + +# U-BOOT IN FLASH +CONFIG_SYS_TEXT_BASE = 0x00000000 + +# U-BOOT IN SDRAM +#CONFIG_SYS_TEXT_BASE = 0x40000000 diff --git a/qemu/roms/u-boot/board/gaisler/gr_ep2s60/gr_ep2s60.c b/qemu/roms/u-boot/board/gaisler/gr_ep2s60/gr_ep2s60.c new file mode 100644 index 000000000..98fb45fdb --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/gr_ep2s60/gr_ep2s60.c @@ -0,0 +1,38 @@ +/* + * (C) Copyright 2008 + * Daniel Hellstrom, daniel@gaisler.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <netdev.h> +#include <config.h> +#include <asm/leon.h> + +phys_size_t initdram(int board_type) +{ + return 1; +} + +int checkboard(void) +{ + puts("Board: EP2S60 GRLIB\n"); + return 0; +} + +int misc_init_r(void) +{ + return 0; +} + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} +#endif diff --git a/qemu/roms/u-boot/board/gaisler/gr_ep2s60/u-boot.lds b/qemu/roms/u-boot/board/gaisler/gr_ep2s60/u-boot.lds new file mode 100644 index 000000000..973603c7c --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/gr_ep2s60/u-boot.lds @@ -0,0 +1,143 @@ +/* + * Linker script for Gaisler Research AB's Template design + * for Altera NIOS Development board Stratix II Edition, EP2S60 FPGA. + * + * (C) Copyright 2008 + * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") +OUTPUT_ARCH(sparc) +ENTRY(_start) +SECTIONS +{ + +/* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + + .text : { + _load_addr = .; + _text = .; + + *(.start) + arch/sparc/cpu/leon3/start.o (.text) +/* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */ + . = ALIGN(8192); +/* PROM CODE, Will be relocated to the end of memory, + * no global data accesses please. + */ + __prom_start = .; + *(.prom.pgt) + *(.prom.data) + *(.prom.text) + . = ALIGN(16); + __prom_end = .; + *(.text) + *(.fixup) + *(.gnu.warning) +/* *(.got1)*/ + . = ALIGN(16); + *(.eh_frame) + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + . = ALIGN(4); + _etext = .; + + /* CMD Table */ + + + . = ALIGN(4); + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + .data : + { + *(.data) + *(.data1) + *(.data.rel) + *(.data.rel.*) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = ALIGN(4); + __got_start = .; + .got : { + *(.got) +/* *(.data.rel) + *(.data.rel.local)*/ + . = ALIGN(16); + } + __got_end = .; + +/* .data.rel : { } */ + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + . = ALIGN(16); /* to speed clearing of bss up */ + } + __bss_end = . ; + __bss_end = . ; + PROVIDE (end = .); + +/* Relocated into main memory */ + + /* Start of main memory */ + /*. = 0x40000000;*/ + + .stack (NOLOAD) : { *(.stack) } + + /* PROM CODE */ + + /* global data in RAM passed to kernel after booting */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + +} diff --git a/qemu/roms/u-boot/board/gaisler/gr_xc3s_1500/Makefile b/qemu/roms/u-boot/board/gaisler/gr_xc3s_1500/Makefile new file mode 100644 index 000000000..302c4611e --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/gr_xc3s_1500/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := gr_xc3s_1500.o diff --git a/qemu/roms/u-boot/board/gaisler/gr_xc3s_1500/config.mk b/qemu/roms/u-boot/board/gaisler/gr_xc3s_1500/config.mk new file mode 100644 index 000000000..e4a66cbcf --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/gr_xc3s_1500/config.mk @@ -0,0 +1,16 @@ +# +# (C) Copyright 2007 +# Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +# +# GR-XC3S-1500 board +# + +# U-BOOT IN FLASH +CONFIG_SYS_TEXT_BASE = 0x00000000 + +# U-BOOT IN RAM +#CONFIG_SYS_TEXT_BASE = 0x40000000 diff --git a/qemu/roms/u-boot/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c b/qemu/roms/u-boot/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c new file mode 100644 index 000000000..32fbbe2d7 --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c @@ -0,0 +1,26 @@ +/* + * (C) Copyright 2007 + * Daniel Hellstrom, daniel@gaisler.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <config.h> +#include <asm/leon.h> + +phys_size_t initdram(int board_type) +{ + return 1; +} + +int checkboard(void) +{ + puts("Board: GR-XC3S-1500\n"); + return 0; +} + +int misc_init_r(void) +{ + return 0; +} diff --git a/qemu/roms/u-boot/board/gaisler/gr_xc3s_1500/u-boot.lds b/qemu/roms/u-boot/board/gaisler/gr_xc3s_1500/u-boot.lds new file mode 100644 index 000000000..1ed71f265 --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/gr_xc3s_1500/u-boot.lds @@ -0,0 +1,145 @@ +/* + * Linker script for Gaisler Research AB's GR-XC3S-1500 board + * with template design. + * + * (C) Copyright 2007 + * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") +OUTPUT_ARCH(sparc) +ENTRY(_start) +SECTIONS +{ + +/* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + + .text : { + _load_addr = .; + _text = .; + + *(.start) + arch/sparc/cpu/leon3/start.o (.text) +/* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */ + . = ALIGN(8192); +/* PROM CODE, Will be relocated to the end of memory, + * no global data accesses please. + */ + __prom_start = .; + *(.prom.pgt) + *(.prom.data) + *(.prom.text) + . = ALIGN(16); + __prom_end = .; + *(.text) + *(.fixup) + *(.gnu.warning) +/* *(.got1)*/ + . = ALIGN(16); + *(.eh_frame) + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + . = ALIGN(4); + _etext = .; + + /* CMD Table */ + + + . = ALIGN(4); + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + .data : + { + *(.data) + *(.data1) + *(.data.rel) + *(.data.rel.*) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = ALIGN(4); + __got_start = .; + .got : { + *(.got) +/* *(.data.rel) + *(.data.rel.local)*/ + . = ALIGN(16); + } + __got_end = .; + +/* .data.rel : { } */ + + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + . = ALIGN(16); /* to speed clearing of bss up */ + } + __bss_end = . ; + __bss_end = . ; + PROVIDE (end = .); + +/* Relocated into main memory */ + + /* Start of main memory */ + /*. = 0x40000000;*/ + + .stack (NOLOAD) : { *(.stack) } + + /* PROM CODE */ + + /* global data in RAM passed to kernel after booting */ + + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + +} diff --git a/qemu/roms/u-boot/board/gaisler/grsim/Makefile b/qemu/roms/u-boot/board/gaisler/grsim/Makefile new file mode 100644 index 000000000..4c93bdae8 --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/grsim/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2003-2004 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := grsim.o diff --git a/qemu/roms/u-boot/board/gaisler/grsim/config.mk b/qemu/roms/u-boot/board/gaisler/grsim/config.mk new file mode 100644 index 000000000..d1f61dac7 --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/grsim/config.mk @@ -0,0 +1,16 @@ +# +# (C) Copyright 2007 +# Daniel Hellstrom, Gaisler Research, daniel@gaisler.com +# +# SPDX-License-Identifier: GPL-2.0+ +# + +# +# GRSIM simulating a LEON3 GR-XC3S-1500 board +# + +# U-BOOT IN FLASH +CONFIG_SYS_TEXT_BASE = 0x00000000 + +# U-BOOT IN RAM +#CONFIG_SYS_TEXT_BASE = 0x40000000 diff --git a/qemu/roms/u-boot/board/gaisler/grsim/grsim.c b/qemu/roms/u-boot/board/gaisler/grsim/grsim.c new file mode 100644 index 000000000..fd73920b6 --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/grsim/grsim.c @@ -0,0 +1,27 @@ +/* + * GRSIM/TSIM board + * + * (C) Copyright 2007 + * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/leon.h> + +phys_size_t initdram(int board_type) +{ + return 1; +} + +int checkboard(void) +{ + puts("Board: GRSIM/TSIM\n"); + return 0; +} + +int misc_init_r(void) +{ + return 0; +} diff --git a/qemu/roms/u-boot/board/gaisler/grsim/u-boot.lds b/qemu/roms/u-boot/board/gaisler/grsim/u-boot.lds new file mode 100644 index 000000000..cdc83941e --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/grsim/u-boot.lds @@ -0,0 +1,144 @@ +/* + * Linker script for Gaisler Research AB's GRSIM LEON3 simulator. + * + * (C) Copyright 2007 + * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") +OUTPUT_ARCH(sparc) +ENTRY(_start) +SECTIONS +{ + +/* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + + .text : { + _load_addr = .; + _text = .; + + *(.start) + arch/sparc/cpu/leon3/start.o (.text) +/* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */ + . = ALIGN(8192); +/* PROM CODE, Will be relocated to the end of memory, + * no global data accesses please. + */ + __prom_start = .; + *(.prom.pgt) + *(.prom.data) + *(.prom.text) + . = ALIGN(16); + __prom_end = .; + *(.text) + *(.fixup) + *(.gnu.warning) +/* *(.got1)*/ + . = ALIGN(16); + *(.eh_frame) + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + . = ALIGN(4); + _etext = .; + + /* CMD Table */ + + + . = ALIGN(4); + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + .data : + { + *(.data) + *(.data1) + *(.data.rel) + *(.data.rel.*) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = ALIGN(4); + __got_start = .; + .got : { + *(.got) +/* *(.data.rel) + *(.data.rel.local)*/ + . = ALIGN(16); + } + __got_end = .; + +/* .data.rel : { } */ + + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + . = ALIGN(16); /* to speed clearing of bss up */ + } + __bss_end = . ; + __bss_end = . ; + PROVIDE (end = .); + +/* Relocated into main memory */ + + /* Start of main memory */ + /*. = 0x40000000;*/ + + .stack (NOLOAD) : { *(.stack) } + + /* PROM CODE */ + + /* global data in RAM passed to kernel after booting */ + + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + +} diff --git a/qemu/roms/u-boot/board/gaisler/grsim_leon2/Makefile b/qemu/roms/u-boot/board/gaisler/grsim_leon2/Makefile new file mode 100644 index 000000000..5468305ca --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/grsim_leon2/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2003-2004 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := grsim_leon2.o diff --git a/qemu/roms/u-boot/board/gaisler/grsim_leon2/config.mk b/qemu/roms/u-boot/board/gaisler/grsim_leon2/config.mk new file mode 100644 index 000000000..f98b23b80 --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/grsim_leon2/config.mk @@ -0,0 +1,16 @@ +# +# (C) Copyright 2007 +# Daniel Hellstrom, Gaisler Research, daniel@gaisler.com +# +# SPDX-License-Identifier: GPL-2.0+ +# + +# +# GRSIM simulating a LEON2 board +# + +# RUN U-BOOT FROM PROM +CONFIG_SYS_TEXT_BASE = 0x00000000 + +# RUN U-BOOT FROM RAM +#CONFIG_SYS_TEXT_BASE = 0x40000000 diff --git a/qemu/roms/u-boot/board/gaisler/grsim_leon2/grsim_leon2.c b/qemu/roms/u-boot/board/gaisler/grsim_leon2/grsim_leon2.c new file mode 100644 index 000000000..882b0a424 --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/grsim_leon2/grsim_leon2.c @@ -0,0 +1,27 @@ +/* + * GRSIM/TSIM board + * + * (C) Copyright 2007 + * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/leon.h> + +phys_size_t initdram(int board_type) +{ + return 1; +} + +int checkboard(void) +{ + puts("Board: GRSIM/TSIM LEON2\n"); + return 0; +} + +int misc_init_r(void) +{ + return 0; +} diff --git a/qemu/roms/u-boot/board/gaisler/grsim_leon2/u-boot.lds b/qemu/roms/u-boot/board/gaisler/grsim_leon2/u-boot.lds new file mode 100644 index 000000000..1f038bca4 --- /dev/null +++ b/qemu/roms/u-boot/board/gaisler/grsim_leon2/u-boot.lds @@ -0,0 +1,142 @@ +/* + * Linker script for Gaisler Research AB's GRSIM LEON2 simulator. + * + * (C) Copyright 2007 + * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") +OUTPUT_ARCH(sparc) +ENTRY(_start) +SECTIONS +{ + +/* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + + .text : { + _load_addr = .; + _text = .; + + *(.start) + arch/sparc/cpu/leon2/start.o (.text) +/* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */ + . = ALIGN(8192); +/* PROM CODE, Will be relocated to the end of memory, + * no global data accesses please. + */ + __prom_start = .; + *(.prom.pgt) + *(.prom.data) + *(.prom.text) + . = ALIGN(16); + __prom_end = .; + *(.text) + *(.fixup) + *(.gnu.warning) +/* *(.got1)*/ + . = ALIGN(16); + *(.eh_frame) + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + . = ALIGN(4); + _etext = .; + + /* CMD Table */ + + + . = ALIGN(4); + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + .data : + { + *(.data) + *(.data1) + *(.data.rel) + *(.data.rel.*) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = ALIGN(4); + __got_start = .; + .got : { + *(.got) +/* *(.data.rel) + *(.data.rel.local)*/ + . = ALIGN(16); + } + __got_end = .; + +/* .data.rel : { } */ + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + . = ALIGN(16); /* to speed clearing of bss up */ + } + __bss_end = . ; + __bss_end = . ; + PROVIDE (end = .); + +/* Relocated into main memory */ + + /* Start of main memory */ + /*. = 0x40000000;*/ + + .stack (NOLOAD) : { *(.stack) } + + /* PROM CODE */ + + /* global data in RAM passed to kernel after booting */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + +} |