diff options
Diffstat (limited to 'qemu/roms/u-boot/board/davinci/da8xxevm')
9 files changed, 0 insertions, 1125 deletions
diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/Makefile b/qemu/roms/u-boot/board/davinci/da8xxevm/Makefile deleted file mode 100644 index d3acacc33..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += da830evm.o -obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += da850evm.o -obj-$(CONFIG_MACH_DAVINCI_HAWK) += hawkboard.o diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/README.da850 b/qemu/roms/u-boot/board/davinci/da8xxevm/README.da850 deleted file mode 100644 index 313a1ef43..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/README.da850 +++ /dev/null @@ -1,68 +0,0 @@ -Summary -======= -The README is for the boot procedure used for various DA850 (or compatible -parts such as the AM1808) based boards. - -In the context of U-Boot, the board is booted in three stages. The initial -bootloader which executes upon reset is the ROM Boot Loader (RBL) and sits -in the internal ROM. The RBL initializes the internal memory and then -depending on the exact board and pin configurations will initialize another -controller (such as SPI or NAND) to continue the boot process by loading -the secondary program loader (SPL). The SPL will initialize the system -further (some clocks, SDRAM) and then load the full u-boot from a -predefined location in persistent storage to DDR and jumps to the u-boot -entry point. - -AIS is an image format defined by TI for the images that are to be loaded -to memory by the RBL. The image is divided into a series of sections and -the image's entry point is specified. Each section comes with meta data -like the target address the section is to be copied to and the size of the -section, which is used by the RBL to load the image. At the end of the -image the RBL jumps to the image entry point. The AIS format allows for -other things such as programming the clocks and SDRAM if the header is -programmed for it. We do not take advantage of this and instead use SPL as -it allows for additional flexibility (run-time detect of board revision, -loading the next image from a different media, etc). - - -Compilation -=========== -The exact build target you need will depend on the board you have. For -Logic PD boards, or other boards which store the ethernet MAC address at -the end of SPI flash, run 'make da850evm'. For boards which store the -ethernet MAC address in the i2c EEPROM located at 0x50, run -'make da850_am18xxevm'. Once this build completes you will have a -u-boot.ais file that needs to be written to the correct persistent -storage. - - -Flashing the images to SPI -========================== -The AIS image can be written to SPI flash using the following commands. -Assuming that the network is configured and enabled and the u-boot.ais file -is tftp'able. - -U-Boot > sf probe 0 -U-Boot > sf erase 0 +320000 -U-Boot > tftp u-boot.ais -U-Boot > sf write c0700000 0 $filesize - - -Recovery -======== - -In the case of a "bricked" board, you need to use the TI tools found -here[1] to write the u-boot.ais file. An example of recovering to the SPI -flash of an AM1808 would be: - -$ mono sfh_OMAP-L138.exe -targetType AM1808 -p /dev/ttyUSB0 \ - -flash_noubl /path/to/u-boot.ais - -For other target types and flash locations: - -$ mono sfh_OMAP-L138.exe -h - -Links -===== -[1] - http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138 diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/README.hawkboard b/qemu/roms/u-boot/board/davinci/da8xxevm/README.hawkboard deleted file mode 100644 index d6ae02ec0..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/README.hawkboard +++ /dev/null @@ -1,92 +0,0 @@ -Summary -======= -The README is for the boot procedure used for TI's OMAP-L138 based -hawkboard. The hawkboard comes with a 128MiB Nand flash and a 128MiB -DDR SDRAM along with a host of other controllers. - -The hawkboard is booted in three stages. The initial bootloader which -executes upon reset is the Rom Boot Loader(RBL) which sits in the -internal ROM of the omap. The RBL initialises the memory and the nand -controller, and copies the image stored at a predefined location(block -1) of the nand flash. The image loaded by the RBL to the memory is the -AIS signed spl image. This, in turns copies the u-boot binary from the -nand flash to the memory and jumps to the u-boot entry point. - -AIS is an image format defined by TI for the images that are to be -loaded to memory by the RBL. The image is divided into a series of -sections and the image's entry point is specified. Each section comes -with meta data like the target address the section is to be copied to -and the size of the section, which is used by the RBL to load the -image. At the end of the image the RBL jumps to the image entry -point. - -The secondary stage bootloader(spl) which is loaded by the RBL then -loads the u-boot from a predefined location in the nand to the memory -and jumps to the u-boot entry point. - -The reason a secondary stage bootloader is used is because the ECC -layout expected by the RBL is not the same as that used by -u-boot/linux. This also implies that for flashing the spl image,we -need to use the u-boot which uses the ECC layout expected by the -RBL[1]. Booting u-boot over UART(UART boot) is explained here[2]. - - -Compilation -=========== -Three images might be needed - -* spl - This is the secondary bootloader which boots the u-boot - binary. - -* u-boot binary - This is the image flashed to the nand and copied to - the memory by the spl. - - Both the images get compiled with hawkboard_config, with the TOPDIR - containing the u-boot images, and the spl image under the spl - directory. - - The spl image needs to be processed with the AISGen tool for - generating the AIS signed image to be flashed. Steps for generating - the AIS image are explained here[3]. - -* u-boot for uart boot - This is same as the u-boot binary generated - above, with the sole difference of the CONFIG_SYS_TEXT_BASE being - 0xc1080000, as expected by the RBL. - - hawkboard_uart_config - - -Flashing the images to Nand -=========================== -The spl AIS image needs to be flashed to the block 1 of the Nand -flash, as that is the location the RBL expects the image[4]. For -flashing the spl, boot over the u-boot specified in [1], and flash the -image - -=> tftpboot 0xc0700000 <nand_spl_ais.bin> -=> nand erase 0x20000 0x20000 -=> nand write.e 0xc0700000 0x20000 <nand_spl_size> - -The u-boot binary is flashed at location 0xe0000(block 6) of the nand -flash. The spl loader expects the u-boot at this location. For -flashing the u-boot binary - -=> tftpboot 0xc0700000 u-boot.bin -=> nand erase 0xe0000 0x40000 -=> nand write.e 0xc0700000 0xe0000 <u-boot-size> - - -Links -===== - -[1] - http://code.google.com/p/hawkboard/downloads/detail?name=u-boot_uart_ais_v1.bin - -[2] - http://elinux.org/Hawkboard#Booting_u-boot_over_UART - -[3] - http://elinux.org/Hawkboard#Signing_u-boot_for_UART_boot - -[4] - http://processors.wiki.ti.com/index.php/RBL_UBL_and_host_program#RBL_booting_from_NAND_and_ECC.2FBad_blocks diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/da830evm.c b/qemu/roms/u-boot/board/davinci/da8xxevm/da830evm.c deleted file mode 100644 index 4f5c780e5..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/da830evm.c +++ /dev/null @@ -1,210 +0,0 @@ -/* - * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> - * - * Base on code from TI. Original Notices follow: - * - * (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/ - * - * Modified for DA8xx EVM. - * - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * Parts are shamelessly stolen from various TI sources, original copyright - * follows: - * ----------------------------------------------------------------- - * - * Copyright (C) 2004 Texas Instruments. - * - * ---------------------------------------------------------------------------- - * SPDX-License-Identifier: GPL-2.0+ - * ---------------------------------------------------------------------------- - */ - -#include <common.h> -#include <i2c.h> -#include <net.h> -#include <netdev.h> -#include <asm/arch/hardware.h> -#include <asm/arch/emif_defs.h> -#include <asm/arch/emac_defs.h> -#include <asm/arch/pinmux_defs.h> -#include <asm/io.h> -#include <nand.h> -#include <asm/arch/nand_defs.h> -#include <asm/arch/davinci_misc.h> - -#ifdef CONFIG_DAVINCI_MMC -#include <mmc.h> -#include <asm/arch/sdmmc_defs.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -static const struct pinmux_resource pinmuxes[] = { -#ifdef CONFIG_SPI_FLASH - PINMUX_ITEM(spi0_pins_base), - PINMUX_ITEM(spi0_pins_scs0), - PINMUX_ITEM(spi0_pins_ena), -#endif - PINMUX_ITEM(uart2_pins_txrx), - PINMUX_ITEM(i2c0_pins), -#ifdef CONFIG_USB_DA8XX - PINMUX_ITEM(usb_pins), -#endif -#ifdef CONFIG_USE_NAND - PINMUX_ITEM(emifa_pins), - PINMUX_ITEM(emifa_pins_cs0), - PINMUX_ITEM(emifa_pins_cs2), - PINMUX_ITEM(emifa_pins_cs3), -#endif -#if defined(CONFIG_DRIVER_TI_EMAC) - PINMUX_ITEM(emac_pins_rmii), - PINMUX_ITEM(emac_pins_mdio), - PINMUX_ITEM(emac_pins_rmii_clk_source), -#endif -#ifdef CONFIG_DAVINCI_MMC - PINMUX_ITEM(mmc0_pins_8bit) -#endif -}; - -static const struct lpsc_resource lpsc[] = { - { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ - { DAVINCI_LPSC_SPI0 }, /* Serial Flash */ - { DAVINCI_LPSC_EMAC }, /* image download */ - { DAVINCI_LPSC_UART2 }, /* console */ - { DAVINCI_LPSC_GPIO }, -#ifdef CONFIG_DAVINCI_MMC - { DAVINCI_LPSC_MMC_SD }, -#endif - -}; - -#ifdef CONFIG_DAVINCI_MMC -static struct davinci_mmc mmc_sd0 = { - .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, - .host_caps = MMC_MODE_8BIT, - .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .version = MMC_CTLR_VERSION_2, -}; - -int board_mmc_init(bd_t *bis) -{ - mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); - - printf("%x\n", mmc_sd0.input_clk); - - /* Add slot-0 to mmc subsystem */ - return davinci_mmc_init(bis, &mmc_sd0); -} -#endif - -int board_init(void) -{ -#ifndef CONFIG_USE_IRQ - irq_init(); -#endif - -#ifdef CONFIG_NAND_DAVINCI - /* EMIFA 100MHz clock select */ - writel(readl(&davinci_syscfg_regs->cfgchip3) & ~2, - &davinci_syscfg_regs->cfgchip3); - /* NAND CS setup */ - writel((DAVINCI_ABCR_WSETUP(0) | - DAVINCI_ABCR_WSTROBE(2) | - DAVINCI_ABCR_WHOLD(0) | - DAVINCI_ABCR_RSETUP(0) | - DAVINCI_ABCR_RSTROBE(2) | - DAVINCI_ABCR_RHOLD(0) | - DAVINCI_ABCR_TA(2) | - DAVINCI_ABCR_ASIZE_8BIT), - &davinci_emif_regs->ab2cr); -#endif - - /* arch number of the board */ - gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM; - - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - /* - * Power on required peripherals - * ARM does not have access by default to PSC0 and PSC1 - * assuming here that the DSP bootloader has set the IOPU - * such that PSC access is available to ARM - */ - if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) - return 1; - - /* setup the SUSPSRC for ARM to control emulation suspend */ - writel(readl(&davinci_syscfg_regs->suspsrc) & - ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | - DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | - DAVINCI_SYSCFG_SUSPSRC_UART2), - &davinci_syscfg_regs->suspsrc); - - /* configure pinmux settings */ - if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) - return 1; - - /* enable the console UART */ - writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | - DAVINCI_UART_PWREMU_MGMT_UTRST), - &davinci_uart2_ctrl_regs->pwremu_mgmt); - - return(0); -} - - -#ifdef CONFIG_NAND_DAVINCI -int board_nand_init(struct nand_chip *nand) -{ - davinci_nand_init(nand); - - return 0; -} -#endif - -#if defined(CONFIG_DRIVER_TI_EMAC) - -#define PHY_SW_I2C_ADDR 0x5f /* Address of PHY on i2c bus */ - -/* - * Initializes on-board ethernet controllers. - */ -int board_eth_init(bd_t *bis) -{ - u_int8_t mac_addr[6]; - u_int8_t switch_start_cmd[2] = { 0x01, 0x23 }; - struct eth_device *dev; - - /* Read Ethernet MAC address from EEPROM */ - if (dvevm_read_mac_address(mac_addr)) - /* set address env if not already set */ - davinci_sync_env_enetaddr(mac_addr); - - /* read the address back from env */ - if (!eth_getenv_enetaddr("ethaddr", mac_addr)) - return -1; - - /* enable the Ethernet switch in the 3 port PHY */ - if (i2c_write(PHY_SW_I2C_ADDR, 0, 0, - switch_start_cmd, sizeof(switch_start_cmd))) { - printf("Ethernet switch start failed!\n"); - return -1; - } - - /* finally, initialise the driver */ - if (!davinci_emac_initialize()) { - printf("Error: Ethernet init failed!\n"); - return -1; - } - - dev = eth_get_dev(); - - /* provide the resulting addr to the driver */ - memcpy(dev->enetaddr, mac_addr, 6); - dev->write_hwaddr(dev); - - return 0; -} -#endif /* CONFIG_DRIVER_TI_EMAC */ diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/da850evm.c b/qemu/roms/u-boot/board/davinci/da8xxevm/da850evm.c deleted file mode 100644 index 85b483096..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/da850evm.c +++ /dev/null @@ -1,494 +0,0 @@ -/* - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ - * - * Based on da830evm.c. Original Copyrights follow: - * - * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <i2c.h> -#include <net.h> -#include <netdev.h> -#include <spi.h> -#include <spi_flash.h> -#include <asm/arch/hardware.h> -#include <asm/arch/emif_defs.h> -#include <asm/arch/emac_defs.h> -#include <asm/arch/pinmux_defs.h> -#include <asm/io.h> -#include <asm/arch/davinci_misc.h> -#include <asm/errno.h> -#include <hwconfig.h> - -#ifdef CONFIG_DAVINCI_MMC -#include <mmc.h> -#include <asm/arch/sdmmc_defs.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_DRIVER_TI_EMAC -#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII -#define HAS_RMII 1 -#else -#define HAS_RMII 0 -#endif -#endif /* CONFIG_DRIVER_TI_EMAC */ - -#define CFG_MAC_ADDR_SPI_BUS 0 -#define CFG_MAC_ADDR_SPI_CS 0 -#define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED -#define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3 - -#define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K) - -#ifdef CONFIG_MAC_ADDR_IN_SPIFLASH -static int get_mac_addr(u8 *addr) -{ - struct spi_flash *flash; - int ret; - - flash = spi_flash_probe(CFG_MAC_ADDR_SPI_BUS, CFG_MAC_ADDR_SPI_CS, - CFG_MAC_ADDR_SPI_MAX_HZ, CFG_MAC_ADDR_SPI_MODE); - if (!flash) { - printf("Error - unable to probe SPI flash.\n"); - return -1; - } - - ret = spi_flash_read(flash, CFG_MAC_ADDR_OFFSET, 6, addr); - if (ret) { - printf("Error - unable to read MAC address from SPI flash.\n"); - return -1; - } - - return ret; -} -#endif - -void dsp_lpsc_on(unsigned domain, unsigned int id) -{ - dv_reg_p mdstat, mdctl, ptstat, ptcmd; - struct davinci_psc_regs *psc_regs; - - psc_regs = davinci_psc0_regs; - mdstat = &psc_regs->psc0.mdstat[id]; - mdctl = &psc_regs->psc0.mdctl[id]; - ptstat = &psc_regs->ptstat; - ptcmd = &psc_regs->ptcmd; - - while (*ptstat & (0x1 << domain)) - ; - - if ((*mdstat & 0x1f) == 0x03) - return; /* Already on and enabled */ - - *mdctl |= 0x03; - - *ptcmd = 0x1 << domain; - - while (*ptstat & (0x1 << domain)) - ; - while ((*mdstat & 0x1f) != 0x03) - ; /* Probably an overkill... */ -} - -static void dspwake(void) -{ - unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE; - u32 val; - - /* if the device is ARM only, return */ - if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10) - return; - - if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL)) - return; - - *resetvect++ = 0x1E000; /* DSP Idle */ - /* clear out the next 10 words as NOP */ - memset(resetvect, 0, sizeof(unsigned) *10); - - /* setup the DSP reset vector */ - writel(DAVINCI_L3CBARAM_BASE, HOST1CFG); - - dsp_lpsc_on(1, DAVINCI_LPSC_GEM); - val = readl(PSC0_MDCTL + (15 * 4)); - val |= 0x100; - writel(val, (PSC0_MDCTL + (15 * 4))); -} - -int misc_init_r(void) -{ - dspwake(); - -#if defined(CONFIG_MAC_ADDR_IN_SPIFLASH) || defined(CONFIG_MAC_ADDR_IN_EEPROM) - - uchar env_enetaddr[6]; - int enetaddr_found; - - enetaddr_found = eth_getenv_enetaddr("ethaddr", env_enetaddr); - -#ifdef CONFIG_MAC_ADDR_IN_SPIFLASH - int spi_mac_read; - uchar buff[6]; - - spi_mac_read = get_mac_addr(buff); - - /* - * MAC address not present in the environment - * try and read the MAC address from SPI flash - * and set it. - */ - if (!enetaddr_found) { - if (!spi_mac_read) { - if (is_valid_ether_addr(buff)) { - if (eth_setenv_enetaddr("ethaddr", buff)) { - printf("Warning: Failed to " - "set MAC address from SPI flash\n"); - } - } else { - printf("Warning: Invalid " - "MAC address read from SPI flash\n"); - } - } - } else { - /* - * MAC address present in environment compare it with - * the MAC address in SPI flash and warn on mismatch - */ - if (!spi_mac_read && is_valid_ether_addr(buff) && - memcmp(env_enetaddr, buff, 6)) - printf("Warning: MAC address in SPI flash don't match " - "with the MAC address in the environment\n"); - printf("Default using MAC address from environment\n"); - } -#endif - uint8_t enetaddr[8]; - int eeprom_mac_read; - - /* Read Ethernet MAC address from EEPROM */ - eeprom_mac_read = dvevm_read_mac_address(enetaddr); - - /* - * MAC address not present in the environment - * try and read the MAC address from EEPROM flash - * and set it. - */ - if (!enetaddr_found) { - if (eeprom_mac_read) - /* Set Ethernet MAC address from EEPROM */ - davinci_sync_env_enetaddr(enetaddr); - } else { - /* - * MAC address present in environment compare it with - * the MAC address in EEPROM and warn on mismatch - */ - if (eeprom_mac_read && memcmp(enetaddr, env_enetaddr, 6)) - printf("Warning: MAC address in EEPROM don't match " - "with the MAC address in the environment\n"); - printf("Default using MAC address from environment\n"); - } - -#endif - return 0; -} - -#ifdef CONFIG_DAVINCI_MMC -static struct davinci_mmc mmc_sd0 = { - .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, - .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */ - .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .version = MMC_CTLR_VERSION_2, -}; - -int board_mmc_init(bd_t *bis) -{ - mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); - - /* Add slot-0 to mmc subsystem */ - return davinci_mmc_init(bis, &mmc_sd0); -} -#endif - -static const struct pinmux_config gpio_pins[] = { -#ifdef CONFIG_USE_NOR - /* GP0[11] is required for NOR to work on Rev 3 EVMs */ - { pinmux(0), 8, 4 }, /* GP0[11] */ -#endif -#ifdef CONFIG_DAVINCI_MMC - /* GP0[11] is required for SD to work on Rev 3 EVMs */ - { pinmux(0), 8, 4 }, /* GP0[11] */ -#endif -}; - -const struct pinmux_resource pinmuxes[] = { -#ifdef CONFIG_DRIVER_TI_EMAC - PINMUX_ITEM(emac_pins_mdio), -#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII - PINMUX_ITEM(emac_pins_rmii), -#else - PINMUX_ITEM(emac_pins_mii), -#endif -#endif -#ifdef CONFIG_SPI_FLASH - PINMUX_ITEM(spi1_pins_base), - PINMUX_ITEM(spi1_pins_scs0), -#endif - PINMUX_ITEM(uart2_pins_txrx), - PINMUX_ITEM(uart2_pins_rtscts), - PINMUX_ITEM(i2c0_pins), -#ifdef CONFIG_NAND_DAVINCI - PINMUX_ITEM(emifa_pins_cs3), - PINMUX_ITEM(emifa_pins_cs4), - PINMUX_ITEM(emifa_pins_nand), -#elif defined(CONFIG_USE_NOR) - PINMUX_ITEM(emifa_pins_cs2), - PINMUX_ITEM(emifa_pins_nor), -#endif - PINMUX_ITEM(gpio_pins), -#ifdef CONFIG_DAVINCI_MMC - PINMUX_ITEM(mmc0_pins), -#endif -}; - -const int pinmuxes_size = ARRAY_SIZE(pinmuxes); - -const struct lpsc_resource lpsc[] = { - { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ - { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ - { DAVINCI_LPSC_EMAC }, /* image download */ - { DAVINCI_LPSC_UART2 }, /* console */ - { DAVINCI_LPSC_GPIO }, -#ifdef CONFIG_DAVINCI_MMC - { DAVINCI_LPSC_MMC_SD }, -#endif -}; - -const int lpsc_size = ARRAY_SIZE(lpsc); - -#ifndef CONFIG_DA850_EVM_MAX_CPU_CLK -#define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000 -#endif - -#define REV_AM18X_EVM 0x100 - -/* - * get_board_rev() - setup to pass kernel board revision information - * Returns: - * bit[0-3] Maximum cpu clock rate supported by onboard SoC - * 0000b - 300 MHz - * 0001b - 372 MHz - * 0010b - 408 MHz - * 0011b - 456 MHz - */ -u32 get_board_rev(void) -{ - char *s; - u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK; - u32 rev = 0; - - s = getenv("maxcpuclk"); - if (s) - maxcpuclk = simple_strtoul(s, NULL, 10); - - if (maxcpuclk >= 456000000) - rev = 3; - else if (maxcpuclk >= 408000000) - rev = 2; - else if (maxcpuclk >= 372000000) - rev = 1; -#ifdef CONFIG_DA850_AM18X_EVM - rev |= REV_AM18X_EVM; -#endif - return rev; -} - -int board_early_init_f(void) -{ - /* - * Power on required peripherals - * ARM does not have access by default to PSC0 and PSC1 - * assuming here that the DSP bootloader has set the IOPU - * such that PSC access is available to ARM - */ - if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) - return 1; - - return 0; -} - -int board_init(void) -{ -#ifndef CONFIG_USE_IRQ - irq_init(); -#endif - -#ifdef CONFIG_NAND_DAVINCI - /* - * NAND CS setup - cycle counts based on da850evm NAND timings in the - * Linux kernel @ 25MHz EMIFA - */ - writel((DAVINCI_ABCR_WSETUP(2) | - DAVINCI_ABCR_WSTROBE(2) | - DAVINCI_ABCR_WHOLD(1) | - DAVINCI_ABCR_RSETUP(1) | - DAVINCI_ABCR_RSTROBE(4) | - DAVINCI_ABCR_RHOLD(0) | - DAVINCI_ABCR_TA(1) | - DAVINCI_ABCR_ASIZE_8BIT), - &davinci_emif_regs->ab2cr); /* CS3 */ -#endif - - /* arch number of the board */ - gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; - - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - /* setup the SUSPSRC for ARM to control emulation suspend */ - writel(readl(&davinci_syscfg_regs->suspsrc) & - ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | - DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | - DAVINCI_SYSCFG_SUSPSRC_UART2), - &davinci_syscfg_regs->suspsrc); - - /* configure pinmux settings */ - if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) - return 1; - -#ifdef CONFIG_USE_NOR - /* Set the GPIO direction as output */ - clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); - - /* Set the output as low */ - writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR); -#endif - -#ifdef CONFIG_DAVINCI_MMC - /* Set the GPIO direction as output */ - clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); - - /* Set the output as high */ - writel(0x01 << 11, GPIO_BANK0_REG_SET_ADDR); -#endif - -#ifdef CONFIG_DRIVER_TI_EMAC - davinci_emac_mii_mode_sel(HAS_RMII); -#endif /* CONFIG_DRIVER_TI_EMAC */ - - /* enable the console UART */ - writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | - DAVINCI_UART_PWREMU_MGMT_UTRST), - &davinci_uart2_ctrl_regs->pwremu_mgmt); - - return 0; -} - -#ifdef CONFIG_DRIVER_TI_EMAC - -#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII -/** - * rmii_hw_init - * - * DA850/OMAP-L138 EVM can interface to a daughter card for - * additional features. This card has an I2C GPIO Expander TCA6416 - * to select the required functions like camera, RMII Ethernet, - * character LCD, video. - * - * Initialization of the expander involves configuring the - * polarity and direction of the ports. P07-P05 are used here. - * These ports are connected to a Mux chip which enables only one - * functionality at a time. - * - * For RMII phy to respond, the MII MDIO clock has to be disabled - * since both the PHY devices have address as zero. The MII MDIO - * clock is controlled via GPIO2[6]. - * - * This code is valid for Beta version of the hardware - */ -int rmii_hw_init(void) -{ - const struct pinmux_config gpio_pins[] = { - { pinmux(6), 8, 1 } - }; - u_int8_t buf[2]; - unsigned int temp; - int ret; - - /* PinMux for GPIO */ - if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0) - return 1; - - /* I2C Exapnder configuration */ - /* Set polarity to non-inverted */ - buf[0] = 0x0; - buf[1] = 0x0; - ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2); - if (ret) { - printf("\nExpander @ 0x%02x write FAILED!!!\n", - CONFIG_SYS_I2C_EXPANDER_ADDR); - return ret; - } - - /* Configure P07-P05 as outputs */ - buf[0] = 0x1f; - buf[1] = 0xff; - ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2); - if (ret) { - printf("\nExpander @ 0x%02x write FAILED!!!\n", - CONFIG_SYS_I2C_EXPANDER_ADDR); - } - - /* For Ethernet RMII selection - * P07(SelA)=0 - * P06(SelB)=1 - * P05(SelC)=1 - */ - if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) { - printf("\nExpander @ 0x%02x read FAILED!!!\n", - CONFIG_SYS_I2C_EXPANDER_ADDR); - } - - buf[0] &= 0x1f; - buf[0] |= (0 << 7) | (1 << 6) | (1 << 5); - if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) { - printf("\nExpander @ 0x%02x write FAILED!!!\n", - CONFIG_SYS_I2C_EXPANDER_ADDR); - } - - /* Set the output as high */ - temp = REG(GPIO_BANK2_REG_SET_ADDR); - temp |= (0x01 << 6); - REG(GPIO_BANK2_REG_SET_ADDR) = temp; - - /* Set the GPIO direction as output */ - temp = REG(GPIO_BANK2_REG_DIR_ADDR); - temp &= ~(0x01 << 6); - REG(GPIO_BANK2_REG_DIR_ADDR) = temp; - - return 0; -} -#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */ - -/* - * Initializes on-board ethernet controllers. - */ -int board_eth_init(bd_t *bis) -{ -#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII - /* Select RMII fucntion through the expander */ - if (rmii_hw_init()) - printf("RMII hardware init failed!!!\n"); -#endif - if (!davinci_emac_initialize()) { - printf("Error: Ethernet init failed!\n"); - return -1; - } - - return 0; -} -#endif /* CONFIG_DRIVER_TI_EMAC */ diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/hawkboard-ais-nand.cfg b/qemu/roms/u-boot/board/davinci/da8xxevm/hawkboard-ais-nand.cfg deleted file mode 100644 index 2b12b6c08..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/hawkboard-ais-nand.cfg +++ /dev/null @@ -1,4 +0,0 @@ -# PLL0CFG0 PLL0CFG1 -PLL0 0x00180001 0x00000205 -# PLL1CFG0 PLL1CFG1 DRPYC1R SDCR SDTIMR1 SDTIMR2 SDRCR CLK2XSRC -DDR2 0x15010001 0x00000002 0x00000043 0x00134632 0x26492a09 0x7d13c722 0x00000249 0x00000000 diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/hawkboard.c b/qemu/roms/u-boot/board/davinci/da8xxevm/hawkboard.c deleted file mode 100644 index d5992a556..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/hawkboard.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * Modified for Hawkboard - Syed Mohammed Khasim <khasim@beagleboard.org> - * - * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar@ti.com> - * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> - * Copyright (C) 2004 Texas Instruments. - * Copyright (C) 2012 Sughosh Ganu <urwithsughosh@gmail.com>. - * - * ---------------------------------------------------------------------------- - * SPDX-License-Identifier: GPL-2.0+ - * ---------------------------------------------------------------------------- - */ - -#include <common.h> -#include <asm/errno.h> -#include <asm/arch/hardware.h> -#include <asm/io.h> -#include <asm/arch/davinci_misc.h> -#include <asm/arch/pinmux_defs.h> -#include <asm/arch/da8xx-usb.h> -#include <ns16550.h> - -DECLARE_GLOBAL_DATA_PTR; - -const struct pinmux_resource pinmuxes[] = { - PINMUX_ITEM(emac_pins_mii), - PINMUX_ITEM(emac_pins_mdio), - PINMUX_ITEM(emifa_pins_cs3), - PINMUX_ITEM(emifa_pins_cs4), - PINMUX_ITEM(emifa_pins_nand), - PINMUX_ITEM(uart2_pins_txrx), - PINMUX_ITEM(uart2_pins_rtscts), -}; - -const int pinmuxes_size = ARRAY_SIZE(pinmuxes); - -const struct lpsc_resource lpsc[] = { - { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ - { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ - { DAVINCI_LPSC_EMAC }, /* image download */ - { DAVINCI_LPSC_UART2 }, /* console */ - { DAVINCI_LPSC_GPIO }, -}; - -const int lpsc_size = ARRAY_SIZE(lpsc); - -int board_init(void) -{ - /* arch number of the board */ - gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_HAWKBOARD; - - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - - return 0; -} - -int board_early_init_f(void) -{ - /* - * Kick Registers need to be set to allow access to Pin Mux registers - */ - writel(DV_SYSCFG_KICK0_UNLOCK, &davinci_syscfg_regs->kick0); - writel(DV_SYSCFG_KICK1_UNLOCK, &davinci_syscfg_regs->kick1); - - /* set cfgchip3 to select mii */ - writel(readl(&davinci_syscfg_regs->cfgchip3) & - ~(1 << 8), &davinci_syscfg_regs->cfgchip3); - - return 0; -} - -int misc_init_r(void) -{ - char buf[32]; - - printf("ARM Clock : %s MHz\n", - strmhz(buf, clk_get(DAVINCI_ARM_CLKID))); - - return 0; -} - -int usb_phy_on(void) -{ - u32 timeout; - u32 cfgchip2; - - cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2); - - cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | - CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ | - CFGCHIP2_USB1PHYCLKMUX); - cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON | - CFGCHIP2_REFFREQ_24MHZ | CFGCHIP2_USB2PHYCLKMUX | - CFGCHIP2_USB1SUSPENDM; - - writel(cfgchip2, &davinci_syscfg_regs->cfgchip2); - - /* wait until the usb phy pll locks */ - timeout = DA8XX_USB_OTG_TIMEOUT; - while (timeout--) - if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD) - return 1; - - /* USB phy was not turned on */ - return 0; -} - -void usb_phy_off(void) -{ - u32 cfgchip2; - - /* - * Power down the on-chip PHY. - */ - cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2); - cfgchip2 &= ~(CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM); - cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | CFGCHIP2_RESET; - writel(cfgchip2, &davinci_syscfg_regs->cfgchip2); -} diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/u-boot-spl-da850evm.lds b/qemu/roms/u-boot/board/davinci/da8xxevm/u-boot-spl-da850evm.lds deleted file mode 100644 index de21a132b..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/u-boot-spl-da850evm.lds +++ /dev/null @@ -1,57 +0,0 @@ -/* - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> - * - * (C) Copyright 2008 - * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\ - LENGTH = CONFIG_SPL_MAX_FOOTPRINT } - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - . = 0x00000000; - - . = ALIGN(4); - .text : - { - __start = .; - arch/arm/cpu/arm926ejs/start.o (.text*) - *(.text*) - } >.sram - - . = ALIGN(4); - .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram - - . = ALIGN(4); - .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram - - . = ALIGN(4); - .rel.dyn : { - __rel_dyn_start = .; - *(.rel*) - __rel_dyn_end = .; - } >.sram - - .bss : - { - . = ALIGN(4); - __bss_start = .; - *(.bss*) - . = ALIGN(4); - __bss_end = .; - } >.sram - - __image_copy_end = .; - - .end : - { - *(.__end) - } -} diff --git a/qemu/roms/u-boot/board/davinci/da8xxevm/u-boot-spl-hawk.lds b/qemu/roms/u-boot/board/davinci/da8xxevm/u-boot-spl-hawk.lds deleted file mode 100644 index 299226b95..000000000 --- a/qemu/roms/u-boot/board/davinci/da8xxevm/u-boot-spl-hawk.lds +++ /dev/null @@ -1,68 +0,0 @@ -/* - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> - * - * (C) Copyright 2008 - * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - . = 0xc1080000; - - . = ALIGN(4); - .text : - { - arch/arm/cpu/arm926ejs/start.o (.text*) - arch/arm/cpu/arm926ejs/davinci/built-in.o (.text*) - drivers/mtd/nand/built-in.o (.text*) - - *(.text*) - } - - . = ALIGN(4); - .rodata : { *(.rodata*) } - - . = ALIGN(4); - .data : { - *(.data) - __datarel_start = .; - *(.data.rel) - __datarelrolocal_start = .; - *(.data.rel.ro.local) - __datarellocal_start = .; - *(.data.rel.local) - __datarelro_start = .; - *(.data.rel.ro) - } - - . = ALIGN(4); - __image_copy_end = .; - __rel_dyn_start = .; - __rel_dyn_end = .; - - __got_start = .; - . = ALIGN(4); - .got : { *(.got) } - - __got_end = .; - - .bss : - { - . = ALIGN(4); - __bss_start = .; - *(.bss*) - . = ALIGN(4); - __bss_end = .; - } - - .end : - { - *(.__end) - } -} |