diff options
Diffstat (limited to 'qemu/roms/u-boot/board/altera')
| -rw-r--r-- | qemu/roms/u-boot/board/altera/common/cfide.c | 33 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/altera/common/epled.c | 46 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/altera/common/sevenseg.c | 204 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/altera/common/sevenseg.h | 126 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/altera/nios2-generic/Makefile | 13 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/altera/nios2-generic/config.mk | 12 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/altera/nios2-generic/custom_fpga.h | 78 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/altera/nios2-generic/nios2-generic.c | 88 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/altera/nios2-generic/text_base.S | 21 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/altera/nios2-generic/u-boot.lds | 118 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/altera/socfpga/Makefile | 10 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/altera/socfpga/pinmux_config.c | 214 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/altera/socfpga/pinmux_config.h | 54 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/altera/socfpga/pll_config.h | 118 | ||||
| -rw-r--r-- | qemu/roms/u-boot/board/altera/socfpga/socfpga_cyclone5.c | 71 |
15 files changed, 0 insertions, 1206 deletions
diff --git a/qemu/roms/u-boot/board/altera/common/cfide.c b/qemu/roms/u-boot/board/altera/common/cfide.c deleted file mode 100644 index 40d6a12b5..000000000 --- a/qemu/roms/u-boot/board/altera/common/cfide.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Altera CF drvier - * - * (C) Copyright 2010, Thomas Chou <thomas@wytron.com.tw> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <common.h> -#include <asm/io.h> - -#if defined(CONFIG_IDE_RESET) && defined(CONFIG_SYS_CF_CTL_BASE) -/* ide_set_reset for Altera CF interface */ -#define ALTERA_CF_CTL_STATUS 0 -#define ALTERA_CF_IDE_CTL 4 -#define ALTERA_CF_CTL_STATUS_PRESENT_MSK (0x1) -#define ALTERA_CF_CTL_STATUS_POWER_MSK (0x2) -#define ALTERA_CF_CTL_STATUS_RESET_MSK (0x4) -#define ALTERA_CF_CTL_STATUS_IRQ_EN_MSK (0x8) -#define ALTERA_CF_IDE_CTL_IRQ_EN_MSK (0x1) - -void ide_set_reset(int idereset) -{ - int i; - writel(idereset ? ALTERA_CF_CTL_STATUS_RESET_MSK : - ALTERA_CF_CTL_STATUS_POWER_MSK, - CONFIG_SYS_CF_CTL_BASE + ALTERA_CF_CTL_STATUS); - /* wait 500 ms for power to stabilize */ - for (i = 0; i < 500; i++) - udelay(1000); -} -#endif diff --git a/qemu/roms/u-boot/board/altera/common/epled.c b/qemu/roms/u-boot/board/altera/common/epled.c deleted file mode 100644 index 580d590f2..000000000 --- a/qemu/roms/u-boot/board/altera/common/epled.c +++ /dev/null @@ -1,46 +0,0 @@ -/* - * (C) Copyright 2004, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/io.h> -#include <nios2-io.h> -#include <status_led.h> - -/* The LED port is configured as output only, so we - * must track the state manually. - */ -static led_id_t val = 0; - -void __led_init (led_id_t mask, int state) -{ - nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR; - - if (state == STATUS_LED_ON) - val &= ~mask; - else - val |= mask; - writel (val, &pio->data); -} - -void __led_set (led_id_t mask, int state) -{ - nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR; - - if (state == STATUS_LED_ON) - val &= ~mask; - else - val |= mask; - writel (val, &pio->data); -} - -void __led_toggle (led_id_t mask) -{ - nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR; - - val ^= mask; - writel (val, &pio->data); -} diff --git a/qemu/roms/u-boot/board/altera/common/sevenseg.c b/qemu/roms/u-boot/board/altera/common/sevenseg.c deleted file mode 100644 index 1f22c8524..000000000 --- a/qemu/roms/u-boot/board/altera/common/sevenseg.c +++ /dev/null @@ -1,204 +0,0 @@ -/* - * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * SPDX-License-Identifier: GPL-2.0+ - * - * common/sevenseg.c - * - * NIOS PIO based seven segment led support functions - */ - -#include <common.h> -#include <nios-io.h> - -#ifdef CONFIG_SEVENSEG - -#define SEVENDEG_MASK_DP ((SEVENSEG_DIGIT_DP << 8) | SEVENSEG_DIGIT_DP) - -#ifdef SEVENSEG_WRONLY /* emulate read access */ -#if (SEVENSEG_ACTIVE == 0) -static unsigned int sevenseg_portval = ~0; -#else -static unsigned int sevenseg_portval = 0; -#endif -#endif - -static int sevenseg_init_done = 0; - -static inline void __sevenseg_set_masked (unsigned int mask, int value) -{ - nios_pio_t *piop __attribute__((unused)) = (nios_pio_t*)SEVENSEG_BASE; - -#ifdef SEVENSEG_WRONLY /* emulate read access */ - -#if (SEVENSEG_ACTIVE == 0) - if (value) - sevenseg_portval &= ~mask; - else - sevenseg_portval |= mask; -#else - if (value) - sevenseg_portval |= mask; - else - sevenseg_portval &= ~mask; -#endif - - piop->data = sevenseg_portval; - -#else /* !SEVENSEG_WRONLY */ - -#if (SEVENSEG_ACTIVE == 0) - if (value) - piop->data &= ~mask; - else - piop->data |= mask; -#else - if (value) - piop->data |= mask; - else - piop->data &= ~mask; -#endif - -#endif /* SEVENSEG_WRONLY */ -} - -static inline void __sevenseg_toggle_masked (unsigned int mask) -{ - nios_pio_t *piop = (nios_pio_t*)SEVENSEG_BASE; - -#ifdef SEVENSEG_WRONLY /* emulate read access */ - - sevenseg_portval ^= mask; - piop->data = sevenseg_portval; - -#else /* !SEVENSEG_WRONLY */ - - piop->data ^= mask; - -#endif /* SEVENSEG_WRONLY */ -} - -static inline void __sevenseg_set (unsigned int value) -{ - nios_pio_t *piop __attribute__((unused)) = (nios_pio_t*)SEVENSEG_BASE; - -#ifdef SEVENSEG_WRONLY /* emulate read access */ - -#if (SEVENSEG_ACTIVE == 0) - sevenseg_portval = (sevenseg_portval & SEVENDEG_MASK_DP) - | ((~value) & (~SEVENDEG_MASK_DP)); -#else - sevenseg_portval = (sevenseg_portval & SEVENDEG_MASK_DP) - | (value); -#endif - - piop->data = sevenseg_portval; - -#else /* !SEVENSEG_WRONLY */ - -#if (SEVENSEG_ACTIVE == 0) - piop->data = (piop->data & SEVENDEG_MASK_DP) - | ((~value) & (~SEVENDEG_MASK_DP)); -#else - piop->data = (piop->data & SEVENDEG_MASK_DP) - | (value); -#endif - -#endif /* SEVENSEG_WRONLY */ -} - -static inline void __sevenseg_init (void) -{ - nios_pio_t *piop __attribute__((unused)) = (nios_pio_t*)SEVENSEG_BASE; - - __sevenseg_set(0); - -#ifndef SEVENSEG_WRONLY /* setup direction */ - - piop->direction |= mask; - -#endif /* SEVENSEG_WRONLY */ -} - - -void sevenseg_set(int value) -{ - unsigned char digits[] = { - SEVENSEG_DIGITS_0, - SEVENSEG_DIGITS_1, - SEVENSEG_DIGITS_2, - SEVENSEG_DIGITS_3, - SEVENSEG_DIGITS_4, - SEVENSEG_DIGITS_5, - SEVENSEG_DIGITS_6, - SEVENSEG_DIGITS_7, - SEVENSEG_DIGITS_8, - SEVENSEG_DIGITS_9, - SEVENSEG_DIGITS_A, - SEVENSEG_DIGITS_B, - SEVENSEG_DIGITS_C, - SEVENSEG_DIGITS_D, - SEVENSEG_DIGITS_E, - SEVENSEG_DIGITS_F - }; - - if (!sevenseg_init_done) { - __sevenseg_init(); - sevenseg_init_done++; - } - - switch (value & SEVENSEG_MASK_CTRL) { - - case SEVENSEG_RAW: - __sevenseg_set( ( - (digits[((value & SEVENSEG_MASK_VAL) >> 4)] << 8) | - digits[((value & SEVENSEG_MASK_VAL) & 0xf)] ) ); - return; - break; /* paranoia */ - - case SEVENSEG_OFF: - __sevenseg_set(0); - __sevenseg_set_masked(SEVENDEG_MASK_DP, 0); - return; - break; /* paranoia */ - - case SEVENSEG_SET_DPL: - __sevenseg_set_masked(SEVENSEG_DIGIT_DP, 1); - return; - break; /* paranoia */ - - case SEVENSEG_SET_DPH: - __sevenseg_set_masked((SEVENSEG_DIGIT_DP << 8), 1); - return; - break; /* paranoia */ - - case SEVENSEG_RES_DPL: - __sevenseg_set_masked(SEVENSEG_DIGIT_DP, 0); - return; - break; /* paranoia */ - - case SEVENSEG_RES_DPH: - __sevenseg_set_masked((SEVENSEG_DIGIT_DP << 8), 0); - return; - break; /* paranoia */ - - case SEVENSEG_TOG_DPL: - __sevenseg_toggle_masked(SEVENSEG_DIGIT_DP); - return; - break; /* paranoia */ - - case SEVENSEG_TOG_DPH: - __sevenseg_toggle_masked((SEVENSEG_DIGIT_DP << 8)); - return; - break; /* paranoia */ - - case SEVENSEG_LO: - case SEVENSEG_HI: - case SEVENSEG_STR: - default: - break; - } -} - -#endif /* CONFIG_SEVENSEG */ diff --git a/qemu/roms/u-boot/board/altera/common/sevenseg.h b/qemu/roms/u-boot/board/altera/common/sevenseg.h deleted file mode 100644 index 34348329e..000000000 --- a/qemu/roms/u-boot/board/altera/common/sevenseg.h +++ /dev/null @@ -1,126 +0,0 @@ -/* - * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net> - * Stephan Linz <linz@li-pro.net> - * - * SPDX-License-Identifier: GPL-2.0+ - * - * common/sevenseg.h - * - * NIOS PIO based seven segment led support functions - */ - -#ifndef __DK1S10_SEVENSEG_H__ -#define __DK1S10_SEVENSEG_H__ - -#ifdef CONFIG_SEVENSEG - -/* - * 15 8 7 0 - * |-----------------------|--------| - * | controll value | value | - * ---------------------------------- - */ -#define SEVENSEG_RAW (int)(0) /* write out byte value (hex) */ -#define SEVENSEG_OFF (int)( 1 << 8) /* display switch off */ -#define SEVENSEG_SET_DPL (int)( 2 << 8) /* set dp low nibble */ -#define SEVENSEG_SET_DPH (int)( 3 << 8) /* set dp high nibble */ -#define SEVENSEG_RES_DPL (int)( 4 << 8) /* reset dp low nibble */ -#define SEVENSEG_RES_DPH (int)( 5 << 8) /* reset dp high nibble */ -#define SEVENSEG_TOG_DPL (int)( 6 << 8) /* toggle dp low nibble */ -#define SEVENSEG_TOG_DPH (int)( 7 << 8) /* toggle dp high nibble */ -#define SEVENSEG_LO (int)( 8 << 8) /* write out low nibble only */ -#define SEVENSEG_HI (int)( 9 << 8) /* write out high nibble only */ -#define SEVENSEG_STR (int)(10 << 8) /* write out a string */ - -#define SEVENSEG_MASK_VAL (0xff) /* only used by SEVENSEG_RAW */ -#define SEVENSEG_MASK_CTRL (~SEVENSEG_MASK_VAL) - -#ifdef SEVENSEG_DIGIT_HI_LO_EQUAL - -#define SEVENSEG_DIGITS_0 ( SEVENSEG_DIGIT_A \ - | SEVENSEG_DIGIT_B \ - | SEVENSEG_DIGIT_C \ - | SEVENSEG_DIGIT_D \ - | SEVENSEG_DIGIT_E \ - | SEVENSEG_DIGIT_F ) -#define SEVENSEG_DIGITS_1 ( SEVENSEG_DIGIT_B \ - | SEVENSEG_DIGIT_C ) -#define SEVENSEG_DIGITS_2 ( SEVENSEG_DIGIT_A \ - | SEVENSEG_DIGIT_B \ - | SEVENSEG_DIGIT_D \ - | SEVENSEG_DIGIT_E \ - | SEVENSEG_DIGIT_G ) -#define SEVENSEG_DIGITS_3 ( SEVENSEG_DIGIT_A \ - | SEVENSEG_DIGIT_B \ - | SEVENSEG_DIGIT_C \ - | SEVENSEG_DIGIT_D \ - | SEVENSEG_DIGIT_G ) -#define SEVENSEG_DIGITS_4 ( SEVENSEG_DIGIT_B \ - | SEVENSEG_DIGIT_C \ - | SEVENSEG_DIGIT_F \ - | SEVENSEG_DIGIT_G ) -#define SEVENSEG_DIGITS_5 ( SEVENSEG_DIGIT_A \ - | SEVENSEG_DIGIT_C \ - | SEVENSEG_DIGIT_D \ - | SEVENSEG_DIGIT_F \ - | SEVENSEG_DIGIT_G ) -#define SEVENSEG_DIGITS_6 ( SEVENSEG_DIGIT_A \ - | SEVENSEG_DIGIT_C \ - | SEVENSEG_DIGIT_D \ - | SEVENSEG_DIGIT_E \ - | SEVENSEG_DIGIT_F \ - | SEVENSEG_DIGIT_G ) -#define SEVENSEG_DIGITS_7 ( SEVENSEG_DIGIT_A \ - | SEVENSEG_DIGIT_B \ - | SEVENSEG_DIGIT_C ) -#define SEVENSEG_DIGITS_8 ( SEVENSEG_DIGIT_A \ - | SEVENSEG_DIGIT_B \ - | SEVENSEG_DIGIT_C \ - | SEVENSEG_DIGIT_D \ - | SEVENSEG_DIGIT_E \ - | SEVENSEG_DIGIT_F \ - | SEVENSEG_DIGIT_G ) -#define SEVENSEG_DIGITS_9 ( SEVENSEG_DIGIT_A \ - | SEVENSEG_DIGIT_B \ - | SEVENSEG_DIGIT_C \ - | SEVENSEG_DIGIT_D \ - | SEVENSEG_DIGIT_F \ - | SEVENSEG_DIGIT_G ) -#define SEVENSEG_DIGITS_A ( SEVENSEG_DIGIT_A \ - | SEVENSEG_DIGIT_B \ - | SEVENSEG_DIGIT_C \ - | SEVENSEG_DIGIT_E \ - | SEVENSEG_DIGIT_F \ - | SEVENSEG_DIGIT_G ) -#define SEVENSEG_DIGITS_B ( SEVENSEG_DIGIT_C \ - | SEVENSEG_DIGIT_D \ - | SEVENSEG_DIGIT_E \ - | SEVENSEG_DIGIT_F \ - | SEVENSEG_DIGIT_G ) -#define SEVENSEG_DIGITS_C ( SEVENSEG_DIGIT_D \ - | SEVENSEG_DIGIT_E \ - | SEVENSEG_DIGIT_G ) -#define SEVENSEG_DIGITS_D ( SEVENSEG_DIGIT_B \ - | SEVENSEG_DIGIT_C \ - | SEVENSEG_DIGIT_D \ - | SEVENSEG_DIGIT_E \ - | SEVENSEG_DIGIT_G ) -#define SEVENSEG_DIGITS_E ( SEVENSEG_DIGIT_A \ - | SEVENSEG_DIGIT_D \ - | SEVENSEG_DIGIT_E \ - | SEVENSEG_DIGIT_F \ - | SEVENSEG_DIGIT_G ) -#define SEVENSEG_DIGITS_F ( SEVENSEG_DIGIT_A \ - | SEVENSEG_DIGIT_E \ - | SEVENSEG_DIGIT_F \ - | SEVENSEG_DIGIT_G ) - -#else /* !SEVENSEG_DIGIT_HI_LO_EQUAL */ -#error SEVENSEG: different pin asssignments not supported -#endif - -void sevenseg_set(int value); - -#endif /* CONFIG_SEVENSEG */ - -#endif /* __DK1S10_SEVENSEG_H__ */ diff --git a/qemu/roms/u-boot/board/altera/nios2-generic/Makefile b/qemu/roms/u-boot/board/altera/nios2-generic/Makefile deleted file mode 100644 index 84690fe04..000000000 --- a/qemu/roms/u-boot/board/altera/nios2-generic/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# -# (C) Copyright 2001-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# (C) Copyright 2010, Thomas Chou <thomas@wytron.com.tw> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := nios2-generic.o -obj-$(CONFIG_CMD_IDE) += ../common/cfide.o -obj-$(CONFIG_EPLED) += ../common/epled.o -obj-$(CONFIG_SEVENSEG) += ../common/sevenseg.o -obj-y += text_base.o diff --git a/qemu/roms/u-boot/board/altera/nios2-generic/config.mk b/qemu/roms/u-boot/board/altera/nios2-generic/config.mk deleted file mode 100644 index a67352519..000000000 --- a/qemu/roms/u-boot/board/altera/nios2-generic/config.mk +++ /dev/null @@ -1,12 +0,0 @@ -# -# (C) Copyright 2005, Psyent Corporation <www.psyent.com> -# Scott McNutt <smcnutt@psyent.com> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul - -ifeq ($(debug),1) -PLATFORM_CPPFLAGS += -DDEBUG -endif diff --git a/qemu/roms/u-boot/board/altera/nios2-generic/custom_fpga.h b/qemu/roms/u-boot/board/altera/nios2-generic/custom_fpga.h deleted file mode 100644 index fd3ec9a8d..000000000 --- a/qemu/roms/u-boot/board/altera/nios2-generic/custom_fpga.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - * (C) Copyright 2010, Thomas Chou <thomas@wytron.com.tw> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This file is generated by sopc-create-config-files. - */ -#ifndef _CUSTOM_FPGA_H_ -#define _CUSTOM_FPGA_H_ - -/* generated from std_1c20.sopc */ - -/* cpu.data_master is a altera_nios2 */ -#define CONFIG_SYS_CLK_FREQ 50000000 -#define CONFIG_SYS_RESET_ADDR 0x00000000 -#define CONFIG_SYS_EXCEPTION_ADDR 0x01000020 -#define CONFIG_SYS_ICACHE_SIZE 4096 -#define CONFIG_SYS_ICACHELINE_SIZE 32 -#define CONFIG_SYS_DCACHE_SIZE 2048 -#define CONFIG_SYS_DCACHELINE_SIZE 4 - -/* sdram.s1 is a altera_avalon_new_sdram_controller */ -#define CONFIG_SYS_SDRAM_BASE 0x01000000 -#define CONFIG_SYS_SDRAM_SIZE 0x01000000 - -/* uart1.s1 is a altera_avalon_uart */ -#define CONFIG_SYS_UART_BASE 0x82120840 -#define CONFIG_SYS_UART_FREQ 50000000 -#define CONFIG_SYS_UART_BAUD 115200 - -/* lan91c111.s1 is a altera_avalon_lan91c111 */ -#define CONFIG_SMC91111_BASE 0x82110300 -#define CONFIG_SMC91111 -#define CONFIG_SMC_USE_32_BIT - -/* epcs_controller.epcs_control_port is a altera_avalon_epcs_flash_controller */ -#define EPCS_CONTROLLER_REG_BASE 0x82100200 -#define CONFIG_SYS_ALTERA_SPI_LIST { EPCS_CONTROLLER_REG_BASE } -#define CONFIG_ALTERA_SPI -#define CONFIG_CMD_SPI -#define CONFIG_CMD_SF -#define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_STMICRO - -/* jtag_uart.avalon_jtag_slave is a altera_avalon_jtag_uart */ -#define CONFIG_SYS_JTAG_UART_BASE 0x821208b0 - -/* led_pio.s1 is a altera_avalon_pio */ -#define LED_PIO_BASE 0x82120870 -#define LED_PIO_WIDTH 8 -#define LED_PIO_RSTVAL 0x0 - -/* high_res_timer.s1 is a altera_avalon_timer */ -#define CONFIG_SYS_TIMER_BASE 0x82120820 -#define CONFIG_SYS_TIMER_IRQ 3 -#define CONFIG_SYS_TIMER_FREQ 50000000 - -/* ext_flash.s1 is a altera_avalon_cfi_flash */ -#define CONFIG_SYS_FLASH_BASE 0x80000000 -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* fix amd flash issue */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#define CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 1024 - -/* ext_ram.s1 is a altera_nios_dev_kit_stratix_edition_sram2 */ -#define CONFIG_SYS_SRAM_BASE 0x02000000 -#define CONFIG_SYS_SRAM_SIZE 0x00100000 - -/* sysid.control_slave is a altera_avalon_sysid */ -#define CONFIG_SYS_SYSID_BASE 0x821208b8 - -#endif /* _CUSTOM_FPGA_H_ */ diff --git a/qemu/roms/u-boot/board/altera/nios2-generic/nios2-generic.c b/qemu/roms/u-boot/board/altera/nios2-generic/nios2-generic.c deleted file mode 100644 index 5ab947124..000000000 --- a/qemu/roms/u-boot/board/altera/nios2-generic/nios2-generic.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * (C) Copyright 2005, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * (C) Copyright 2010, Thomas Chou <thomas@wytron.com.tw> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <netdev.h> -#if defined(CONFIG_CFI_FLASH_MTD) -#include <mtd/cfi_flash.h> -#endif -#include <asm/io.h> -#include <asm/gpio.h> - -void text_base_hook(void); /* nop hook for text_base.S */ - -#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR) && \ - defined(CONFIG_CFI_FLASH_MTD) -static void __early_flash_cmd_reset(void) -{ - /* reset flash before we read env */ - writeb(AMD_CMD_RESET, CONFIG_ENV_ADDR); - writeb(FLASH_CMD_RESET, CONFIG_ENV_ADDR); -} -void early_flash_cmd_reset(void) - __attribute__((weak,alias("__early_flash_cmd_reset"))); -#endif - -int board_early_init_f(void) -{ - text_base_hook(); -#ifdef CONFIG_ALTERA_PIO -#ifdef LED_PIO_BASE - altera_pio_init(LED_PIO_BASE, LED_PIO_WIDTH, 'o', - LED_PIO_RSTVAL, (1 << LED_PIO_WIDTH) - 1, - "led"); -#endif -#endif -#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR) && \ - defined(CONFIG_CFI_FLASH_MTD) - early_flash_cmd_reset(); -#endif - return 0; -} - -int checkboard(void) -{ - printf("BOARD : %s\n", CONFIG_BOARD_NAME); - return 0; -} - -phys_size_t initdram(int board_type) -{ - return 0; -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_SMC91111 - rc += smc91111_initialize(0, CONFIG_SMC91111_BASE); -#endif -#ifdef CONFIG_DRIVER_DM9000 - rc += dm9000_initialize(bis); -#endif -#ifdef CONFIG_ALTERA_TSE - rc += altera_tse_initialize(0, - CONFIG_SYS_ALTERA_TSE_MAC_BASE, - CONFIG_SYS_ALTERA_TSE_SGDMA_RX_BASE, - CONFIG_SYS_ALTERA_TSE_SGDMA_TX_BASE, -#if defined(CONFIG_SYS_ALTERA_TSE_SGDMA_DESC_BASE) && \ - (CONFIG_SYS_ALTERA_TSE_SGDMA_DESC_SIZE > 0) - CONFIG_SYS_ALTERA_TSE_SGDMA_DESC_BASE, - CONFIG_SYS_ALTERA_TSE_SGDMA_DESC_SIZE); -#else - 0, - 0); -#endif -#endif -#ifdef CONFIG_ETHOC - rc += ethoc_initialize(0, CONFIG_SYS_ETHOC_BASE); -#endif - return rc; -} -#endif diff --git a/qemu/roms/u-boot/board/altera/nios2-generic/text_base.S b/qemu/roms/u-boot/board/altera/nios2-generic/text_base.S deleted file mode 100644 index f236db13e..000000000 --- a/qemu/roms/u-boot/board/altera/nios2-generic/text_base.S +++ /dev/null @@ -1,21 +0,0 @@ -/* - * text_base - * - * (C) Copyright 2010, Thomas Chou <thomas@wytron.com.tw> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <config.h> - -#ifdef CONFIG_SYS_MONITOR_BASE - .text - /* text base used in link script u-boot.lds */ - .global text_base - .equ text_base,CONFIG_SYS_MONITOR_BASE - /* dummy func to let linker include this file */ - .global text_base_hook -text_base_hook: - ret -#endif diff --git a/qemu/roms/u-boot/board/altera/nios2-generic/u-boot.lds b/qemu/roms/u-boot/board/altera/nios2-generic/u-boot.lds deleted file mode 100644 index e35fae54d..000000000 --- a/qemu/roms/u-boot/board/altera/nios2-generic/u-boot.lds +++ /dev/null @@ -1,118 +0,0 @@ -/* - * (C) Copyright 2004, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - - -OUTPUT_FORMAT("elf32-littlenios2") -OUTPUT_ARCH(nios2) -ENTRY(_start) - -SECTIONS -{ - . = text_base; - .text : - { - arch/nios2/cpu/start.o (.text) - *(.text) - *(.text.*) - *(.gnu.linkonce.t*) - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - *(.gnu.linkonce.r*) - } - . = ALIGN (4); - _etext = .; - PROVIDE (etext = .); - - /* CMD TABLE - sandwich this in between text and data so - * the initialization code relocates the command table as - * well -- admittedly, this is just pure laziness ;-) - */ - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - /* INIT DATA sections - "Small" data (see the gcc -G option) - * is always gp-relative. Here we make all init data sections - * adjacent to simplify the startup code -- and provide - * the global pointer for gp-relative access. - */ - _data = .; - .data : - { - *(.data) - *(.data.*) - *(.gnu.linkonce.d*) - } - - . = ALIGN(16); - _gp = .; /* Global pointer addr */ - PROVIDE (gp = .); - - .sdata : - { - *(.sdata) - *(.sdata.*) - *(.gnu.linkonce.s.*) - } - . = ALIGN(4); - - _edata = .; - PROVIDE (edata = .); - - /* UNINIT DATA - Small uninitialized data is first so it's - * adjacent to sdata and can be referenced via gp. The normal - * bss follows. We keep it adjacent to simplify init code. - */ - __bss_start = .; - .sbss (NOLOAD) : - { - *(.sbss) - *(.sbss.*) - *(.gnu.linkonce.sb.*) - *(.scommon) - } - . = ALIGN(4); - .bss (NOLOAD) : - { - *(.bss) - *(.bss.*) - *(.dynbss) - *(COMMON) - *(.scommon) - } - . = ALIGN(4); - __bss_end = .; - PROVIDE (end = .); - - /* DEBUG -- symbol table, string table, etc. etc. - */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - .debug_info 0 : { *(.debug_info) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } -} diff --git a/qemu/roms/u-boot/board/altera/socfpga/Makefile b/qemu/roms/u-boot/board/altera/socfpga/Makefile deleted file mode 100644 index de339ec7f..000000000 --- a/qemu/roms/u-boot/board/altera/socfpga/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# -# (C) Copyright 2001-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# (C) Copyright 2010, Thomas Chou <thomas@wytron.com.tw> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := socfpga_cyclone5.o -obj-$(CONFIG_SPL_BUILD) += pinmux_config.o diff --git a/qemu/roms/u-boot/board/altera/socfpga/pinmux_config.c b/qemu/roms/u-boot/board/altera/socfpga/pinmux_config.c deleted file mode 100644 index 8b09005b6..000000000 --- a/qemu/roms/u-boot/board/altera/socfpga/pinmux_config.c +++ /dev/null @@ -1,214 +0,0 @@ -/* This file is generated by Preloader Generator */ - -#include "pinmux_config.h" - -/* pin mux configuration data */ -unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = { - 0, /* EMACIO0 - Unused */ - 2, /* EMACIO1 - USB */ - 2, /* EMACIO2 - USB */ - 2, /* EMACIO3 - USB */ - 2, /* EMACIO4 - USB */ - 2, /* EMACIO5 - USB */ - 2, /* EMACIO6 - USB */ - 2, /* EMACIO7 - USB */ - 2, /* EMACIO8 - USB */ - 0, /* EMACIO9 - Unused */ - 2, /* EMACIO10 - USB */ - 2, /* EMACIO11 - USB */ - 2, /* EMACIO12 - USB */ - 2, /* EMACIO13 - USB */ - 0, /* EMACIO14 - N/A */ - 0, /* EMACIO15 - N/A */ - 0, /* EMACIO16 - N/A */ - 0, /* EMACIO17 - N/A */ - 0, /* EMACIO18 - N/A */ - 0, /* EMACIO19 - N/A */ - 3, /* FLASHIO0 - SDMMC */ - 3, /* FLASHIO1 - SDMMC */ - 3, /* FLASHIO2 - SDMMC */ - 3, /* FLASHIO3 - SDMMC */ - 0, /* FLASHIO4 - SDMMC */ - 0, /* FLASHIO5 - SDMMC */ - 0, /* FLASHIO6 - SDMMC */ - 0, /* FLASHIO7 - SDMMC */ - 0, /* FLASHIO8 - SDMMC */ - 3, /* FLASHIO9 - SDMMC */ - 3, /* FLASHIO10 - SDMMC */ - 3, /* FLASHIO11 - SDMMC */ - 3, /* GENERALIO0 - TRACE */ - 3, /* GENERALIO1 - TRACE */ - 3, /* GENERALIO2 - TRACE */ - 3, /* GENERALIO3 - TRACE */ - 3, /* GENERALIO4 - TRACE */ - 3, /* GENERALIO5 - TRACE */ - 3, /* GENERALIO6 - TRACE */ - 3, /* GENERALIO7 - TRACE */ - 3, /* GENERALIO8 - TRACE */ - 3, /* GENERALIO9 - SPIM0 */ - 3, /* GENERALIO10 - SPIM0 */ - 3, /* GENERALIO11 - SPIM0 */ - 3, /* GENERALIO12 - SPIM0 */ - 2, /* GENERALIO13 - CAN0 */ - 2, /* GENERALIO14 - CAN0 */ - 3, /* GENERALIO15 - I2C0 */ - 3, /* GENERALIO16 - I2C0 */ - 2, /* GENERALIO17 - UART0 */ - 2, /* GENERALIO18 - UART0 */ - 0, /* GENERALIO19 - N/A */ - 0, /* GENERALIO20 - N/A */ - 0, /* GENERALIO21 - N/A */ - 0, /* GENERALIO22 - N/A */ - 0, /* GENERALIO23 - N/A */ - 0, /* GENERALIO24 - N/A */ - 0, /* GENERALIO25 - N/A */ - 0, /* GENERALIO26 - N/A */ - 0, /* GENERALIO27 - N/A */ - 0, /* GENERALIO28 - N/A */ - 0, /* GENERALIO29 - N/A */ - 0, /* GENERALIO30 - N/A */ - 0, /* GENERALIO31 - N/A */ - 2, /* MIXED1IO0 - EMAC */ - 2, /* MIXED1IO1 - EMAC */ - 2, /* MIXED1IO2 - EMAC */ - 2, /* MIXED1IO3 - EMAC */ - 2, /* MIXED1IO4 - EMAC */ - 2, /* MIXED1IO5 - EMAC */ - 2, /* MIXED1IO6 - EMAC */ - 2, /* MIXED1IO7 - EMAC */ - 2, /* MIXED1IO8 - EMAC */ - 2, /* MIXED1IO9 - EMAC */ - 2, /* MIXED1IO10 - EMAC */ - 2, /* MIXED1IO11 - EMAC */ - 2, /* MIXED1IO12 - EMAC */ - 2, /* MIXED1IO13 - EMAC */ - 0, /* MIXED1IO14 - Unused */ - 3, /* MIXED1IO15 - QSPI */ - 3, /* MIXED1IO16 - QSPI */ - 3, /* MIXED1IO17 - QSPI */ - 3, /* MIXED1IO18 - QSPI */ - 3, /* MIXED1IO19 - QSPI */ - 3, /* MIXED1IO20 - QSPI */ - 0, /* MIXED1IO21 - GPIO */ - 0, /* MIXED2IO0 - N/A */ - 0, /* MIXED2IO1 - N/A */ - 0, /* MIXED2IO2 - N/A */ - 0, /* MIXED2IO3 - N/A */ - 0, /* MIXED2IO4 - N/A */ - 0, /* MIXED2IO5 - N/A */ - 0, /* MIXED2IO6 - N/A */ - 0, /* MIXED2IO7 - N/A */ - 0, /* GPLINMUX48 */ - 0, /* GPLINMUX49 */ - 0, /* GPLINMUX50 */ - 0, /* GPLINMUX51 */ - 0, /* GPLINMUX52 */ - 0, /* GPLINMUX53 */ - 0, /* GPLINMUX54 */ - 0, /* GPLINMUX55 */ - 0, /* GPLINMUX56 */ - 0, /* GPLINMUX57 */ - 0, /* GPLINMUX58 */ - 0, /* GPLINMUX59 */ - 0, /* GPLINMUX60 */ - 0, /* GPLINMUX61 */ - 0, /* GPLINMUX62 */ - 0, /* GPLINMUX63 */ - 0, /* GPLINMUX64 */ - 0, /* GPLINMUX65 */ - 0, /* GPLINMUX66 */ - 0, /* GPLINMUX67 */ - 0, /* GPLINMUX68 */ - 0, /* GPLINMUX69 */ - 0, /* GPLINMUX70 */ - 1, /* GPLMUX0 */ - 1, /* GPLMUX1 */ - 1, /* GPLMUX2 */ - 1, /* GPLMUX3 */ - 1, /* GPLMUX4 */ - 1, /* GPLMUX5 */ - 1, /* GPLMUX6 */ - 1, /* GPLMUX7 */ - 1, /* GPLMUX8 */ - 1, /* GPLMUX9 */ - 1, /* GPLMUX10 */ - 1, /* GPLMUX11 */ - 1, /* GPLMUX12 */ - 1, /* GPLMUX13 */ - 1, /* GPLMUX14 */ - 1, /* GPLMUX15 */ - 1, /* GPLMUX16 */ - 1, /* GPLMUX17 */ - 1, /* GPLMUX18 */ - 1, /* GPLMUX19 */ - 1, /* GPLMUX20 */ - 1, /* GPLMUX21 */ - 1, /* GPLMUX22 */ - 1, /* GPLMUX23 */ - 1, /* GPLMUX24 */ - 1, /* GPLMUX25 */ - 1, /* GPLMUX26 */ - 1, /* GPLMUX27 */ - 1, /* GPLMUX28 */ - 1, /* GPLMUX29 */ - 1, /* GPLMUX30 */ - 1, /* GPLMUX31 */ - 1, /* GPLMUX32 */ - 1, /* GPLMUX33 */ - 1, /* GPLMUX34 */ - 1, /* GPLMUX35 */ - 1, /* GPLMUX36 */ - 1, /* GPLMUX37 */ - 1, /* GPLMUX38 */ - 1, /* GPLMUX39 */ - 1, /* GPLMUX40 */ - 1, /* GPLMUX41 */ - 1, /* GPLMUX42 */ - 1, /* GPLMUX43 */ - 1, /* GPLMUX44 */ - 1, /* GPLMUX45 */ - 1, /* GPLMUX46 */ - 1, /* GPLMUX47 */ - 1, /* GPLMUX48 */ - 1, /* GPLMUX49 */ - 1, /* GPLMUX50 */ - 1, /* GPLMUX51 */ - 1, /* GPLMUX52 */ - 1, /* GPLMUX53 */ - 1, /* GPLMUX54 */ - 1, /* GPLMUX55 */ - 1, /* GPLMUX56 */ - 1, /* GPLMUX57 */ - 1, /* GPLMUX58 */ - 1, /* GPLMUX59 */ - 1, /* GPLMUX60 */ - 1, /* GPLMUX61 */ - 1, /* GPLMUX62 */ - 1, /* GPLMUX63 */ - 1, /* GPLMUX64 */ - 1, /* GPLMUX65 */ - 1, /* GPLMUX66 */ - 1, /* GPLMUX67 */ - 1, /* GPLMUX68 */ - 1, /* GPLMUX69 */ - 1, /* GPLMUX70 */ - 0, /* NANDUSEFPGA */ - 0, /* UART0USEFPGA */ - 0, /* RGMII1USEFPGA */ - 0, /* SPIS0USEFPGA */ - 0, /* CAN0USEFPGA */ - 0, /* I2C0USEFPGA */ - 0, /* SDMMCUSEFPGA */ - 0, /* QSPIUSEFPGA */ - 0, /* SPIS1USEFPGA */ - 0, /* RGMII0USEFPGA */ - 0, /* UART1USEFPGA */ - 0, /* CAN1USEFPGA */ - 0, /* USB1USEFPGA */ - 0, /* I2C3USEFPGA */ - 0, /* I2C2USEFPGA */ - 0, /* I2C1USEFPGA */ - 0, /* SPIM1USEFPGA */ - 0, /* USB0USEFPGA */ - 0 /* SPIM0USEFPGA */ -}; diff --git a/qemu/roms/u-boot/board/altera/socfpga/pinmux_config.h b/qemu/roms/u-boot/board/altera/socfpga/pinmux_config.h deleted file mode 100644 index f278f2b28..000000000 --- a/qemu/roms/u-boot/board/altera/socfpga/pinmux_config.h +++ /dev/null @@ -1,54 +0,0 @@ -/* This file is generated by Preloader Generator */ - -#ifndef _PRELOADER_PINMUX_CONFIG_H_ -#define _PRELOADER_PINMUX_CONFIG_H_ - -/* - * State of enabling for which IP connected out through the muxing. - * Value 1 mean the IP connection is muxed out - */ -#define CONFIG_HPS_EMAC0 (0) -#define CONFIG_HPS_EMAC1 (1) -#define CONFIG_HPS_USB0 (0) -#define CONFIG_HPS_USB1 (1) -#define CONFIG_HPS_NAND (0) -#define CONFIG_HPS_SDMMC (1) -#define CONFIG_HPS_QSPI (1) -#define CONFIG_HPS_UART0 (1) -#define CONFIG_HPS_UART1 (0) -#define CONFIG_HPS_TRACE (1) -#define CONFIG_HPS_I2C0 (1) -#define CONFIG_HPS_I2C1 (0) -#define CONFIG_HPS_I2C2 (0) -#define CONFIG_HPS_I2C3 (0) -#define CONFIG_HPS_SPIM0 (1) -#define CONFIG_HPS_SPIM1 (0) -#define CONFIG_HPS_SPIS0 (0) -#define CONFIG_HPS_SPIS1 (0) -#define CONFIG_HPS_CAN0 (1) -#define CONFIG_HPS_CAN1 (0) - -/* IP attribute value (which affected by pin muxing configuration) */ -#define CONFIG_HPS_SDMMC_BUSWIDTH (4) - -/* 1 if the pins are connected out */ -#define CONFIG_HPS_QSPI_CS0 (1) -#define CONFIG_HPS_QSPI_CS1 (0) -#define CONFIG_HPS_QSPI_CS2 (0) -#define CONFIG_HPS_QSPI_CS3 (0) - -/* UART */ -/* 1 means the pin is mux out or available */ -#define CONFIG_HPS_UART0_TX (1) -#define CONFIG_HPS_UART0_RX (1) -#define CONFIG_HPS_UART0_CTS (0) -#define CONFIG_HPS_UART0_RTS (0) -#define CONFIG_HPS_UART1_TX (0) -#define CONFIG_HPS_UART1_RX (0) -#define CONFIG_HPS_UART1_CTS (0) -#define CONFIG_HPS_UART1_RTS (0) - -/* Pin mux data */ -#define CONFIG_HPS_PINMUX_NUM (207) - -#endif /* _PRELOADER_PINMUX_CONFIG_H_ */ diff --git a/qemu/roms/u-boot/board/altera/socfpga/pll_config.h b/qemu/roms/u-boot/board/altera/socfpga/pll_config.h deleted file mode 100644 index 9bd044230..000000000 --- a/qemu/roms/u-boot/board/altera/socfpga/pll_config.h +++ /dev/null @@ -1,118 +0,0 @@ -/* - * Copyright Altera Corporation (C) 2012-2014. All rights reserved - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* This file is generated by Preloader Generator */ - -#ifndef _PRELOADER_PLL_CONFIG_H_ -#define _PRELOADER_PLL_CONFIG_H_ - -/* PLL configuration data */ -/* Main PLL */ -#define CONFIG_HPS_MAINPLLGRP_VCO_DENOM (0) -#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER (63) -#define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT (0) -#define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT (0) -#define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT (0) -#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT (3) -#define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT (3) -#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT (12) -#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK (1) -#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK (1) -#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK (1) -#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK (1) -#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK (0) -#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK (1) -#define CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK (0) -/* - * To tell where is the clock source: - * 0 = MAINPLL - * 1 = PERIPHPLL - */ -#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP (1) -#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP (1) - -/* Peripheral PLL */ -#define CONFIG_HPS_PERPLLGRP_VCO_DENOM (1) -#define CONFIG_HPS_PERPLLGRP_VCO_NUMER (79) -/* - * To tell where is the VCOs source: - * 0 = EOSC1 - * 1 = EOSC2 - * 2 = F2S - */ -#define CONFIG_HPS_PERPLLGRP_VCO_PSRC (0) -#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT (3) -#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT (3) -#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT (1) -#define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT (4) -#define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT (4) -#define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT (9) -#define CONFIG_HPS_PERPLLGRP_DIV_USBCLK (0) -#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK (0) -#define CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK (1) -#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK (1) -#define CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK (6249) -/* - * To tell where is the clock source: - * 0 = F2S_PERIPH_REF_CLK - * 1 = MAIN_CLK - * 2 = PERIPH_CLK - */ -#define CONFIG_HPS_PERPLLGRP_SRC_SDMMC (2) -#define CONFIG_HPS_PERPLLGRP_SRC_NAND (2) -#define CONFIG_HPS_PERPLLGRP_SRC_QSPI (1) - -/* SDRAM PLL */ -#ifdef CONFIG_SOCFPGA_ARRIA5 -/* Arria V SDRAM will run at 533MHz while Cyclone V still at 400MHz - * This if..else... is not required if generated by tools */ -#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM (2) -#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER (127) -#else -#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM (0) -#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER (31) -#endif /* CONFIG_SOCFPGA_ARRIA5 */ - -/* - * To tell where is the VCOs source: - * 0 = EOSC1 - * 1 = EOSC2 - * 2 = F2S - */ -#define CONFIG_HPS_SDRPLLGRP_VCO_SSRC (0) -#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT (1) -#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE (0) -#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT (0) -#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE (0) -#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT (1) -#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE (4) -#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT (5) -#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE (0) - -/* Info for driver */ -#define CONFIG_HPS_CLK_OSC1_HZ (25000000) -#define CONFIG_HPS_CLK_MAINVCO_HZ (1600000000) -#define CONFIG_HPS_CLK_PERVCO_HZ (1000000000) -#ifdef CONFIG_SOCFPGA_ARRIA5 -/* The if..else... is not required if generated by tools */ -#define CONFIG_HPS_CLK_SDRVCO_HZ (1066000000) -#else -#define CONFIG_HPS_CLK_SDRVCO_HZ (800000000) -#endif -#define CONFIG_HPS_CLK_EMAC0_HZ (250000000) -#define CONFIG_HPS_CLK_EMAC1_HZ (250000000) -#define CONFIG_HPS_CLK_USBCLK_HZ (200000000) -#define CONFIG_HPS_CLK_NAND_HZ (50000000) -#define CONFIG_HPS_CLK_SDMMC_HZ (200000000) -#define CONFIG_HPS_CLK_QSPI_HZ (400000000) -#define CONFIG_HPS_CLK_SPIM_HZ (200000000) -#define CONFIG_HPS_CLK_CAN0_HZ (100000000) -#define CONFIG_HPS_CLK_CAN1_HZ (100000000) -#define CONFIG_HPS_CLK_GPIODB_HZ (32000) -#define CONFIG_HPS_CLK_L4_MP_HZ (100000000) -#define CONFIG_HPS_CLK_L4_SP_HZ (100000000) - -#endif /* _PRELOADER_PLL_CONFIG_H_ */ diff --git a/qemu/roms/u-boot/board/altera/socfpga/socfpga_cyclone5.c b/qemu/roms/u-boot/board/altera/socfpga/socfpga_cyclone5.c deleted file mode 100644 index a960eb600..000000000 --- a/qemu/roms/u-boot/board/altera/socfpga/socfpga_cyclone5.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * Copyright (C) 2012 Altera Corporation <www.altera.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/arch/reset_manager.h> -#include <asm/io.h> - -#include <netdev.h> - -DECLARE_GLOBAL_DATA_PTR; - -#if defined(CONFIG_DISPLAY_CPUINFO) -/* - * Print CPU information - */ -int print_cpuinfo(void) -{ - puts("CPU : Altera SOCFPGA Platform\n"); - return 0; -} -#endif - -/* - * Print Board information - */ -int checkboard(void) -{ - puts("BOARD : Altera SOCFPGA Cyclone5 Board\n"); - return 0; -} - -/* - * Initialization function which happen at early stage of c code - */ -int board_early_init_f(void) -{ - return 0; -} - -/* - * Miscellaneous platform dependent initialisations - */ -int board_init(void) -{ - icache_enable(); - return 0; -} - -int misc_init_r(void) -{ - return 0; -} - -#if defined(CONFIG_SYS_CONSOLE_IS_IN_ENV) && defined(CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE) -int overwrite_console(void) -{ - return 0; -} -#endif - -/* - * DesignWare Ethernet initialization - */ -/* We know all the init functions have been run now */ -int board_eth_init(bd_t *bis) -{ - return 0; -} |