diff options
Diffstat (limited to 'qemu/roms/ipxe/src/arch/x86_64')
26 files changed, 696 insertions, 0 deletions
diff --git a/qemu/roms/ipxe/src/arch/x86_64/Makefile b/qemu/roms/ipxe/src/arch/x86_64/Makefile new file mode 100644 index 000000000..b687f3407 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/Makefile @@ -0,0 +1,53 @@ +# Code size reduction. +# +CFLAGS += -fstrength-reduce -fomit-frame-pointer + +# Code size reduction. gcc3 needs a different syntax to gcc2 if you +# want to avoid spurious warnings. +# +CFLAGS += -falign-jumps=1 -falign-loops=1 -falign-functions=1 + +# Use %rip-relative addressing wherever possible. +# +CFLAGS += -fpie + +# Force 64-bit code +# +CFLAGS += -m64 +ASFLAGS += --64 +LDFLAGS += -m elf_x86_64 + +# EFI requires -fshort-wchar, and nothing else currently uses wchar_t +# +CFLAGS += -fshort-wchar + +# We need to undefine the default macro "i386" when compiling .S +# files, otherwise ".arch i386" translates to ".arch 1"... +# +CFLAGS += -Ui386 + +# Add -maccumulate-outgoing-args if required by this version of gcc +# +ifeq ($(CCTYPE),gcc) +MS_ABI_TEST_CODE := extern void __attribute__ (( ms_abi )) ms_abi(); \ + void sysv_abi ( void ) { ms_abi(); } +MS_ABI_TEST = $(ECHO) '$(MS_ABI_TEST_CODE)' | \ + $(CC) -m64 -mno-accumulate-outgoing-args -x c -c - -o /dev/null \ + >/dev/null 2>&1 +MS_ABI_FLAGS := $(shell $(MS_ABI_TEST) || $(ECHO) '-maccumulate-outgoing-args') +WORKAROUND_CFLAGS += $(MS_ABI_FLAGS) +endif + +# x86_64-specific directories containing source files +# +SRCDIRS += arch/x86_64/prefix + +# Include common x86 Makefile +# +MAKEDEPS += arch/x86/Makefile +include arch/x86/Makefile + +# Include platform-specific Makefile +# +MAKEDEPS += arch/x86_64/Makefile.$(PLATFORM) +include arch/x86_64/Makefile.$(PLATFORM) diff --git a/qemu/roms/ipxe/src/arch/x86_64/Makefile.efi b/qemu/roms/ipxe/src/arch/x86_64/Makefile.efi new file mode 100644 index 000000000..26b712780 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/Makefile.efi @@ -0,0 +1,14 @@ +# -*- makefile -*- : Force emacs to use Makefile mode + +# EFI probably doesn't guarantee us a red zone, so let's not rely on it. +# +CFLAGS += -mno-red-zone + +# Specify EFI image builder +# +ELF2EFI = $(ELF2EFI64) + +# Include generic EFI Makefile +# +MAKEDEPS += arch/x86/Makefile.efi +include arch/x86/Makefile.efi diff --git a/qemu/roms/ipxe/src/arch/x86_64/Makefile.linux b/qemu/roms/ipxe/src/arch/x86_64/Makefile.linux new file mode 100644 index 000000000..154f9d40d --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/Makefile.linux @@ -0,0 +1,6 @@ +LDSCRIPT = arch/x86_64/scripts/linux.lds + +SRCDIRS += arch/x86_64/core/linux + +MAKEDEPS += arch/x86/Makefile.linux +include arch/x86/Makefile.linux diff --git a/qemu/roms/ipxe/src/arch/x86_64/core/linux/linux_syscall.S b/qemu/roms/ipxe/src/arch/x86_64/core/linux/linux_syscall.S new file mode 100644 index 000000000..d2805f94c --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/core/linux/linux_syscall.S @@ -0,0 +1,33 @@ + + .section ".data" + .globl linux_errno + +linux_errno: .int 0 + + .section ".text" + .code64 + .globl linux_syscall + .type linux_syscall, @function + +linux_syscall: + movq %rdi, %rax // C arg1 -> syscall number + movq %rsi, %rdi // C arg2 -> syscall arg1 + movq %rdx, %rsi // C arg3 -> syscall arg2 + movq %rcx, %rdx // C arg4 -> syscall arg3 + movq %r8, %r10 // C arg5 -> syscall arg4 + movq %r9, %r8 // C arg6 -> syscall arg5 + movq 8(%rsp), %r9 // C arg7 -> syscall arg6 + + syscall + + cmpq $-4095, %rax + jae 1f + ret + +1: + negq %rax + movl %eax, linux_errno + movq $-1, %rax + ret + + .size linux_syscall, . - linux_syscall diff --git a/qemu/roms/ipxe/src/arch/x86_64/core/linux/linuxprefix.S b/qemu/roms/ipxe/src/arch/x86_64/core/linux/linuxprefix.S new file mode 100644 index 000000000..ec8a9decd --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/core/linux/linuxprefix.S @@ -0,0 +1,25 @@ +#include <linux/unistd.h> + + .section ".text" + .code64 + .globl _linux_start + .type _linux_start, @function + +_linux_start: + xorq %rbp, %rbp + + popq %rdi // argc -> C arg1 + movq %rsp, %rsi // argv -> C arg2 + + andq $~15, %rsp // 16-byte align the stack + + call save_args + + /* Our main doesn't use any arguments */ + call main + + movq %rax, %rdi // rc -> syscall arg1 + movq $__NR_exit, %rax + syscall + + .size _linux_start, . - _linux_start diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/byteswap.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/byteswap.h new file mode 100644 index 000000000..2e472d98a --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/byteswap.h @@ -0,0 +1,47 @@ +#ifndef _BITS_BYTESWAP_H +#define _BITS_BYTESWAP_H + +/** @file + * + * Byte-order swapping functions + * + */ + +#include <stdint.h> + +FILE_LICENCE ( GPL2_OR_LATER ); + +static inline __attribute__ (( always_inline, const )) uint16_t +__bswap_variable_16 ( uint16_t x ) { + __asm__ ( "xchgb %b0,%h0" : "=Q" ( x ) : "0" ( x ) ); + return x; +} + +static inline __attribute__ (( always_inline )) void +__bswap_16s ( uint16_t *x ) { + __asm__ ( "rorw $8, %0" : "+m" ( *x ) ); +} + +static inline __attribute__ (( always_inline, const )) uint32_t +__bswap_variable_32 ( uint32_t x ) { + __asm__ ( "bswapl %k0" : "=r" ( x ) : "0" ( x ) ); + return x; +} + +static inline __attribute__ (( always_inline )) void +__bswap_32s ( uint32_t *x ) { + __asm__ ( "bswapl %k0" : "=r" ( *x ) : "0" ( *x ) ); +} + +static inline __attribute__ (( always_inline, const )) uint64_t +__bswap_variable_64 ( uint64_t x ) { + __asm__ ( "bswapq %q0" : "=r" ( x ) : "0" ( x ) ); + return x; +} + +static inline __attribute__ (( always_inline )) void +__bswap_64s ( uint64_t *x ) { + __asm__ ( "bswapq %q0" : "=r" ( *x ) : "0" ( *x ) ); +} + +#endif /* _BITS_BYTESWAP_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/compiler.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/compiler.h new file mode 100644 index 000000000..51a7eaae2 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/compiler.h @@ -0,0 +1,14 @@ +#ifndef _BITS_COMPILER_H +#define _BITS_COMPILER_H + +#ifndef ASSEMBLY + +/** Declare a function with standard calling conventions */ +#define __asmcall __attribute__ (( regparm(0) )) + +/** Declare a function with libgcc implicit linkage */ +#define __libgcc + +#endif /* ASSEMBLY */ + +#endif /* _BITS_COMPILER_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/endian.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/endian.h new file mode 100644 index 000000000..413e702db --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/endian.h @@ -0,0 +1,6 @@ +#ifndef ETHERBOOT_BITS_ENDIAN_H +#define ETHERBOOT_BITS_ENDIAN_H + +#define __BYTE_ORDER __LITTLE_ENDIAN + +#endif /* ETHERBOOT_BITS_ENDIAN_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/entropy.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/entropy.h new file mode 100644 index 000000000..9c64c833b --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/entropy.h @@ -0,0 +1,12 @@ +#ifndef _BITS_ENTROPY_H +#define _BITS_ENTROPY_H + +/** @file + * + * x86_64-specific entropy API implementations + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#endif /* _BITS_ENTROPY_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/linux_api.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/linux_api.h new file mode 100644 index 000000000..589fb5808 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/linux_api.h @@ -0,0 +1,6 @@ +#ifndef _X86_64_LINUX_API_H +#define _X86_64_LINUX_API_H + +#define __SYSCALL_mmap __NR_mmap + +#endif /* _X86_64_LINUX_API_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/nap.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/nap.h new file mode 100644 index 000000000..8b42c0a4a --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/nap.h @@ -0,0 +1,12 @@ +#ifndef _BITS_NAP_H +#define _BITS_NAP_H + +/** @file + * + * x86_64-specific CPU sleeping API implementations + * + */ + +#include <ipxe/efi/efix86_nap.h> + +#endif /* _BITS_MAP_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/profile.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/profile.h new file mode 100644 index 000000000..6fc16d84b --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/profile.h @@ -0,0 +1,29 @@ +#ifndef _BITS_PROFILE_H +#define _BITS_PROFILE_H + +/** @file + * + * Profiling + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <stdint.h> + +/** + * Get profiling timestamp + * + * @ret timestamp Timestamp + */ +static inline __attribute__ (( always_inline )) uint64_t +profile_timestamp ( void ) { + uint32_t eax; + uint32_t edx; + + /* Read timestamp counter */ + __asm__ __volatile__ ( "rdtsc" : "=a" ( eax ), "=d" ( edx ) ); + return ( ( ( ( uint64_t ) edx ) << 32 ) | eax ); +} + +#endif /* _BITS_PROFILE_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/reboot.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/reboot.h new file mode 100644 index 000000000..f1bce0540 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/reboot.h @@ -0,0 +1,12 @@ +#ifndef _BITS_REBOOT_H +#define _BITS_REBOOT_H + +/** @file + * + * x86_64-specific reboot API implementations + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#endif /* _BITS_REBOOT_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/sanboot.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/sanboot.h new file mode 100644 index 000000000..d33d03cbe --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/sanboot.h @@ -0,0 +1,12 @@ +#ifndef _BITS_SANBOOT_H +#define _BITS_SANBOOT_H + +/** @file + * + * x86_64-specific sanboot API implementations + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#endif /* _BITS_SANBOOT_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/smbios.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/smbios.h new file mode 100644 index 000000000..2f0118d02 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/smbios.h @@ -0,0 +1,10 @@ +#ifndef _BITS_SMBIOS_H +#define _BITS_SMBIOS_H + +/** @file + * + * i386-specific SMBIOS API implementations + * + */ + +#endif /* _BITS_SMBIOS_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/stdint.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/stdint.h new file mode 100644 index 000000000..9eb72e9c4 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/stdint.h @@ -0,0 +1,21 @@ +#ifndef _BITS_STDINT_H +#define _BITS_STDINT_H + +typedef __SIZE_TYPE__ size_t; +typedef signed long ssize_t; +typedef signed long off_t; + +typedef unsigned char uint8_t; +typedef unsigned short uint16_t; +typedef unsigned int uint32_t; +typedef unsigned long long uint64_t; + +typedef signed char int8_t; +typedef signed short int16_t; +typedef signed int int32_t; +typedef signed long long int64_t; + +typedef unsigned long physaddr_t; +typedef unsigned long intptr_t; + +#endif /* _BITS_STDINT_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/strings.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/strings.h new file mode 100644 index 000000000..6ee99a500 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/strings.h @@ -0,0 +1,42 @@ +#ifndef _BITS_STRINGS_H +#define _BITS_STRINGS_H + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** + * Find last (i.e. most significant) set bit + * + * @v value Value + * @ret msb Most significant bit set in value (LSB=1), or zero + */ +static inline __attribute__ (( always_inline )) int __flsll ( long long value ){ + long long msb_minus_one; + + /* If the input value is zero, the BSR instruction returns + * ZF=1 and leaves an undefined value in the output register. + * Perform this check in C rather than asm so that it can be + * omitted in cases where the compiler is able to prove that + * the input is non-zero. + */ + if ( value ) { + __asm__ ( "bsrq %1, %0" + : "=r" ( msb_minus_one ) + : "rm" ( value ) ); + return ( msb_minus_one + 1 ); + } else { + return 0; + } +} + +/** + * Find last (i.e. most significant) set bit + * + * @v value Value + * @ret msb Most significant bit set in value (LSB=1), or zero + */ +static inline __attribute__ (( always_inline )) int __flsl ( long value ) { + + return __flsll ( value ); +} + +#endif /* _BITS_STRINGS_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/time.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/time.h new file mode 100644 index 000000000..59b355359 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/time.h @@ -0,0 +1,12 @@ +#ifndef _BITS_TIME_H +#define _BITS_TIME_H + +/** @file + * + * x86_64-specific time API implementations + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#endif /* _BITS_TIME_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/timer.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/timer.h new file mode 100644 index 000000000..dfa6c270c --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/timer.h @@ -0,0 +1,10 @@ +#ifndef _BITS_TIMER_H +#define _BITS_TIMER_H + +/** @file + * + * x86_64-specific timer API implementations + * + */ + +#endif /* _BITS_TIMER_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/uaccess.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/uaccess.h new file mode 100644 index 000000000..455829242 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/uaccess.h @@ -0,0 +1,10 @@ +#ifndef _BITS_UACCESS_H +#define _BITS_UACCESS_H + +/** @file + * + * x86_64-specific user access API implementations + * + */ + +#endif /* _BITS_UACCESS_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/bits/umalloc.h b/qemu/roms/ipxe/src/arch/x86_64/include/bits/umalloc.h new file mode 100644 index 000000000..12bf949d1 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/bits/umalloc.h @@ -0,0 +1,10 @@ +#ifndef _BITS_UMALLOC_H +#define _BITS_UMALLOC_H + +/** @file + * + * x86_64-specific user memory allocation API implementations + * + */ + +#endif /* _BITS_UMALLOC_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/efi/ipxe/dhcp_arch.h b/qemu/roms/ipxe/src/arch/x86_64/include/efi/ipxe/dhcp_arch.h new file mode 100644 index 000000000..9a4790fdc --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/efi/ipxe/dhcp_arch.h @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2010 VMware, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#ifndef _DHCP_ARCH_H +#define _DHCP_ARCH_H + +/** @file + * + * Architecture-specific DHCP options + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +#include <ipxe/dhcp.h> + +#define DHCP_ARCH_VENDOR_CLASS_ID \ + DHCP_STRING ( 'P', 'X', 'E', 'C', 'l', 'i', 'e', 'n', 't', ':', \ + 'A', 'r', 'c', 'h', ':', '0', '0', '0', '0', '9', ':', \ + 'U', 'N', 'D', 'I', ':', '0', '0', '3', '0', '1', '0' ) + +#define DHCP_ARCH_CLIENT_ARCHITECTURE \ + DHCP_WORD ( DHCP_CLIENT_ARCHITECTURE_X86_64 ) + +#define DHCP_ARCH_CLIENT_NDI DHCP_OPTION ( 1 /* UNDI */ , 3, 10 /* v3.10 */ ) + +#endif diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/gdbmach.h b/qemu/roms/ipxe/src/arch/x86_64/include/gdbmach.h new file mode 100644 index 000000000..6dadbbdd3 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/gdbmach.h @@ -0,0 +1,53 @@ +#ifndef GDBMACH_H +#define GDBMACH_H + +/** @file + * + * GDB architecture specifics + * + * This file declares functions for manipulating the machine state and + * debugging context. + * + */ + +#include <stdint.h> + +typedef unsigned long gdbreg_t; + +/* The register snapshot, this must be in sync with interrupt handler and the + * GDB protocol. */ +enum { + // STUB: don't expect this to work! + GDBMACH_EIP, + GDBMACH_EFLAGS, + GDBMACH_NREGS, + GDBMACH_SIZEOF_REGS = GDBMACH_NREGS * sizeof ( gdbreg_t ) +}; + +/* Breakpoint types */ +enum { + GDBMACH_BPMEM, + GDBMACH_BPHW, + GDBMACH_WATCH, + GDBMACH_RWATCH, + GDBMACH_AWATCH, +}; + +static inline void gdbmach_set_pc ( gdbreg_t *regs, gdbreg_t pc ) { + regs [ GDBMACH_EIP ] = pc; +} + +static inline void gdbmach_set_single_step ( gdbreg_t *regs, int step ) { + regs [ GDBMACH_EFLAGS ] &= ~( 1 << 8 ); /* Trace Flag (TF) */ + regs [ GDBMACH_EFLAGS ] |= ( step << 8 ); +} + +static inline void gdbmach_breakpoint ( void ) { + __asm__ __volatile__ ( "int $3\n" ); +} + +extern int gdbmach_set_breakpoint ( int type, unsigned long addr, size_t len, int enable ); + +extern void gdbmach_init ( void ); + +#endif /* GDBMACH_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/ipxe/msr.h b/qemu/roms/ipxe/src/arch/x86_64/include/ipxe/msr.h new file mode 100644 index 000000000..a5816ac35 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/ipxe/msr.h @@ -0,0 +1,43 @@ +#ifndef _IPXE_MSR_H +#define _IPXE_MSR_H + +/** @file + * + * Model-specific registers + * + */ + +FILE_LICENCE ( GPL2_OR_LATER ); + +/** + * Read model-specific register + * + * @v msr Model-specific register + * @ret value Value + */ +static inline __attribute__ (( always_inline )) uint64_t +rdmsr ( unsigned int msr ) { + uint32_t high; + uint32_t low; + + __asm__ __volatile__ ( "rdmsr" : + "=d" ( high ), "=a" ( low ) : "c" ( msr ) ); + return ( ( ( ( uint64_t ) high ) << 32 ) | low ); +} + +/** + * Write model-specific register + * + * @v msr Model-specific register + * @v value Value + */ +static inline __attribute__ (( always_inline )) void +wrmsr ( unsigned int msr, uint64_t value ) { + uint32_t high = ( value >> 32 ); + uint32_t low = ( value >> 0 ); + + __asm__ __volatile__ ( "wrmsr" : : + "c" ( msr ), "d" ( high ), "a" ( low ) ); +} + +#endif /* _IPXE_MSR_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/include/limits.h b/qemu/roms/ipxe/src/arch/x86_64/include/limits.h new file mode 100644 index 000000000..8cf87b471 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/include/limits.h @@ -0,0 +1,59 @@ +#ifndef LIMITS_H +#define LIMITS_H 1 + +/* Number of bits in a `char' */ +#define CHAR_BIT 8 + +/* Minimum and maximum values a `signed char' can hold */ +#define SCHAR_MIN (-128) +#define SCHAR_MAX 127 + +/* Maximum value an `unsigned char' can hold. (Minimum is 0.) */ +#define UCHAR_MAX 255 + +/* Minimum and maximum values a `char' can hold */ +#define CHAR_MIN SCHAR_MIN +#define CHAR_MAX SCHAR_MAX + +/* Minimum and maximum values a `signed short int' can hold */ +#define SHRT_MIN (-32768) +#define SHRT_MAX 32767 + +/* Maximum value an `unsigned short' can hold. (Minimum is 0.) */ +#define USHRT_MAX 65535 + + +/* Minimum and maximum values a `signed int' can hold */ +#define INT_MIN (-INT_MAX - 1) +#define INT_MAX 2147483647 + +/* Maximum value an `unsigned int' can hold. (Minimum is 0.) */ +#define UINT_MAX 4294967295U + + +/* Minimum and maximum values a `signed int' can hold */ +#define INT_MAX 2147483647 +#define INT_MIN (-INT_MAX - 1) + + +/* Maximum value an `unsigned int' can hold. (Minimum is 0.) */ +#define UINT_MAX 4294967295U + + +/* Minimum and maximum values a `signed long' can hold */ +#define LONG_MAX 9223372036854775807L +#define LONG_MIN (-LONG_MAX - 1L) + +/* Maximum value an `unsigned long' can hold. (Minimum is 0.) */ +#define ULONG_MAX 18446744073709551615UL + +/* Minimum and maximum values a `signed long long' can hold */ +#define LLONG_MAX 9223372036854775807LL +#define LLONG_MIN (-LONG_MAX - 1LL) + + +/* Maximum value an `unsigned long long' can hold. (Minimum is 0.) */ +#define ULLONG_MAX 18446744073709551615ULL + + +#endif /* LIMITS_H */ diff --git a/qemu/roms/ipxe/src/arch/x86_64/scripts/linux.lds b/qemu/roms/ipxe/src/arch/x86_64/scripts/linux.lds new file mode 100644 index 000000000..47db21745 --- /dev/null +++ b/qemu/roms/ipxe/src/arch/x86_64/scripts/linux.lds @@ -0,0 +1,104 @@ +/* -*- sh -*- */ + +/* + * Linker script for x86_64 Linux images + * + */ + +OUTPUT_FORMAT ( "elf64-x86-64", "elf64-x86-64", "elf64-x86-64" ) +OUTPUT_ARCH ( i386:x86-64 ) + +SECTIONS { + _max_align = 32; + + . = 0x400000; + + /* + * The text section + * + */ + + . = ALIGN ( _max_align ); + .text : { + _text = .; + *(.text) + *(.text.*) + _etext = .; + } + + /* + * The rodata section + * + */ + + . = ALIGN ( _max_align ); + .rodata : { + _rodata = .; + *(.rodata) + *(.rodata.*) + _erodata = .; + } + + /* + * The data section + * + * Adjust the address for the data segment. We want to adjust up to + * the same address within the page on the next page up. + */ + + . = ALIGN (CONSTANT (MAXPAGESIZE)) - ((CONSTANT (MAXPAGESIZE) - .) & (CONSTANT (MAXPAGESIZE) - 1)); + . = DATA_SEGMENT_ALIGN (CONSTANT (MAXPAGESIZE), CONSTANT (COMMONPAGESIZE)); + .data : { + _data = .; + *(.data) + *(.data.*) + KEEP(*(SORT(.tbl.*))) + KEEP(*(.provided)) + KEEP(*(.provided.*)) + _edata = .; + } + + /* + * The bss section + * + */ + + . = ALIGN ( _max_align ); + .bss : { + _bss = .; + *(.bss) + *(.bss.*) + *(COMMON) + _ebss = .; + } + + /* + * Weak symbols that need zero values if not otherwise defined + * + */ + + .weak 0x0 : { + _weak = .; + *(.weak) + *(.weak.*) + _eweak = .; + } + _assert = ASSERT ( ( _weak == _eweak ), ".weak is non-zero length" ); + + /* + * Dispose of the comment and note sections to make the link map + * easier to read + * + */ + + /DISCARD/ : { + *(.comment) + *(.comment.*) + *(.note) + *(.note.*) + *(.rel) + *(.rel.*) + *(.discard) + *(.discard.*) + } +} |