diff options
Diffstat (limited to 'qemu/include/hw/timer')
| -rw-r--r-- | qemu/include/hw/timer/a9gtimer.h | 97 | ||||
| -rw-r--r-- | qemu/include/hw/timer/allwinner-a10-pit.h | 67 | ||||
| -rw-r--r-- | qemu/include/hw/timer/arm_mptimer.h | 54 | ||||
| -rw-r--r-- | qemu/include/hw/timer/aspeed_timer.h | 59 | ||||
| -rw-r--r-- | qemu/include/hw/timer/digic-timer.h | 45 | ||||
| -rw-r--r-- | qemu/include/hw/timer/hpet.h | 85 | ||||
| -rw-r--r-- | qemu/include/hw/timer/i8254.h | 75 | ||||
| -rw-r--r-- | qemu/include/hw/timer/i8254_internal.h | 84 | ||||
| -rw-r--r-- | qemu/include/hw/timer/imx_epit.h | 80 | ||||
| -rw-r--r-- | qemu/include/hw/timer/imx_gpt.h | 108 | ||||
| -rw-r--r-- | qemu/include/hw/timer/m48t59.h | 34 | ||||
| -rw-r--r-- | qemu/include/hw/timer/mc146818rtc.h | 13 | ||||
| -rw-r--r-- | qemu/include/hw/timer/mc146818rtc_regs.h | 67 | ||||
| -rw-r--r-- | qemu/include/hw/timer/stm32f2xx_timer.h | 101 |
14 files changed, 0 insertions, 969 deletions
diff --git a/qemu/include/hw/timer/a9gtimer.h b/qemu/include/hw/timer/a9gtimer.h deleted file mode 100644 index 98d8e0ae5..000000000 --- a/qemu/include/hw/timer/a9gtimer.h +++ /dev/null @@ -1,97 +0,0 @@ -/* - * Global peripheral timer block for ARM A9MP - * - * (C) 2013 Xilinx Inc. - * - * Written by François LEGAL - * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef HW_TIMER_A9_GTIMER_H_H -#define HW_TIMER_A9_GTIMER_H_H - -#include "hw/sysbus.h" - -#define A9_GTIMER_MAX_CPUS 4 - -#define TYPE_A9_GTIMER "arm.cortex-a9-global-timer" -#define A9_GTIMER(obj) OBJECT_CHECK(A9GTimerState, (obj), TYPE_A9_GTIMER) - -#define R_COUNTER_LO 0x00 -#define R_COUNTER_HI 0x04 - -#define R_CONTROL 0x08 -#define R_CONTROL_TIMER_ENABLE (1 << 0) -#define R_CONTROL_COMP_ENABLE (1 << 1) -#define R_CONTROL_IRQ_ENABLE (1 << 2) -#define R_CONTROL_AUTO_INCREMENT (1 << 3) -#define R_CONTROL_PRESCALER_SHIFT 8 -#define R_CONTROL_PRESCALER_LEN 8 -#define R_CONTROL_PRESCALER_MASK (((1 << R_CONTROL_PRESCALER_LEN) - 1) << \ - R_CONTROL_PRESCALER_SHIFT) - -#define R_CONTROL_BANKED (R_CONTROL_COMP_ENABLE | \ - R_CONTROL_IRQ_ENABLE | \ - R_CONTROL_AUTO_INCREMENT) -#define R_CONTROL_NEEDS_SYNC (R_CONTROL_TIMER_ENABLE | \ - R_CONTROL_PRESCALER_MASK) - -#define R_INTERRUPT_STATUS 0x0C -#define R_COMPARATOR_LO 0x10 -#define R_COMPARATOR_HI 0x14 -#define R_AUTO_INCREMENT 0x18 - -typedef struct A9GTimerPerCPU A9GTimerPerCPU; -typedef struct A9GTimerState A9GTimerState; - -struct A9GTimerPerCPU { - A9GTimerState *parent; - - uint32_t control; /* only per cpu banked bits valid */ - uint64_t compare; - uint32_t status; - uint32_t inc; - - MemoryRegion iomem; - qemu_irq irq; /* PPI interrupts */ -}; - -struct A9GTimerState { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - MemoryRegion iomem; - /* static props */ - uint32_t num_cpu; - - QEMUTimer *timer; - - uint64_t counter; /* current timer value */ - - uint64_t ref_counter; - uint64_t cpu_ref_time; /* the cpu time as of last update of ref_counter */ - uint32_t control; /* only non per cpu banked bits valid */ - - A9GTimerPerCPU per_cpu[A9_GTIMER_MAX_CPUS]; -}; - -typedef struct A9GTimerUpdate { - uint64_t now; - uint64_t new; -} A9GTimerUpdate; - -#endif /* #ifdef HW_TIMER_A9_GTIMER_H_H */ diff --git a/qemu/include/hw/timer/allwinner-a10-pit.h b/qemu/include/hw/timer/allwinner-a10-pit.h deleted file mode 100644 index 770bdc03c..000000000 --- a/qemu/include/hw/timer/allwinner-a10-pit.h +++ /dev/null @@ -1,67 +0,0 @@ -#ifndef AW_A10_PIT_H -#define AW_A10_PIT_H - -#include "hw/ptimer.h" - -#define TYPE_AW_A10_PIT "allwinner-A10-timer" -#define AW_A10_PIT(obj) OBJECT_CHECK(AwA10PITState, (obj), TYPE_AW_A10_PIT) - -#define AW_A10_PIT_TIMER_NR 6 -#define AW_A10_PIT_TIMER_IRQ 0x1 -#define AW_A10_PIT_WDOG_IRQ 0x100 - -#define AW_A10_PIT_TIMER_IRQ_EN 0 -#define AW_A10_PIT_TIMER_IRQ_ST 0x4 - -#define AW_A10_PIT_TIMER_CONTROL 0x0 -#define AW_A10_PIT_TIMER_EN 0x1 -#define AW_A10_PIT_TIMER_RELOAD 0x2 -#define AW_A10_PIT_TIMER_MODE 0x80 - -#define AW_A10_PIT_TIMER_INTERVAL 0x4 -#define AW_A10_PIT_TIMER_COUNT 0x8 -#define AW_A10_PIT_WDOG_CONTROL 0x90 -#define AW_A10_PIT_WDOG_MODE 0x94 - -#define AW_A10_PIT_COUNT_CTL 0xa0 -#define AW_A10_PIT_COUNT_RL_EN 0x2 -#define AW_A10_PIT_COUNT_CLR_EN 0x1 -#define AW_A10_PIT_COUNT_LO 0xa4 -#define AW_A10_PIT_COUNT_HI 0xa8 - -#define AW_A10_PIT_TIMER_BASE 0x10 -#define AW_A10_PIT_TIMER_BASE_END \ - (AW_A10_PIT_TIMER_BASE * 6 + AW_A10_PIT_TIMER_COUNT) - -#define AW_A10_PIT_DEFAULT_CLOCK 0x4 - -typedef struct AwA10PITState AwA10PITState; - -typedef struct AwA10TimerContext { - AwA10PITState *container; - int index; -} AwA10TimerContext; - -struct AwA10PITState { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - qemu_irq irq[AW_A10_PIT_TIMER_NR]; - ptimer_state * timer[AW_A10_PIT_TIMER_NR]; - AwA10TimerContext timer_context[AW_A10_PIT_TIMER_NR]; - MemoryRegion iomem; - uint32_t clk_freq[4]; - - uint32_t irq_enable; - uint32_t irq_status; - uint32_t control[AW_A10_PIT_TIMER_NR]; - uint32_t interval[AW_A10_PIT_TIMER_NR]; - uint32_t count[AW_A10_PIT_TIMER_NR]; - uint32_t watch_dog_mode; - uint32_t watch_dog_control; - uint32_t count_lo; - uint32_t count_hi; - uint32_t count_ctl; -}; - -#endif diff --git a/qemu/include/hw/timer/arm_mptimer.h b/qemu/include/hw/timer/arm_mptimer.h deleted file mode 100644 index b34cba00c..000000000 --- a/qemu/include/hw/timer/arm_mptimer.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Private peripheral timer/watchdog blocks for ARM 11MPCore and A9MP - * - * Copyright (c) 2006-2007 CodeSourcery. - * Copyright (c) 2011 Linaro Limited - * Written by Paul Brook, Peter Maydell - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - */ -#ifndef HW_TIMER_ARM_MPTIMER_H -#define HW_TIMER_ARM_MPTIMER_H - -#include "hw/sysbus.h" - -#define ARM_MPTIMER_MAX_CPUS 4 - -/* State of a single timer or watchdog block */ -typedef struct { - uint32_t count; - uint32_t load; - uint32_t control; - uint32_t status; - int64_t tick; - QEMUTimer *timer; - qemu_irq irq; - MemoryRegion iomem; -} TimerBlock; - -#define TYPE_ARM_MPTIMER "arm_mptimer" -#define ARM_MPTIMER(obj) \ - OBJECT_CHECK(ARMMPTimerState, (obj), TYPE_ARM_MPTIMER) - -typedef struct { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - uint32_t num_cpu; - TimerBlock timerblock[ARM_MPTIMER_MAX_CPUS]; - MemoryRegion iomem; -} ARMMPTimerState; - -#endif diff --git a/qemu/include/hw/timer/aspeed_timer.h b/qemu/include/hw/timer/aspeed_timer.h deleted file mode 100644 index 44dc2f89d..000000000 --- a/qemu/include/hw/timer/aspeed_timer.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * ASPEED AST2400 Timer - * - * Andrew Jeffery <andrew@aj.id.au> - * - * Copyright (C) 2016 IBM Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ -#ifndef ASPEED_TIMER_H -#define ASPEED_TIMER_H - -#include "hw/ptimer.h" - -#define ASPEED_TIMER(obj) \ - OBJECT_CHECK(AspeedTimerCtrlState, (obj), TYPE_ASPEED_TIMER); -#define TYPE_ASPEED_TIMER "aspeed.timer" -#define ASPEED_TIMER_NR_TIMERS 8 - -typedef struct AspeedTimer { - qemu_irq irq; - - uint8_t id; - - /** - * Track the line level as the ASPEED timers implement edge triggered - * interrupts, signalling with both the rising and falling edge. - */ - int32_t level; - ptimer_state *timer; - uint32_t reload; - uint32_t match[2]; -} AspeedTimer; - -typedef struct AspeedTimerCtrlState { - /*< private >*/ - SysBusDevice parent; - - /*< public >*/ - MemoryRegion iomem; - - uint32_t ctrl; - uint32_t ctrl2; - AspeedTimer timers[ASPEED_TIMER_NR_TIMERS]; -} AspeedTimerCtrlState; - -#endif /* ASPEED_TIMER_H */ diff --git a/qemu/include/hw/timer/digic-timer.h b/qemu/include/hw/timer/digic-timer.h deleted file mode 100644 index d9e67fe29..000000000 --- a/qemu/include/hw/timer/digic-timer.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Canon DIGIC timer block declarations. - * - * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef HW_TIMER_DIGIC_TIMER_H -#define HW_TIMER_DIGIC_TIMER_H - -#include "hw/sysbus.h" -#include "hw/ptimer.h" - -#define TYPE_DIGIC_TIMER "digic-timer" -#define DIGIC_TIMER(obj) OBJECT_CHECK(DigicTimerState, (obj), TYPE_DIGIC_TIMER) - -#define DIGIC_TIMER_CONTROL 0x00 -#define DIGIC_TIMER_CONTROL_RST 0x80000000 -#define DIGIC_TIMER_CONTROL_EN 0x00000001 -#define DIGIC_TIMER_RELVALUE 0x08 -#define DIGIC_TIMER_VALUE 0x0c - -typedef struct DigicTimerState { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - MemoryRegion iomem; - ptimer_state *ptimer; - - uint32_t control; - uint32_t relvalue; -} DigicTimerState; - -#endif /* HW_TIMER_DIGIC_TIMER_H */ diff --git a/qemu/include/hw/timer/hpet.h b/qemu/include/hw/timer/hpet.h deleted file mode 100644 index f38bcfecd..000000000 --- a/qemu/include/hw/timer/hpet.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * QEMU Emulated HPET support - * - * Copyright IBM, Corp. 2008 - * - * Authors: - * Beth Kon <bkon@us.ibm.com> - * - * This work is licensed under the terms of the GNU GPL, version 2. See - * the COPYING file in the top-level directory. - * - */ -#ifndef QEMU_HPET_EMUL_H -#define QEMU_HPET_EMUL_H - -#include "qom/object.h" - -#define HPET_BASE 0xfed00000 -#define HPET_LEN 0x400 -#define HPET_CLK_PERIOD 10 /* 10 ns*/ - -#define FS_PER_NS 1000000 /* 1000000 femtoseconds == 1 ns */ -#define HPET_MIN_TIMERS 3 -#define HPET_MAX_TIMERS 32 - -#define HPET_NUM_IRQ_ROUTES 32 - -#define HPET_LEGACY_PIT_INT 0 -#define HPET_LEGACY_RTC_INT 1 - -#define HPET_CFG_ENABLE 0x001 -#define HPET_CFG_LEGACY 0x002 - -#define HPET_ID 0x000 -#define HPET_PERIOD 0x004 -#define HPET_CFG 0x010 -#define HPET_STATUS 0x020 -#define HPET_COUNTER 0x0f0 -#define HPET_TN_CFG 0x000 -#define HPET_TN_CMP 0x008 -#define HPET_TN_ROUTE 0x010 -#define HPET_CFG_WRITE_MASK 0x3 - -#define HPET_ID_NUM_TIM_SHIFT 8 -#define HPET_ID_NUM_TIM_MASK 0x1f00 - -#define HPET_TN_TYPE_LEVEL 0x002 -#define HPET_TN_ENABLE 0x004 -#define HPET_TN_PERIODIC 0x008 -#define HPET_TN_PERIODIC_CAP 0x010 -#define HPET_TN_SIZE_CAP 0x020 -#define HPET_TN_SETVAL 0x040 -#define HPET_TN_32BIT 0x100 -#define HPET_TN_INT_ROUTE_MASK 0x3e00 -#define HPET_TN_FSB_ENABLE 0x4000 -#define HPET_TN_FSB_CAP 0x8000 -#define HPET_TN_CFG_WRITE_MASK 0x7f4e -#define HPET_TN_INT_ROUTE_SHIFT 9 -#define HPET_TN_INT_ROUTE_CAP_SHIFT 32 -#define HPET_TN_CFG_BITS_READONLY_OR_RESERVED 0xffff80b1U - -struct hpet_fw_entry -{ - uint32_t event_timer_block_id; - uint64_t address; - uint16_t min_tick; - uint8_t page_prot; -} QEMU_PACKED; - -struct hpet_fw_config -{ - uint8_t count; - struct hpet_fw_entry hpet[8]; -} QEMU_PACKED; - -extern struct hpet_fw_config hpet_cfg; - -#define TYPE_HPET "hpet" - -static inline bool hpet_find(void) -{ - return object_resolve_path_type("", TYPE_HPET, NULL); -} - -#endif diff --git a/qemu/include/hw/timer/i8254.h b/qemu/include/hw/timer/i8254.h deleted file mode 100644 index 434903348..000000000 --- a/qemu/include/hw/timer/i8254.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * QEMU 8253/8254 interval timer emulation - * - * Copyright (c) 2003-2004 Fabrice Bellard - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HW_I8254_H -#define HW_I8254_H - -#include "hw/hw.h" -#include "hw/isa/isa.h" - -#define PIT_FREQ 1193182 - -typedef struct PITChannelInfo { - int gate; - int mode; - int initial_count; - int out; -} PITChannelInfo; - -#define TYPE_I8254 "isa-pit" -#define TYPE_KVM_I8254 "kvm-pit" - -static inline ISADevice *pit_init(ISABus *bus, int base, int isa_irq, - qemu_irq alt_irq) -{ - DeviceState *dev; - ISADevice *d; - - d = isa_create(bus, TYPE_I8254); - dev = DEVICE(d); - qdev_prop_set_uint32(dev, "iobase", base); - qdev_init_nofail(dev); - qdev_connect_gpio_out(dev, 0, - isa_irq >= 0 ? isa_get_irq(d, isa_irq) : alt_irq); - - return d; -} - -static inline ISADevice *kvm_pit_init(ISABus *bus, int base) -{ - DeviceState *dev; - ISADevice *d; - - d = isa_create(bus, TYPE_KVM_I8254); - dev = DEVICE(d); - qdev_prop_set_uint32(dev, "iobase", base); - qdev_init_nofail(dev); - - return d; -} - -void pit_set_gate(ISADevice *dev, int channel, int val); -void pit_get_channel_info(ISADevice *dev, int channel, PITChannelInfo *info); - -#endif /* !HW_I8254_H */ diff --git a/qemu/include/hw/timer/i8254_internal.h b/qemu/include/hw/timer/i8254_internal.h deleted file mode 100644 index 61a1bfbc4..000000000 --- a/qemu/include/hw/timer/i8254_internal.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - * QEMU 8253/8254 - internal interfaces - * - * Copyright (c) 2011 Jan Kiszka, Siemens AG - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef QEMU_I8254_INTERNAL_H -#define QEMU_I8254_INTERNAL_H - -#include "hw/hw.h" -#include "hw/i386/pc.h" -#include "hw/isa/isa.h" - -typedef struct PITChannelState { - int count; /* can be 65536 */ - uint16_t latched_count; - uint8_t count_latched; - uint8_t status_latched; - uint8_t status; - uint8_t read_state; - uint8_t write_state; - uint8_t write_latch; - uint8_t rw_mode; - uint8_t mode; - uint8_t bcd; /* not supported */ - uint8_t gate; /* timer start */ - int64_t count_load_time; - /* irq handling */ - int64_t next_transition_time; - QEMUTimer *irq_timer; - qemu_irq irq; - uint32_t irq_disabled; -} PITChannelState; - -typedef struct PITCommonState { - ISADevice dev; - MemoryRegion ioports; - uint32_t iobase; - PITChannelState channels[3]; -} PITCommonState; - -#define TYPE_PIT_COMMON "pit-common" -#define PIT_COMMON(obj) \ - OBJECT_CHECK(PITCommonState, (obj), TYPE_PIT_COMMON) -#define PIT_COMMON_CLASS(klass) \ - OBJECT_CLASS_CHECK(PITCommonClass, (klass), TYPE_PIT_COMMON) -#define PIT_COMMON_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PITCommonClass, (obj), TYPE_PIT_COMMON) - -typedef struct PITCommonClass { - ISADeviceClass parent_class; - - void (*set_channel_gate)(PITCommonState *s, PITChannelState *sc, int val); - void (*get_channel_info)(PITCommonState *s, PITChannelState *sc, - PITChannelInfo *info); - void (*pre_save)(PITCommonState *s); - void (*post_load)(PITCommonState *s); -} PITCommonClass; - -int pit_get_out(PITChannelState *s, int64_t current_time); -int64_t pit_get_next_transition_time(PITChannelState *s, int64_t current_time); -void pit_get_channel_info_common(PITCommonState *s, PITChannelState *sc, - PITChannelInfo *info); -void pit_reset_common(PITCommonState *s); - -#endif /* !QEMU_I8254_INTERNAL_H */ diff --git a/qemu/include/hw/timer/imx_epit.h b/qemu/include/hw/timer/imx_epit.h deleted file mode 100644 index 0730ac35e..000000000 --- a/qemu/include/hw/timer/imx_epit.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * i.MX EPIT Timer - * - * Copyright (c) 2008 OK Labs - * Copyright (c) 2011 NICTA Pty Ltd - * Originally written by Hans Jiang - * Updated by Peter Chubb - * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef IMX_EPIT_H -#define IMX_EPIT_H - -#include "hw/sysbus.h" -#include "hw/ptimer.h" -#include "hw/misc/imx_ccm.h" - -/* - * EPIT: Enhanced periodic interrupt timer - */ - -#define CR_EN (1 << 0) -#define CR_ENMOD (1 << 1) -#define CR_OCIEN (1 << 2) -#define CR_RLD (1 << 3) -#define CR_PRESCALE_SHIFT (4) -#define CR_PRESCALE_MASK (0xfff) -#define CR_SWR (1 << 16) -#define CR_IOVW (1 << 17) -#define CR_DBGEN (1 << 18) -#define CR_WAITEN (1 << 19) -#define CR_DOZEN (1 << 20) -#define CR_STOPEN (1 << 21) -#define CR_CLKSRC_SHIFT (24) -#define CR_CLKSRC_MASK (0x3 << CR_CLKSRC_SHIFT) - -#define EPIT_TIMER_MAX 0XFFFFFFFFUL - -#define TYPE_IMX_EPIT "imx.epit" -#define IMX_EPIT(obj) OBJECT_CHECK(IMXEPITState, (obj), TYPE_IMX_EPIT) - -typedef struct IMXEPITState{ - /*< private >*/ - SysBusDevice parent_obj; - - /*< public >*/ - ptimer_state *timer_reload; - ptimer_state *timer_cmp; - MemoryRegion iomem; - IMXCCMState *ccm; - - uint32_t cr; - uint32_t sr; - uint32_t lr; - uint32_t cmp; - uint32_t cnt; - - uint32_t freq; - qemu_irq irq; -} IMXEPITState; - -#endif /* IMX_EPIT_H */ diff --git a/qemu/include/hw/timer/imx_gpt.h b/qemu/include/hw/timer/imx_gpt.h deleted file mode 100644 index 461adbe53..000000000 --- a/qemu/include/hw/timer/imx_gpt.h +++ /dev/null @@ -1,108 +0,0 @@ -/* - * i.MX GPT Timer - * - * Copyright (c) 2008 OK Labs - * Copyright (c) 2011 NICTA Pty Ltd - * Originally written by Hans Jiang - * Updated by Peter Chubb - * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef IMX_GPT_H -#define IMX_GPT_H - -#include "hw/sysbus.h" -#include "hw/ptimer.h" -#include "hw/misc/imx_ccm.h" - -/* - * GPT : General purpose timer - * - * This timer counts up continuously while it is enabled, resetting itself - * to 0 when it reaches GPT_TIMER_MAX (in freerun mode) or when it - * reaches the value of one of the ocrX (in periodic mode). - */ - -#define GPT_TIMER_MAX 0XFFFFFFFFUL - -/* Control register. Not all of these bits have any effect (yet) */ -#define GPT_CR_EN (1 << 0) /* GPT Enable */ -#define GPT_CR_ENMOD (1 << 1) /* GPT Enable Mode */ -#define GPT_CR_DBGEN (1 << 2) /* GPT Debug mode enable */ -#define GPT_CR_WAITEN (1 << 3) /* GPT Wait Mode Enable */ -#define GPT_CR_DOZEN (1 << 4) /* GPT Doze mode enable */ -#define GPT_CR_STOPEN (1 << 5) /* GPT Stop Mode Enable */ -#define GPT_CR_CLKSRC_SHIFT (6) -#define GPT_CR_CLKSRC_MASK (0x7) - -#define GPT_CR_FRR (1 << 9) /* Freerun or Restart */ -#define GPT_CR_SWR (1 << 15) /* Software Reset */ -#define GPT_CR_IM1 (3 << 16) /* Input capture channel 1 mode (2 bits) */ -#define GPT_CR_IM2 (3 << 18) /* Input capture channel 2 mode (2 bits) */ -#define GPT_CR_OM1 (7 << 20) /* Output Compare Channel 1 Mode (3 bits) */ -#define GPT_CR_OM2 (7 << 23) /* Output Compare Channel 2 Mode (3 bits) */ -#define GPT_CR_OM3 (7 << 26) /* Output Compare Channel 3 Mode (3 bits) */ -#define GPT_CR_FO1 (1 << 29) /* Force Output Compare Channel 1 */ -#define GPT_CR_FO2 (1 << 30) /* Force Output Compare Channel 2 */ -#define GPT_CR_FO3 (1 << 31) /* Force Output Compare Channel 3 */ - -#define GPT_SR_OF1 (1 << 0) -#define GPT_SR_OF2 (1 << 1) -#define GPT_SR_OF3 (1 << 2) -#define GPT_SR_ROV (1 << 5) - -#define GPT_IR_OF1IE (1 << 0) -#define GPT_IR_OF2IE (1 << 1) -#define GPT_IR_OF3IE (1 << 2) -#define GPT_IR_ROVIE (1 << 5) - -#define TYPE_IMX_GPT "imx.gpt" -#define IMX_GPT(obj) OBJECT_CHECK(IMXGPTState, (obj), TYPE_IMX_GPT) - -typedef struct IMXGPTState{ - /*< private >*/ - SysBusDevice parent_obj; - - /*< public >*/ - ptimer_state *timer; - MemoryRegion iomem; - IMXCCMState *ccm; - - uint32_t cr; - uint32_t pr; - uint32_t sr; - uint32_t ir; - uint32_t ocr1; - uint32_t ocr2; - uint32_t ocr3; - uint32_t icr1; - uint32_t icr2; - uint32_t cnt; - - uint32_t next_timeout; - uint32_t next_int; - - uint32_t freq; - - qemu_irq irq; -} IMXGPTState; - -#endif /* IMX_GPT_H */ diff --git a/qemu/include/hw/timer/m48t59.h b/qemu/include/hw/timer/m48t59.h deleted file mode 100644 index 336792363..000000000 --- a/qemu/include/hw/timer/m48t59.h +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef NVRAM_H -#define NVRAM_H - -#include "qemu-common.h" -#include "qom/object.h" - -#define TYPE_NVRAM "nvram" - -#define NVRAM_CLASS(klass) \ - OBJECT_CLASS_CHECK(NvramClass, (klass), TYPE_NVRAM) -#define NVRAM_GET_CLASS(obj) \ - OBJECT_GET_CLASS(NvramClass, (obj), TYPE_NVRAM) -#define NVRAM(obj) \ - INTERFACE_CHECK(Nvram, (obj), TYPE_NVRAM) - -typedef struct Nvram { - Object parent; -} Nvram; - -typedef struct NvramClass { - InterfaceClass parent; - - uint32_t (*read)(Nvram *obj, uint32_t addr); - void (*write)(Nvram *obj, uint32_t addr, uint32_t val); - void (*toggle_lock)(Nvram *obj, int lock); -} NvramClass; - -Nvram *m48t59_init_isa(ISABus *bus, uint32_t io_base, uint16_t size, - int base_year, int type); -Nvram *m48t59_init(qemu_irq IRQ, hwaddr mem_base, - uint32_t io_base, uint16_t size, int base_year, - int type); - -#endif /* !NVRAM_H */ diff --git a/qemu/include/hw/timer/mc146818rtc.h b/qemu/include/hw/timer/mc146818rtc.h deleted file mode 100644 index eaf649767..000000000 --- a/qemu/include/hw/timer/mc146818rtc.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef MC146818RTC_H -#define MC146818RTC_H - -#include "hw/isa/isa.h" -#include "hw/timer/mc146818rtc_regs.h" - -#define TYPE_MC146818_RTC "mc146818rtc" - -ISADevice *rtc_init(ISABus *bus, int base_year, qemu_irq intercept_irq); -void rtc_set_memory(ISADevice *dev, int addr, int val); -int rtc_get_memory(ISADevice *dev, int addr); - -#endif /* !MC146818RTC_H */ diff --git a/qemu/include/hw/timer/mc146818rtc_regs.h b/qemu/include/hw/timer/mc146818rtc_regs.h deleted file mode 100644 index ccdee42b3..000000000 --- a/qemu/include/hw/timer/mc146818rtc_regs.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * QEMU MC146818 RTC emulation - * - * Copyright (c) 2003-2004 Fabrice Bellard - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef RTC_REGS_H -#define RTC_REGS_H - -#define RTC_ISA_IRQ 8 - -#define RTC_SECONDS 0 -#define RTC_SECONDS_ALARM 1 -#define RTC_MINUTES 2 -#define RTC_MINUTES_ALARM 3 -#define RTC_HOURS 4 -#define RTC_HOURS_ALARM 5 -#define RTC_ALARM_DONT_CARE 0xC0 - -#define RTC_DAY_OF_WEEK 6 -#define RTC_DAY_OF_MONTH 7 -#define RTC_MONTH 8 -#define RTC_YEAR 9 - -#define RTC_REG_A 10 -#define RTC_REG_B 11 -#define RTC_REG_C 12 -#define RTC_REG_D 13 - -/* PC cmos mappings */ -#define RTC_CENTURY 0x32 -#define RTC_IBM_PS2_CENTURY_BYTE 0x37 - -#define REG_A_UIP 0x80 - -#define REG_B_SET 0x80 -#define REG_B_PIE 0x40 -#define REG_B_AIE 0x20 -#define REG_B_UIE 0x10 -#define REG_B_SQWE 0x08 -#define REG_B_DM 0x04 -#define REG_B_24H 0x02 - -#define REG_C_UF 0x10 -#define REG_C_IRQF 0x80 -#define REG_C_PF 0x40 -#define REG_C_AF 0x20 -#define REG_C_MASK 0x70 - -#endif diff --git a/qemu/include/hw/timer/stm32f2xx_timer.h b/qemu/include/hw/timer/stm32f2xx_timer.h deleted file mode 100644 index e6a83237a..000000000 --- a/qemu/include/hw/timer/stm32f2xx_timer.h +++ /dev/null @@ -1,101 +0,0 @@ -/* - * STM32F2XX Timer - * - * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me> - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HW_STM32F2XX_TIMER_H -#define HW_STM32F2XX_TIMER_H - -#include "hw/sysbus.h" -#include "qemu/timer.h" -#include "sysemu/sysemu.h" - -#define TIM_CR1 0x00 -#define TIM_CR2 0x04 -#define TIM_SMCR 0x08 -#define TIM_DIER 0x0C -#define TIM_SR 0x10 -#define TIM_EGR 0x14 -#define TIM_CCMR1 0x18 -#define TIM_CCMR2 0x1C -#define TIM_CCER 0x20 -#define TIM_CNT 0x24 -#define TIM_PSC 0x28 -#define TIM_ARR 0x2C -#define TIM_CCR1 0x34 -#define TIM_CCR2 0x38 -#define TIM_CCR3 0x3C -#define TIM_CCR4 0x40 -#define TIM_DCR 0x48 -#define TIM_DMAR 0x4C -#define TIM_OR 0x50 - -#define TIM_CR1_CEN 1 - -#define TIM_EGR_UG 1 - -#define TIM_CCER_CC2E (1 << 4) -#define TIM_CCMR1_OC2M2 (1 << 14) -#define TIM_CCMR1_OC2M1 (1 << 13) -#define TIM_CCMR1_OC2M0 (1 << 12) -#define TIM_CCMR1_OC2PE (1 << 11) - -#define TIM_DIER_UIE 1 - -#define TYPE_STM32F2XX_TIMER "stm32f2xx-timer" -#define STM32F2XXTIMER(obj) OBJECT_CHECK(STM32F2XXTimerState, \ - (obj), TYPE_STM32F2XX_TIMER) - -typedef struct STM32F2XXTimerState { - /* <private> */ - SysBusDevice parent_obj; - - /* <public> */ - MemoryRegion iomem; - QEMUTimer *timer; - qemu_irq irq; - - int64_t tick_offset; - uint64_t hit_time; - uint64_t freq_hz; - - uint32_t tim_cr1; - uint32_t tim_cr2; - uint32_t tim_smcr; - uint32_t tim_dier; - uint32_t tim_sr; - uint32_t tim_egr; - uint32_t tim_ccmr1; - uint32_t tim_ccmr2; - uint32_t tim_ccer; - uint32_t tim_psc; - uint32_t tim_arr; - uint32_t tim_ccr1; - uint32_t tim_ccr2; - uint32_t tim_ccr3; - uint32_t tim_ccr4; - uint32_t tim_dcr; - uint32_t tim_dmar; - uint32_t tim_or; -} STM32F2XXTimerState; - -#endif /* HW_STM32F2XX_TIMER_H */ |