diff options
Diffstat (limited to 'qemu/include/hw/misc')
| -rw-r--r-- | qemu/include/hw/misc/a9scu.h | 31 | ||||
| -rw-r--r-- | qemu/include/hw/misc/arm11scu.h | 29 | ||||
| -rw-r--r-- | qemu/include/hw/misc/arm_integrator_debug.h | 18 | ||||
| -rw-r--r-- | qemu/include/hw/misc/bcm2835_mbox.h | 38 | ||||
| -rw-r--r-- | qemu/include/hw/misc/bcm2835_mbox_defs.h | 27 | ||||
| -rw-r--r-- | qemu/include/hw/misc/bcm2835_property.h | 35 | ||||
| -rw-r--r-- | qemu/include/hw/misc/imx25_ccm.h | 79 | ||||
| -rw-r--r-- | qemu/include/hw/misc/imx31_ccm.h | 88 | ||||
| -rw-r--r-- | qemu/include/hw/misc/imx6_ccm.h | 197 | ||||
| -rw-r--r-- | qemu/include/hw/misc/imx_ccm.h | 64 | ||||
| -rw-r--r-- | qemu/include/hw/misc/ivshmem.h | 25 | ||||
| -rw-r--r-- | qemu/include/hw/misc/mips_cmgcr.h | 59 | ||||
| -rw-r--r-- | qemu/include/hw/misc/mips_cpc.h | 47 | ||||
| -rw-r--r-- | qemu/include/hw/misc/mips_itu.h | 72 | ||||
| -rw-r--r-- | qemu/include/hw/misc/stm32f2xx_syscfg.h | 61 | ||||
| -rw-r--r-- | qemu/include/hw/misc/tmp105_regs.h | 50 | ||||
| -rw-r--r-- | qemu/include/hw/misc/zynq-xadc.h | 46 |
17 files changed, 0 insertions, 966 deletions
diff --git a/qemu/include/hw/misc/a9scu.h b/qemu/include/hw/misc/a9scu.h deleted file mode 100644 index efb0c305c..000000000 --- a/qemu/include/hw/misc/a9scu.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Cortex-A9MPCore Snoop Control Unit (SCU) emulation. - * - * Copyright (c) 2009 CodeSourcery. - * Copyright (c) 2011 Linaro Limited. - * Written by Paul Brook, Peter Maydell. - * - * This code is licensed under the GPL. - */ -#ifndef HW_MISC_A9SCU_H -#define HW_MISC_A9SCU_H - -#include "hw/sysbus.h" - -/* A9MP private memory region. */ - -typedef struct A9SCUState { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - MemoryRegion iomem; - uint32_t control; - uint32_t status; - uint32_t num_cpu; -} A9SCUState; - -#define TYPE_A9_SCU "a9-scu" -#define A9_SCU(obj) OBJECT_CHECK(A9SCUState, (obj), TYPE_A9_SCU) - -#endif diff --git a/qemu/include/hw/misc/arm11scu.h b/qemu/include/hw/misc/arm11scu.h deleted file mode 100644 index 5ad0f3d33..000000000 --- a/qemu/include/hw/misc/arm11scu.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * ARM11MPCore Snoop Control Unit (SCU) emulation - * - * Copyright (c) 2006-2007 CodeSourcery. - * Copyright (c) 2013 SUSE LINUX Products GmbH - * Written by Paul Brook and Andreas Färber - * - * This code is licensed under the GPL. - */ - -#ifndef HW_MISC_ARM11SCU_H -#define HW_MISC_ARM11SCU_H - -#include "hw/sysbus.h" - -#define TYPE_ARM11_SCU "arm11-scu" -#define ARM11_SCU(obj) OBJECT_CHECK(ARM11SCUState, (obj), TYPE_ARM11_SCU) - -typedef struct ARM11SCUState { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - uint32_t control; - uint32_t num_cpu; - MemoryRegion iomem; -} ARM11SCUState; - -#endif diff --git a/qemu/include/hw/misc/arm_integrator_debug.h b/qemu/include/hw/misc/arm_integrator_debug.h deleted file mode 100644 index 37789b69d..000000000 --- a/qemu/include/hw/misc/arm_integrator_debug.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * ARM Integrator Board Debug, switch and LED section - * - * Browse the data sheet: - * - * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0159b/Babbfijf.html - * - * Copyright (c) 2013 Alex Bennée <alex@bennee.com> - * - * This work is licensed under the terms of the GNU GPL, version 2 or later. - * See the COPYING file in the top-level directory. - */ -#ifndef QEMU_INTEGRATOR_DEBUG_H -#define QEMU_INTEGRATOR_DEBUG_H - -#define TYPE_INTEGRATOR_DEBUG "integrator_debug" - -#endif diff --git a/qemu/include/hw/misc/bcm2835_mbox.h b/qemu/include/hw/misc/bcm2835_mbox.h deleted file mode 100644 index f4e9ff9ef..000000000 --- a/qemu/include/hw/misc/bcm2835_mbox.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Raspberry Pi emulation (c) 2012 Gregory Estrade - * This code is licensed under the GNU GPLv2 and later. - */ - -#ifndef BCM2835_MBOX_H -#define BCM2835_MBOX_H - -#include "bcm2835_mbox_defs.h" -#include "hw/sysbus.h" -#include "exec/address-spaces.h" - -#define TYPE_BCM2835_MBOX "bcm2835-mbox" -#define BCM2835_MBOX(obj) \ - OBJECT_CHECK(BCM2835MboxState, (obj), TYPE_BCM2835_MBOX) - -typedef struct { - uint32_t reg[MBOX_SIZE]; - uint32_t count; - uint32_t status; - uint32_t config; -} BCM2835Mbox; - -typedef struct { - /*< private >*/ - SysBusDevice busdev; - /*< public >*/ - MemoryRegion *mbox_mr; - AddressSpace mbox_as; - MemoryRegion iomem; - qemu_irq arm_irq; - - bool mbox_irq_disabled; - bool available[MBOX_CHAN_COUNT]; - BCM2835Mbox mbox[2]; -} BCM2835MboxState; - -#endif diff --git a/qemu/include/hw/misc/bcm2835_mbox_defs.h b/qemu/include/hw/misc/bcm2835_mbox_defs.h deleted file mode 100644 index a18e520b2..000000000 --- a/qemu/include/hw/misc/bcm2835_mbox_defs.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Raspberry Pi emulation (c) 2012 Gregory Estrade - * This code is licensed under the GNU GPLv2 and later. - */ - -#ifndef BCM2835_MBOX_DEFS_H -#define BCM2835_MBOX_DEFS_H - -/* Constants shared with the ARM identifying separate mailbox channels */ -#define MBOX_CHAN_POWER 0 /* for use by the power management interface */ -#define MBOX_CHAN_FB 1 /* for use by the frame buffer */ -#define MBOX_CHAN_VCHIQ 3 /* for use by the VCHIQ interface */ -#define MBOX_CHAN_PROPERTY 8 /* for use by the property channel */ -#define MBOX_CHAN_COUNT 9 - -#define MBOX_SIZE 32 -#define MBOX_INVALID_DATA 0x0f - -/* Layout of the private address space used for communication between - * the mbox device emulation, and child devices: each channel occupies - * 16 bytes of address space, but only two registers are presently defined. - */ -#define MBOX_AS_CHAN_SHIFT 4 -#define MBOX_AS_DATA 0 /* request / response data (RW at offset 0) */ -#define MBOX_AS_PENDING 4 /* pending response status (RO at offset 4) */ - -#endif /* BCM2835_MBOX_DEFS_H */ diff --git a/qemu/include/hw/misc/bcm2835_property.h b/qemu/include/hw/misc/bcm2835_property.h deleted file mode 100644 index edcab603c..000000000 --- a/qemu/include/hw/misc/bcm2835_property.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Raspberry Pi emulation (c) 2012 Gregory Estrade - * This code is licensed under the GNU GPLv2 and later. - */ - -#ifndef BCM2835_PROPERTY_H -#define BCM2835_PROPERTY_H - -#include "hw/sysbus.h" -#include "exec/address-spaces.h" -#include "net/net.h" -#include "hw/display/bcm2835_fb.h" - -#define TYPE_BCM2835_PROPERTY "bcm2835-property" -#define BCM2835_PROPERTY(obj) \ - OBJECT_CHECK(BCM2835PropertyState, (obj), TYPE_BCM2835_PROPERTY) - -typedef struct { - /*< private >*/ - SysBusDevice busdev; - /*< public >*/ - - MemoryRegion *dma_mr; - AddressSpace dma_as; - MemoryRegion iomem; - qemu_irq mbox_irq; - BCM2835FBState *fbdev; - - MACAddr macaddr; - uint32_t board_rev; - uint32_t addr; - bool pending; -} BCM2835PropertyState; - -#endif diff --git a/qemu/include/hw/misc/imx25_ccm.h b/qemu/include/hw/misc/imx25_ccm.h deleted file mode 100644 index 296321c61..000000000 --- a/qemu/include/hw/misc/imx25_ccm.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * IMX25 Clock Control Module - * - * Copyright (C) 2012 NICTA - * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> - * - * This work is licensed under the terms of the GNU GPL, version 2 or later. - * See the COPYING file in the top-level directory. - */ - -#ifndef IMX25_CCM_H -#define IMX25_CCM_H - -#include "hw/misc/imx_ccm.h" - -#define IMX25_CCM_MPCTL_REG 0 -#define IMX25_CCM_UPCTL_REG 1 -#define IMX25_CCM_CCTL_REG 2 -#define IMX25_CCM_CGCR0_REG 3 -#define IMX25_CCM_CGCR1_REG 4 -#define IMX25_CCM_CGCR2_REG 5 -#define IMX25_CCM_PCDR0_REG 6 -#define IMX25_CCM_PCDR1_REG 7 -#define IMX25_CCM_PCDR2_REG 8 -#define IMX25_CCM_PCDR3_REG 9 -#define IMX25_CCM_RCSR_REG 10 -#define IMX25_CCM_CRDR_REG 11 -#define IMX25_CCM_DCVR0_REG 12 -#define IMX25_CCM_DCVR1_REG 13 -#define IMX25_CCM_DCVR2_REG 14 -#define IMX25_CCM_DCVR3_REG 15 -#define IMX25_CCM_LTR0_REG 16 -#define IMX25_CCM_LTR1_REG 17 -#define IMX25_CCM_LTR2_REG 18 -#define IMX25_CCM_LTR3_REG 19 -#define IMX25_CCM_LTBR0_REG 20 -#define IMX25_CCM_LTBR1_REG 21 -#define IMX25_CCM_PMCR0_REG 22 -#define IMX25_CCM_PMCR1_REG 23 -#define IMX25_CCM_PMCR2_REG 24 -#define IMX25_CCM_MCR_REG 25 -#define IMX25_CCM_LPIMR0_REG 26 -#define IMX25_CCM_LPIMR1_REG 27 -#define IMX25_CCM_MAX_REG 28 - -/* CCTL */ -#define CCTL_ARM_CLK_DIV_SHIFT (30) -#define CCTL_ARM_CLK_DIV_MASK (0x3) -#define CCTL_AHB_CLK_DIV_SHIFT (28) -#define CCTL_AHB_CLK_DIV_MASK (0x3) -#define CCTL_MPLL_BYPASS_SHIFT (22) -#define CCTL_MPLL_BYPASS_MASK (0x1) -#define CCTL_USB_DIV_SHIFT (16) -#define CCTL_USB_DIV_MASK (0x3F) -#define CCTL_ARM_SRC_SHIFT (13) -#define CCTL_ARM_SRC_MASK (0x1) -#define CCTL_UPLL_DIS_SHIFT (23) -#define CCTL_UPLL_DIS_MASK (0x1) - -#define EXTRACT(value, name) (((value) >> CCTL_##name##_SHIFT) \ - & CCTL_##name##_MASK) -#define INSERT(value, name) (((value) & CCTL_##name##_MASK) << \ - CCTL_##name##_SHIFT) - -#define TYPE_IMX25_CCM "imx25.ccm" -#define IMX25_CCM(obj) OBJECT_CHECK(IMX25CCMState, (obj), TYPE_IMX25_CCM) - -typedef struct IMX25CCMState { - /* <private> */ - IMXCCMState parent_obj; - - /* <public> */ - MemoryRegion iomem; - - uint32_t reg[IMX25_CCM_MAX_REG]; - -} IMX25CCMState; - -#endif /* IMX25_CCM_H */ diff --git a/qemu/include/hw/misc/imx31_ccm.h b/qemu/include/hw/misc/imx31_ccm.h deleted file mode 100644 index c376fad14..000000000 --- a/qemu/include/hw/misc/imx31_ccm.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * IMX31 Clock Control Module - * - * Copyright (C) 2012 NICTA - * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> - * - * This work is licensed under the terms of the GNU GPL, version 2 or later. - * See the COPYING file in the top-level directory. - */ - -#ifndef IMX31_CCM_H -#define IMX31_CCM_H - -#include "hw/misc/imx_ccm.h" - -#define IMX31_CCM_CCMR_REG 0 -#define IMX31_CCM_PDR0_REG 1 -#define IMX31_CCM_PDR1_REG 2 -#define IMX31_CCM_RCSR_REG 3 -#define IMX31_CCM_MPCTL_REG 4 -#define IMX31_CCM_UPCTL_REG 5 -#define IMX31_CCM_SPCTL_REG 6 -#define IMX31_CCM_COSR_REG 7 -#define IMX31_CCM_CGR0_REG 8 -#define IMX31_CCM_CGR1_REG 9 -#define IMX31_CCM_CGR2_REG 10 -#define IMX31_CCM_WIMR_REG 11 -#define IMX31_CCM_LDC_REG 12 -#define IMX31_CCM_DCVR0_REG 13 -#define IMX31_CCM_DCVR1_REG 14 -#define IMX31_CCM_DCVR2_REG 15 -#define IMX31_CCM_DCVR3_REG 16 -#define IMX31_CCM_LTR0_REG 17 -#define IMX31_CCM_LTR1_REG 18 -#define IMX31_CCM_LTR2_REG 19 -#define IMX31_CCM_LTR3_REG 20 -#define IMX31_CCM_LTBR0_REG 21 -#define IMX31_CCM_LTBR1_REG 22 -#define IMX31_CCM_PMCR0_REG 23 -#define IMX31_CCM_PMCR1_REG 24 -#define IMX31_CCM_PDR2_REG 25 -#define IMX31_CCM_MAX_REG 26 - -/* CCMR */ -#define CCMR_FPME (1<<0) -#define CCMR_MPE (1<<3) -#define CCMR_MDS (1<<7) -#define CCMR_FPMF (1<<26) -#define CCMR_PRCS (3<<1) - -#define PMCR0_DFSUP1 (1<<31) - -/* PDR0 */ -#define PDR0_MCU_PODF_SHIFT (0) -#define PDR0_MCU_PODF_MASK (0x7) -#define PDR0_MAX_PODF_SHIFT (3) -#define PDR0_MAX_PODF_MASK (0x7) -#define PDR0_IPG_PODF_SHIFT (6) -#define PDR0_IPG_PODF_MASK (0x3) -#define PDR0_NFC_PODF_SHIFT (8) -#define PDR0_NFC_PODF_MASK (0x7) -#define PDR0_HSP_PODF_SHIFT (11) -#define PDR0_HSP_PODF_MASK (0x7) -#define PDR0_PER_PODF_SHIFT (16) -#define PDR0_PER_PODF_MASK (0x1f) -#define PDR0_CSI_PODF_SHIFT (23) -#define PDR0_CSI_PODF_MASK (0x1ff) - -#define EXTRACT(value, name) (((value) >> PDR0_##name##_PODF_SHIFT) \ - & PDR0_##name##_PODF_MASK) -#define INSERT(value, name) (((value) & PDR0_##name##_PODF_MASK) << \ - PDR0_##name##_PODF_SHIFT) - -#define TYPE_IMX31_CCM "imx31.ccm" -#define IMX31_CCM(obj) OBJECT_CHECK(IMX31CCMState, (obj), TYPE_IMX31_CCM) - -typedef struct IMX31CCMState { - /* <private> */ - IMXCCMState parent_obj; - - /* <public> */ - MemoryRegion iomem; - - uint32_t reg[IMX31_CCM_MAX_REG]; - -} IMX31CCMState; - -#endif /* IMX31_CCM_H */ diff --git a/qemu/include/hw/misc/imx6_ccm.h b/qemu/include/hw/misc/imx6_ccm.h deleted file mode 100644 index 80505809b..000000000 --- a/qemu/include/hw/misc/imx6_ccm.h +++ /dev/null @@ -1,197 +0,0 @@ -/* - * IMX6 Clock Control Module - * - * Copyright (C) 2012 NICTA - * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> - * - * This work is licensed under the terms of the GNU GPL, version 2 or later. - * See the COPYING file in the top-level directory. - */ - -#ifndef IMX6_CCM_H -#define IMX6_CCM_H - -#include "hw/misc/imx_ccm.h" -#include "qemu/bitops.h" - -#define CCM_CCR 0 -#define CCM_CCDR 1 -#define CCM_CSR 2 -#define CCM_CCSR 3 -#define CCM_CACRR 4 -#define CCM_CBCDR 5 -#define CCM_CBCMR 6 -#define CCM_CSCMR1 7 -#define CCM_CSCMR2 8 -#define CCM_CSCDR1 9 -#define CCM_CS1CDR 10 -#define CCM_CS2CDR 11 -#define CCM_CDCDR 12 -#define CCM_CHSCCDR 13 -#define CCM_CSCDR2 14 -#define CCM_CSCDR3 15 -#define CCM_CDHIPR 18 -#define CCM_CTOR 20 -#define CCM_CLPCR 21 -#define CCM_CISR 22 -#define CCM_CIMR 23 -#define CCM_CCOSR 24 -#define CCM_CGPR 25 -#define CCM_CCGR0 26 -#define CCM_CCGR1 27 -#define CCM_CCGR2 28 -#define CCM_CCGR3 29 -#define CCM_CCGR4 30 -#define CCM_CCGR5 31 -#define CCM_CCGR6 32 -#define CCM_CMEOR 34 -#define CCM_MAX 35 - -#define CCM_ANALOG_PLL_ARM 0 -#define CCM_ANALOG_PLL_ARM_SET 1 -#define CCM_ANALOG_PLL_ARM_CLR 2 -#define CCM_ANALOG_PLL_ARM_TOG 3 -#define CCM_ANALOG_PLL_USB1 4 -#define CCM_ANALOG_PLL_USB1_SET 5 -#define CCM_ANALOG_PLL_USB1_CLR 6 -#define CCM_ANALOG_PLL_USB1_TOG 7 -#define CCM_ANALOG_PLL_USB2 8 -#define CCM_ANALOG_PLL_USB2_SET 9 -#define CCM_ANALOG_PLL_USB2_CLR 10 -#define CCM_ANALOG_PLL_USB2_TOG 11 -#define CCM_ANALOG_PLL_SYS 12 -#define CCM_ANALOG_PLL_SYS_SET 13 -#define CCM_ANALOG_PLL_SYS_CLR 14 -#define CCM_ANALOG_PLL_SYS_TOG 15 -#define CCM_ANALOG_PLL_SYS_SS 16 -#define CCM_ANALOG_PLL_SYS_NUM 20 -#define CCM_ANALOG_PLL_SYS_DENOM 24 -#define CCM_ANALOG_PLL_AUDIO 28 -#define CCM_ANALOG_PLL_AUDIO_SET 29 -#define CCM_ANALOG_PLL_AUDIO_CLR 30 -#define CCM_ANALOG_PLL_AUDIO_TOG 31 -#define CCM_ANALOG_PLL_AUDIO_NUM 32 -#define CCM_ANALOG_PLL_AUDIO_DENOM 36 -#define CCM_ANALOG_PLL_VIDEO 40 -#define CCM_ANALOG_PLL_VIDEO_SET 41 -#define CCM_ANALOG_PLL_VIDEO_CLR 42 -#define CCM_ANALOG_PLL_VIDEO_TOG 44 -#define CCM_ANALOG_PLL_VIDEO_NUM 46 -#define CCM_ANALOG_PLL_VIDEO_DENOM 48 -#define CCM_ANALOG_PLL_MLB 52 -#define CCM_ANALOG_PLL_MLB_SET 53 -#define CCM_ANALOG_PLL_MLB_CLR 54 -#define CCM_ANALOG_PLL_MLB_TOG 55 -#define CCM_ANALOG_PLL_ENET 56 -#define CCM_ANALOG_PLL_ENET_SET 57 -#define CCM_ANALOG_PLL_ENET_CLR 58 -#define CCM_ANALOG_PLL_ENET_TOG 59 -#define CCM_ANALOG_PFD_480 60 -#define CCM_ANALOG_PFD_480_SET 61 -#define CCM_ANALOG_PFD_480_CLR 62 -#define CCM_ANALOG_PFD_480_TOG 63 -#define CCM_ANALOG_PFD_528 64 -#define CCM_ANALOG_PFD_528_SET 65 -#define CCM_ANALOG_PFD_528_CLR 66 -#define CCM_ANALOG_PFD_528_TOG 67 - -/* PMU registers */ -#define PMU_REG_1P1 68 -#define PMU_REG_3P0 72 -#define PMU_REG_2P5 76 -#define PMU_REG_CORE 80 - -#define CCM_ANALOG_MISC0 84 -#define PMU_MISC0 84 -#define CCM_ANALOG_MISC0_SET 85 -#define CCM_ANALOG_MISC0_CLR 86 -#define CCM_ANALOG_MISC0_TOG 87 - -#define PMU_MISC1 88 -#define PMU_MISC1_SET 89 -#define PMU_MISC1_CLR 90 -#define PMU_MISC1_TOG 91 - -#define CCM_ANALOG_MISC2 92 -#define PMU_MISC2 92 -#define CCM_ANALOG_MISC2_SET 93 -#define CCM_ANALOG_MISC2_CLR 94 -#define CCM_ANALOG_MISC2_TOG 95 - -#define USB_ANALOG_USB1_VBUS_DETECT 104 -#define USB_ANALOG_USB1_VBUS_DETECT_SET 105 -#define USB_ANALOG_USB1_VBUS_DETECT_CLR 106 -#define USB_ANALOG_USB1_VBUS_DETECT_TOG 107 -#define USB_ANALOG_USB1_CHRG_DETECT 108 -#define USB_ANALOG_USB1_CHRG_DETECT_SET 109 -#define USB_ANALOG_USB1_CHRG_DETECT_CLR 110 -#define USB_ANALOG_USB1_CHRG_DETECT_TOG 111 -#define USB_ANALOG_USB1_VBUS_DETECT_STAT 112 -#define USB_ANALOG_USB1_CHRG_DETECT_STAT 116 -#define USB_ANALOG_USB1_MISC 124 -#define USB_ANALOG_USB1_MISC_SET 125 -#define USB_ANALOG_USB1_MISC_CLR 126 -#define USB_ANALOG_USB1_MISC_TOG 127 -#define USB_ANALOG_USB2_VBUS_DETECT 128 -#define USB_ANALOG_USB2_VBUS_DETECT_SET 129 -#define USB_ANALOG_USB2_VBUS_DETECT_CLR 130 -#define USB_ANALOG_USB2_VBUS_DETECT_TOG 131 -#define USB_ANALOG_USB2_CHRG_DETECT 132 -#define USB_ANALOG_USB2_CHRG_DETECT_SET 133 -#define USB_ANALOG_USB2_CHRG_DETECT_CLR 134 -#define USB_ANALOG_USB2_CHRG_DETECT_TOG 135 -#define USB_ANALOG_USB2_VBUS_DETECT_STAT 136 -#define USB_ANALOG_USB2_CHRG_DETECT_STAT 140 -#define USB_ANALOG_USB2_MISC 148 -#define USB_ANALOG_USB2_MISC_SET 149 -#define USB_ANALOG_USB2_MISC_CLR 150 -#define USB_ANALOG_USB2_MISC_TOG 151 -#define USB_ANALOG_DIGPROG 152 -#define CCM_ANALOG_MAX 153 - -/* CCM_CBCMR */ -#define PRE_PERIPH_CLK_SEL_SHIFT (18) -#define PRE_PERIPH_CLK_SEL_LENGTH (2) - -/* CCM_CBCDR */ -#define AHB_PODF_SHIFT (10) -#define AHB_PODF_LENGTH (3) -#define IPG_PODF_SHIFT (8) -#define IPG_PODF_LENGTH (2) - -/* CCM_CSCMR1 */ -#define PERCLK_PODF_SHIFT (0) -#define PERCLK_PODF_LENGTH (6) - -/* CCM_ANALOG_PFD_528 */ -#define PFD0_FRAC_SHIFT (0) -#define PFD0_FRAC_LENGTH (6) -#define PFD2_FRAC_SHIFT (16) -#define PFD2_FRAC_LENGTH (6) - -/* CCM_ANALOG_PLL_SYS */ -#define DIV_SELECT_SHIFT (0) -#define DIV_SELECT_LENGTH (1) - -#define CCM_ANALOG_PLL_LOCK (1 << 31); - -#define EXTRACT(value, name) extract32(value, name##_SHIFT, name##_LENGTH) - -#define TYPE_IMX6_CCM "imx6.ccm" -#define IMX6_CCM(obj) OBJECT_CHECK(IMX6CCMState, (obj), TYPE_IMX6_CCM) - -typedef struct IMX6CCMState { - /* <private> */ - IMXCCMState parent_obj; - - /* <public> */ - MemoryRegion container; - MemoryRegion ioccm; - MemoryRegion ioanalog; - - uint32_t ccm[CCM_MAX]; - uint32_t analog[CCM_ANALOG_MAX]; - -} IMX6CCMState; - -#endif /* IMX6_CCM_H */ diff --git a/qemu/include/hw/misc/imx_ccm.h b/qemu/include/hw/misc/imx_ccm.h deleted file mode 100644 index 48a7afad5..000000000 --- a/qemu/include/hw/misc/imx_ccm.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * IMX Clock Control Module base class - * - * Copyright (C) 2012 NICTA - * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> - * - * This work is licensed under the terms of the GNU GPL, version 2 or later. - * See the COPYING file in the top-level directory. - */ - -#ifndef IMX_CCM_H -#define IMX_CCM_H - -#include "hw/sysbus.h" - -#define CKIL_FREQ 32768 /* nominal 32khz clock */ - -/* PLL control registers */ -#define PD(v) (((v) >> 26) & 0xf) -#define MFD(v) (((v) >> 16) & 0x3ff) -#define MFI(v) (((v) >> 10) & 0xf); -#define MFN(v) ((v) & 0x3ff) - -#define PLL_PD(x) (((x) & 0xf) << 26) -#define PLL_MFD(x) (((x) & 0x3ff) << 16) -#define PLL_MFI(x) (((x) & 0xf) << 10) -#define PLL_MFN(x) (((x) & 0x3ff) << 0) - -#define TYPE_IMX_CCM "imx.ccm" -#define IMX_CCM(obj) \ - OBJECT_CHECK(IMXCCMState, (obj), TYPE_IMX_CCM) -#define IMX_CCM_CLASS(klass) \ - OBJECT_CLASS_CHECK(IMXCCMClass, (klass), TYPE_IMX_CCM) -#define IMX_GET_CLASS(obj) \ - OBJECT_GET_CLASS(IMXCCMClass, (obj), TYPE_IMX_CCM) - -typedef struct IMXCCMState { - /* <private> */ - SysBusDevice parent_obj; - - /* <public> */ - -} IMXCCMState; - -typedef enum { - CLK_NONE, - CLK_IPG, - CLK_IPG_HIGH, - CLK_32k -} IMXClk; - -typedef struct IMXCCMClass { - /* <private> */ - SysBusDeviceClass parent_class; - - /* <public> */ - uint32_t (*get_clock_frequency)(IMXCCMState *s, IMXClk clk); -} IMXCCMClass; - -uint32_t imx_ccm_calc_pll(uint32_t pllreg, uint32_t base_freq); - -uint32_t imx_ccm_get_clock_frequency(IMXCCMState *s, IMXClk clock); - -#endif /* IMX_CCM_H */ diff --git a/qemu/include/hw/misc/ivshmem.h b/qemu/include/hw/misc/ivshmem.h deleted file mode 100644 index 433ef53d7..000000000 --- a/qemu/include/hw/misc/ivshmem.h +++ /dev/null @@ -1,25 +0,0 @@ - -/* - * Inter-VM Shared Memory PCI device. - * - * Author: - * Cam Macdonell <cam@cs.ualberta.ca> - * - * Based On: cirrus_vga.c - * Copyright (c) 2004 Fabrice Bellard - * Copyright (c) 2004 Makoto Suzuki (suzu) - * - * and rtl8139.c - * Copyright (c) 2006 Igor Kovalenko - * - * This code is licensed under the GNU GPL v2. - * - * Contributions after 2012-01-13 are licensed under the terms of the - * GNU GPL, version 2 or (at your option) any later version. - */ -#ifndef IVSHMEM_H -#define IVSHMEM_H - -#define IVSHMEM_PROTOCOL_VERSION 0 - -#endif /* IVSHMEM_H */ diff --git a/qemu/include/hw/misc/mips_cmgcr.h b/qemu/include/hw/misc/mips_cmgcr.h deleted file mode 100644 index cc60eefa5..000000000 --- a/qemu/include/hw/misc/mips_cmgcr.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2015 Imagination Technologies - * - */ - -#ifndef _MIPS_GCR_H -#define _MIPS_GCR_H - -#define TYPE_MIPS_GCR "mips-gcr" -#define MIPS_GCR(obj) OBJECT_CHECK(MIPSGCRState, (obj), TYPE_MIPS_GCR) - -#define GCR_BASE_ADDR 0x1fbf8000ULL -#define GCR_ADDRSPACE_SZ 0x8000 - -/* Offsets to register blocks */ -#define MIPS_GCB_OFS 0x0000 /* Global Control Block */ -#define MIPS_CLCB_OFS 0x2000 /* Core Local Control Block */ -#define MIPS_COCB_OFS 0x4000 /* Core Other Control Block */ -#define MIPS_GDB_OFS 0x6000 /* Global Debug Block */ - -/* Global Control Block Register Map */ -#define GCR_CONFIG_OFS 0x0000 -#define GCR_BASE_OFS 0x0008 -#define GCR_REV_OFS 0x0030 -#define GCR_CPC_BASE_OFS 0x0088 -#define GCR_CPC_STATUS_OFS 0x00F0 -#define GCR_L2_CONFIG_OFS 0x0130 - -/* Core Local and Core Other Block Register Map */ -#define GCR_CL_CONFIG_OFS 0x0010 -#define GCR_CL_OTHER_OFS 0x0018 - -/* GCR_L2_CONFIG register fields */ -#define GCR_L2_CONFIG_BYPASS_SHF 20 -#define GCR_L2_CONFIG_BYPASS_MSK ((0x1ULL) << GCR_L2_CONFIG_BYPASS_SHF) - -/* GCR_CPC_BASE register fields */ -#define GCR_CPC_BASE_CPCEN_MSK 1 -#define GCR_CPC_BASE_CPCBASE_MSK 0xFFFFFFFF8000ULL -#define GCR_CPC_BASE_MSK (GCR_CPC_BASE_CPCEN_MSK | GCR_CPC_BASE_CPCBASE_MSK) - -typedef struct MIPSGCRState MIPSGCRState; -struct MIPSGCRState { - SysBusDevice parent_obj; - - int32_t gcr_rev; - int32_t num_vps; - hwaddr gcr_base; - MemoryRegion iomem; - MemoryRegion *cpc_mr; - - uint64_t cpc_base; -}; - -#endif /* _MIPS_GCR_H */ diff --git a/qemu/include/hw/misc/mips_cpc.h b/qemu/include/hw/misc/mips_cpc.h deleted file mode 100644 index 72c834e03..000000000 --- a/qemu/include/hw/misc/mips_cpc.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Cluster Power Controller emulation - * - * Copyright (c) 2016 Imagination Technologies - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef MIPS_CPC_H -#define MIPS_CPC_H - -#define CPC_ADDRSPACE_SZ 0x6000 - -/* CPC blocks offsets relative to base address */ -#define CPC_CL_BASE_OFS 0x2000 -#define CPC_CO_BASE_OFS 0x4000 - -/* CPC register offsets relative to block offsets */ -#define CPC_VP_STOP_OFS 0x20 -#define CPC_VP_RUN_OFS 0x28 -#define CPC_VP_RUNNING_OFS 0x30 - -#define TYPE_MIPS_CPC "mips-cpc" -#define MIPS_CPC(obj) OBJECT_CHECK(MIPSCPCState, (obj), TYPE_MIPS_CPC) - -typedef struct MIPSCPCState { - SysBusDevice parent_obj; - - uint32_t num_vp; - uint64_t vp_start_running; /* VPs running from restart */ - - MemoryRegion mr; - uint64_t vp_running; /* Indicates which VPs are in the run state */ -} MIPSCPCState; - -#endif /* MIPS_CPC_H */ diff --git a/qemu/include/hw/misc/mips_itu.h b/qemu/include/hw/misc/mips_itu.h deleted file mode 100644 index b3a453203..000000000 --- a/qemu/include/hw/misc/mips_itu.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Inter-Thread Communication Unit emulation. - * - * Copyright (c) 2016 Imagination Technologies - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef MIPS_ITU_H -#define MIPS_ITU_H - -#define TYPE_MIPS_ITU "mips-itu" -#define MIPS_ITU(obj) OBJECT_CHECK(MIPSITUState, (obj), TYPE_MIPS_ITU) - -#define ITC_CELL_DEPTH_SHIFT 2 -#define ITC_CELL_DEPTH (1u << ITC_CELL_DEPTH_SHIFT) - -typedef struct ITCStorageCell { - struct { - uint8_t FIFODepth; /* Log2 of the cell depth */ - uint8_t FIFOPtr; /* Number of elements in a FIFO cell */ - uint8_t FIFO; /* 1 - FIFO cell, 0 - Semaphore cell */ - uint8_t T; /* Trap Bit */ - uint8_t F; /* Full Bit */ - uint8_t E; /* Empty Bit */ - } tag; - - /* Index of the oldest element in the queue */ - uint8_t fifo_out; - - /* Circular buffer for FIFO. Semaphore cells use index 0 only */ - uint64_t data[ITC_CELL_DEPTH]; - - /* Bitmap tracking blocked threads on the cell. - TODO: support >64 threads ? */ - uint64_t blocked_threads; -} ITCStorageCell; - -#define ITC_ADDRESSMAP_NUM 2 - -typedef struct MIPSITUState { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - int32_t num_fifo; - int32_t num_semaphores; - - /* ITC Storage */ - ITCStorageCell *cell; - MemoryRegion storage_io; - - /* ITC Configuration Tags */ - uint64_t ITCAddressMap[ITC_ADDRESSMAP_NUM]; - MemoryRegion tag_io; -} MIPSITUState; - -/* Get ITC Configuration Tag memory region. */ -MemoryRegion *mips_itu_get_tag_region(MIPSITUState *itu); - -#endif /* MIPS_ITU_H */ diff --git a/qemu/include/hw/misc/stm32f2xx_syscfg.h b/qemu/include/hw/misc/stm32f2xx_syscfg.h deleted file mode 100644 index 69e6a30fc..000000000 --- a/qemu/include/hw/misc/stm32f2xx_syscfg.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * STM32F2XX SYSCFG - * - * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me> - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HW_STM32F2XX_SYSCFG_H -#define HW_STM32F2XX_SYSCFG_H - -#include "hw/sysbus.h" -#include "hw/hw.h" - -#define SYSCFG_MEMRMP 0x00 -#define SYSCFG_PMC 0x04 -#define SYSCFG_EXTICR1 0x08 -#define SYSCFG_EXTICR2 0x0C -#define SYSCFG_EXTICR3 0x10 -#define SYSCFG_EXTICR4 0x14 -#define SYSCFG_CMPCR 0x20 - -#define TYPE_STM32F2XX_SYSCFG "stm32f2xx-syscfg" -#define STM32F2XX_SYSCFG(obj) \ - OBJECT_CHECK(STM32F2XXSyscfgState, (obj), TYPE_STM32F2XX_SYSCFG) - -typedef struct { - /* <private> */ - SysBusDevice parent_obj; - - /* <public> */ - MemoryRegion mmio; - - uint32_t syscfg_memrmp; - uint32_t syscfg_pmc; - uint32_t syscfg_exticr1; - uint32_t syscfg_exticr2; - uint32_t syscfg_exticr3; - uint32_t syscfg_exticr4; - uint32_t syscfg_cmpcr; - - qemu_irq irq; -} STM32F2XXSyscfgState; - -#endif /* HW_STM32F2XX_SYSCFG_H */ diff --git a/qemu/include/hw/misc/tmp105_regs.h b/qemu/include/hw/misc/tmp105_regs.h deleted file mode 100644 index 9b55abaf9..000000000 --- a/qemu/include/hw/misc/tmp105_regs.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Texas Instruments TMP105 Temperature Sensor I2C messages - * - * Browse the data sheet: - * - * http://www.ti.com/lit/gpn/tmp105 - * - * Copyright (C) 2012 Alex Horn <alex.horn@cs.ox.ac.uk> - * Copyright (C) 2008-2012 Andrzej Zaborowski <balrogg@gmail.com> - * - * This work is licensed under the terms of the GNU GPL, version 2 or - * later. See the COPYING file in the top-level directory. - */ -#ifndef QEMU_TMP105_MSGS_H -#define QEMU_TMP105_MSGS_H - -/** - * TMP105Reg: - * @TMP105_REG_TEMPERATURE: Temperature register - * @TMP105_REG_CONFIG: Configuration register - * @TMP105_REG_T_LOW: Low temperature register (also known as T_hyst) - * @TMP105_REG_T_HIGH: High temperature register (also known as T_OS) - * - * The following temperature sensors are - * compatible with the TMP105 registers: - * - adt75 - * - ds1775 - * - ds75 - * - lm75 - * - lm75a - * - max6625 - * - max6626 - * - mcp980x - * - stds75 - * - tcn75 - * - tmp100 - * - tmp101 - * - tmp105 - * - tmp175 - * - tmp275 - * - tmp75 - **/ -typedef enum TMP105Reg { - TMP105_REG_TEMPERATURE = 0, - TMP105_REG_CONFIG, - TMP105_REG_T_LOW, - TMP105_REG_T_HIGH, -} TMP105Reg; - -#endif diff --git a/qemu/include/hw/misc/zynq-xadc.h b/qemu/include/hw/misc/zynq-xadc.h deleted file mode 100644 index f1a410a37..000000000 --- a/qemu/include/hw/misc/zynq-xadc.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Device model for Zynq ADC controller - * - * Copyright (c) 2015 Guenter Roeck <linux@roeck-us.net> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef ZYNQ_XADC_H -#define ZYNQ_XADC_H - -#include "hw/sysbus.h" - -#define ZYNQ_XADC_MMIO_SIZE 0x0020 -#define ZYNQ_XADC_NUM_IO_REGS (ZYNQ_XADC_MMIO_SIZE / 4) -#define ZYNQ_XADC_NUM_ADC_REGS 128 -#define ZYNQ_XADC_FIFO_DEPTH 15 - -#define TYPE_ZYNQ_XADC "xlnx,zynq-xadc" -#define ZYNQ_XADC(obj) \ - OBJECT_CHECK(ZynqXADCState, (obj), TYPE_ZYNQ_XADC) - -typedef struct ZynqXADCState { - /*< private >*/ - SysBusDevice parent_obj; - - /*< public >*/ - MemoryRegion iomem; - - uint32_t regs[ZYNQ_XADC_NUM_IO_REGS]; - uint16_t xadc_regs[ZYNQ_XADC_NUM_ADC_REGS]; - uint16_t xadc_read_reg_previous; - uint16_t xadc_dfifo[ZYNQ_XADC_FIFO_DEPTH]; - uint16_t xadc_dfifo_entries; - - struct IRQState *qemu_irq; - -} ZynqXADCState; - -#endif /* ZYNQ_XADC_H */ |