diff options
Diffstat (limited to 'qemu/include/hw/char')
| -rw-r--r-- | qemu/include/hw/char/bcm2835_aux.h | 33 | ||||
| -rw-r--r-- | qemu/include/hw/char/cadence_uart.h | 53 | ||||
| -rw-r--r-- | qemu/include/hw/char/digic-uart.h | 46 | ||||
| -rw-r--r-- | qemu/include/hw/char/escc.h | 14 | ||||
| -rw-r--r-- | qemu/include/hw/char/imx_serial.h | 102 | ||||
| -rw-r--r-- | qemu/include/hw/char/lm32_juart.h | 13 | ||||
| -rw-r--r-- | qemu/include/hw/char/serial.h | 97 | ||||
| -rw-r--r-- | qemu/include/hw/char/stm32f2xx_usart.h | 73 |
8 files changed, 0 insertions, 431 deletions
diff --git a/qemu/include/hw/char/bcm2835_aux.h b/qemu/include/hw/char/bcm2835_aux.h deleted file mode 100644 index 42f0ee7a9..000000000 --- a/qemu/include/hw/char/bcm2835_aux.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft - * Written by Andrew Baumann - * - * This code is licensed under the GNU GPLv2 and later. - */ - -#ifndef BCM2835_AUX_H -#define BCM2835_AUX_H - -#include "hw/sysbus.h" -#include "sysemu/char.h" - -#define TYPE_BCM2835_AUX "bcm2835-aux" -#define BCM2835_AUX(obj) OBJECT_CHECK(BCM2835AuxState, (obj), TYPE_BCM2835_AUX) - -#define BCM2835_AUX_RX_FIFO_LEN 8 - -typedef struct { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - MemoryRegion iomem; - CharDriverState *chr; - qemu_irq irq; - - uint8_t read_fifo[BCM2835_AUX_RX_FIFO_LEN]; - uint8_t read_pos, read_count; - uint8_t ier, iir; -} BCM2835AuxState; - -#endif diff --git a/qemu/include/hw/char/cadence_uart.h b/qemu/include/hw/char/cadence_uart.h deleted file mode 100644 index 6310f5251..000000000 --- a/qemu/include/hw/char/cadence_uart.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Device model for Cadence UART - * - * Copyright (c) 2010 Xilinx Inc. - * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com) - * Copyright (c) 2012 PetaLogix Pty Ltd. - * Written by Haibing Ma - * M.Habib - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef CADENCE_UART_H - -#include "hw/sysbus.h" -#include "sysemu/char.h" -#include "qemu/timer.h" - -#define CADENCE_UART_RX_FIFO_SIZE 16 -#define CADENCE_UART_TX_FIFO_SIZE 16 - -#define CADENCE_UART_R_MAX (0x48/4) - -#define TYPE_CADENCE_UART "cadence_uart" -#define CADENCE_UART(obj) OBJECT_CHECK(CadenceUARTState, (obj), \ - TYPE_CADENCE_UART) - -typedef struct { - /*< private >*/ - SysBusDevice parent_obj; - - /*< public >*/ - MemoryRegion iomem; - uint32_t r[CADENCE_UART_R_MAX]; - uint8_t rx_fifo[CADENCE_UART_RX_FIFO_SIZE]; - uint8_t tx_fifo[CADENCE_UART_TX_FIFO_SIZE]; - uint32_t rx_wpos; - uint32_t rx_count; - uint32_t tx_count; - uint64_t char_tx_time; - CharDriverState *chr; - qemu_irq irq; - QEMUTimer *fifo_trigger_handle; -} CadenceUARTState; - -#define CADENCE_UART_H -#endif diff --git a/qemu/include/hw/char/digic-uart.h b/qemu/include/hw/char/digic-uart.h deleted file mode 100644 index 7b3f14537..000000000 --- a/qemu/include/hw/char/digic-uart.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Canon DIGIC UART block declarations. - * - * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef HW_CHAR_DIGIC_UART_H -#define HW_CHAR_DIGIC_UART_H - -#include "hw/sysbus.h" - -#define TYPE_DIGIC_UART "digic-uart" -#define DIGIC_UART(obj) \ - OBJECT_CHECK(DigicUartState, (obj), TYPE_DIGIC_UART) - -enum { - R_TX = 0x00, - R_RX, - R_ST = (0x14 >> 2), - R_MAX -}; - -typedef struct DigicUartState { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - MemoryRegion regs_region; - CharDriverState *chr; - - uint32_t reg_rx; - uint32_t reg_st; -} DigicUartState; - -#endif /* HW_CHAR_DIGIC_UART_H */ diff --git a/qemu/include/hw/char/escc.h b/qemu/include/hw/char/escc.h deleted file mode 100644 index 2742d70ea..000000000 --- a/qemu/include/hw/char/escc.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef HW_ESCC_H -#define HW_ESCC_H 1 - -/* escc.c */ -#define TYPE_ESCC "escc" -#define ESCC_SIZE 4 -MemoryRegion *escc_init(hwaddr base, qemu_irq irqA, qemu_irq irqB, - CharDriverState *chrA, CharDriverState *chrB, - int clock, int it_shift); - -void slavio_serial_ms_kbd_init(hwaddr base, qemu_irq irq, - int disabled, int clock, int it_shift); - -#endif diff --git a/qemu/include/hw/char/imx_serial.h b/qemu/include/hw/char/imx_serial.h deleted file mode 100644 index 6cd75c0ba..000000000 --- a/qemu/include/hw/char/imx_serial.h +++ /dev/null @@ -1,102 +0,0 @@ -/* - * Device model for i.MX UART - * - * Copyright (c) 2008 OKL - * Originally Written by Hans Jiang - * Copyright (c) 2011 NICTA Pty Ltd. - * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef IMX_SERIAL_H -#define IMX_SERIAL_H - -#include "hw/sysbus.h" - -#define TYPE_IMX_SERIAL "imx.serial" -#define IMX_SERIAL(obj) OBJECT_CHECK(IMXSerialState, (obj), TYPE_IMX_SERIAL) - -#define URXD_CHARRDY (1<<15) /* character read is valid */ -#define URXD_ERR (1<<14) /* Character has error */ -#define URXD_BRK (1<<11) /* Break received */ - -#define USR1_PARTYER (1<<15) /* Parity Error */ -#define USR1_RTSS (1<<14) /* RTS pin status */ -#define USR1_TRDY (1<<13) /* Tx ready */ -#define USR1_RTSD (1<<12) /* RTS delta: pin changed state */ -#define USR1_ESCF (1<<11) /* Escape sequence interrupt */ -#define USR1_FRAMERR (1<<10) /* Framing error */ -#define USR1_RRDY (1<<9) /* receiver ready */ -#define USR1_AGTIM (1<<8) /* Aging timer interrupt */ -#define USR1_DTRD (1<<7) /* DTR changed */ -#define USR1_RXDS (1<<6) /* Receiver is idle */ -#define USR1_AIRINT (1<<5) /* Aysnch IR interrupt */ -#define USR1_AWAKE (1<<4) /* Falling edge detected on RXd pin */ - -#define USR2_ADET (1<<15) /* Autobaud complete */ -#define USR2_TXFE (1<<14) /* Transmit FIFO empty */ -#define USR2_DTRF (1<<13) /* DTR/DSR transition */ -#define USR2_IDLE (1<<12) /* UART has been idle for too long */ -#define USR2_ACST (1<<11) /* Autobaud counter stopped */ -#define USR2_RIDELT (1<<10) /* Ring Indicator delta */ -#define USR2_RIIN (1<<9) /* Ring Indicator Input */ -#define USR2_IRINT (1<<8) /* Serial Infrared Interrupt */ -#define USR2_WAKE (1<<7) /* Start bit detected */ -#define USR2_DCDDELT (1<<6) /* Data Carrier Detect delta */ -#define USR2_DCDIN (1<<5) /* Data Carrier Detect Input */ -#define USR2_RTSF (1<<4) /* RTS transition */ -#define USR2_TXDC (1<<3) /* Transmission complete */ -#define USR2_BRCD (1<<2) /* Break condition detected */ -#define USR2_ORE (1<<1) /* Overrun error */ -#define USR2_RDR (1<<0) /* Receive data ready */ - -#define UCR1_TRDYEN (1<<13) /* Tx Ready Interrupt Enable */ -#define UCR1_RRDYEN (1<<9) /* Rx Ready Interrupt Enable */ -#define UCR1_TXMPTYEN (1<<6) /* Tx Empty Interrupt Enable */ -#define UCR1_UARTEN (1<<0) /* UART Enable */ - -#define UCR2_TXEN (1<<2) /* Transmitter enable */ -#define UCR2_RXEN (1<<1) /* Receiver enable */ -#define UCR2_SRST (1<<0) /* Reset complete */ - -#define UTS1_TXEMPTY (1<<6) -#define UTS1_RXEMPTY (1<<5) -#define UTS1_TXFULL (1<<4) -#define UTS1_RXFULL (1<<3) - -typedef struct IMXSerialState { - /*< private >*/ - SysBusDevice parent_obj; - - /*< public >*/ - MemoryRegion iomem; - int32_t readbuff; - - uint32_t usr1; - uint32_t usr2; - uint32_t ucr1; - uint32_t ucr2; - uint32_t uts1; - - /* - * The registers below are implemented just so that the - * guest OS sees what it has written - */ - uint32_t onems; - uint32_t ufcr; - uint32_t ubmr; - uint32_t ubrc; - uint32_t ucr3; - - qemu_irq irq; - CharDriverState *chr; -} IMXSerialState; - -#endif diff --git a/qemu/include/hw/char/lm32_juart.h b/qemu/include/hw/char/lm32_juart.h deleted file mode 100644 index 70dc416e9..000000000 --- a/qemu/include/hw/char/lm32_juart.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef QEMU_HW_CHAR_LM32_JUART_H -#define QEMU_HW_CHAR_LM32_JUART_H - -#include "hw/qdev.h" - -#define TYPE_LM32_JUART "lm32-juart" - -uint32_t lm32_juart_get_jtx(DeviceState *d); -uint32_t lm32_juart_get_jrx(DeviceState *d); -void lm32_juart_set_jtx(DeviceState *d, uint32_t jtx); -void lm32_juart_set_jrx(DeviceState *d, uint32_t jrx); - -#endif /* QEMU_HW_LM32_JUART_H */ diff --git a/qemu/include/hw/char/serial.h b/qemu/include/hw/char/serial.h deleted file mode 100644 index 15beb6b45..000000000 --- a/qemu/include/hw/char/serial.h +++ /dev/null @@ -1,97 +0,0 @@ -/* - * QEMU 16550A UART emulation - * - * Copyright (c) 2003-2004 Fabrice Bellard - * Copyright (c) 2008 Citrix Systems, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef HW_SERIAL_H -#define HW_SERIAL_H 1 - -#include "hw/hw.h" -#include "sysemu/sysemu.h" -#include "exec/memory.h" -#include "qemu/fifo8.h" - -#define UART_FIFO_LENGTH 16 /* 16550A Fifo Length */ - -struct SerialState { - uint16_t divider; - uint8_t rbr; /* receive register */ - uint8_t thr; /* transmit holding register */ - uint8_t tsr; /* transmit shift register */ - uint8_t ier; - uint8_t iir; /* read only */ - uint8_t lcr; - uint8_t mcr; - uint8_t lsr; /* read only */ - uint8_t msr; /* read only */ - uint8_t scr; - uint8_t fcr; - uint8_t fcr_vmstate; /* we can't write directly this value - it has side effects */ - /* NOTE: this hidden state is necessary for tx irq generation as - it can be reset while reading iir */ - int thr_ipending; - qemu_irq irq; - CharDriverState *chr; - int last_break_enable; - int it_shift; - int baudbase; - int tsr_retry; - uint32_t wakeup; - - /* Time when the last byte was successfully sent out of the tsr */ - uint64_t last_xmit_ts; - Fifo8 recv_fifo; - Fifo8 xmit_fifo; - /* Interrupt trigger level for recv_fifo */ - uint8_t recv_fifo_itl; - - QEMUTimer *fifo_timeout_timer; - int timeout_ipending; /* timeout interrupt pending state */ - - uint64_t char_transmit_time; /* time to transmit a char in ticks */ - int poll_msl; - - QEMUTimer *modem_status_poll; - MemoryRegion io; -}; - -extern const VMStateDescription vmstate_serial; -extern const MemoryRegionOps serial_io_ops; - -void serial_realize_core(SerialState *s, Error **errp); -void serial_exit_core(SerialState *s); -void serial_set_frequency(SerialState *s, uint32_t frequency); - -/* legacy pre qom */ -SerialState *serial_init(int base, qemu_irq irq, int baudbase, - CharDriverState *chr, MemoryRegion *system_io); -SerialState *serial_mm_init(MemoryRegion *address_space, - hwaddr base, int it_shift, - qemu_irq irq, int baudbase, - CharDriverState *chr, enum device_endian end); - -/* serial-isa.c */ -#define TYPE_ISA_SERIAL "isa-serial" -void serial_hds_isa_init(ISABus *bus, int n); - -#endif diff --git a/qemu/include/hw/char/stm32f2xx_usart.h b/qemu/include/hw/char/stm32f2xx_usart.h deleted file mode 100644 index b97f192a4..000000000 --- a/qemu/include/hw/char/stm32f2xx_usart.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * STM32F2XX USART - * - * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me> - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef HW_STM32F2XX_USART_H -#define HW_STM32F2XX_USART_H - -#include "hw/sysbus.h" -#include "sysemu/char.h" -#include "hw/hw.h" - -#define USART_SR 0x00 -#define USART_DR 0x04 -#define USART_BRR 0x08 -#define USART_CR1 0x0C -#define USART_CR2 0x10 -#define USART_CR3 0x14 -#define USART_GTPR 0x18 - -#define USART_SR_RESET 0x00C00000 - -#define USART_SR_TXE (1 << 7) -#define USART_SR_TC (1 << 6) -#define USART_SR_RXNE (1 << 5) - -#define USART_CR1_UE (1 << 13) -#define USART_CR1_RXNEIE (1 << 5) -#define USART_CR1_TE (1 << 3) -#define USART_CR1_RE (1 << 2) - -#define TYPE_STM32F2XX_USART "stm32f2xx-usart" -#define STM32F2XX_USART(obj) \ - OBJECT_CHECK(STM32F2XXUsartState, (obj), TYPE_STM32F2XX_USART) - -typedef struct { - /* <private> */ - SysBusDevice parent_obj; - - /* <public> */ - MemoryRegion mmio; - - uint32_t usart_sr; - uint32_t usart_dr; - uint32_t usart_brr; - uint32_t usart_cr1; - uint32_t usart_cr2; - uint32_t usart_cr3; - uint32_t usart_gtpr; - - CharDriverState *chr; - qemu_irq irq; -} STM32F2XXUsartState; -#endif /* HW_STM32F2XX_USART_H */ |