diff options
Diffstat (limited to 'qemu/gdb-xml')
-rw-r--r-- | qemu/gdb-xml/aarch64-core.xml | 46 | ||||
-rw-r--r-- | qemu/gdb-xml/aarch64-fpu.xml | 86 | ||||
-rw-r--r-- | qemu/gdb-xml/arm-core.xml | 31 | ||||
-rw-r--r-- | qemu/gdb-xml/arm-neon.xml | 88 | ||||
-rw-r--r-- | qemu/gdb-xml/arm-vfp.xml | 29 | ||||
-rw-r--r-- | qemu/gdb-xml/arm-vfp3.xml | 45 | ||||
-rw-r--r-- | qemu/gdb-xml/cf-core.xml | 29 | ||||
-rw-r--r-- | qemu/gdb-xml/cf-fp.xml | 22 | ||||
-rw-r--r-- | qemu/gdb-xml/power-altivec.xml | 57 | ||||
-rw-r--r-- | qemu/gdb-xml/power-core.xml | 49 | ||||
-rw-r--r-- | qemu/gdb-xml/power-fpu.xml | 44 | ||||
-rw-r--r-- | qemu/gdb-xml/power-spe.xml | 45 | ||||
-rw-r--r-- | qemu/gdb-xml/power64-core.xml | 49 | ||||
-rw-r--r-- | qemu/gdb-xml/s390-acr.xml | 26 | ||||
-rw-r--r-- | qemu/gdb-xml/s390-fpr.xml | 27 | ||||
-rw-r--r-- | qemu/gdb-xml/s390-vx.xml | 59 | ||||
-rw-r--r-- | qemu/gdb-xml/s390x-core64.xml | 28 |
17 files changed, 760 insertions, 0 deletions
diff --git a/qemu/gdb-xml/aarch64-core.xml b/qemu/gdb-xml/aarch64-core.xml new file mode 100644 index 000000000..e1e9dc3f9 --- /dev/null +++ b/qemu/gdb-xml/aarch64-core.xml @@ -0,0 +1,46 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2009-2012 Free Software Foundation, Inc. + Contributed by ARM Ltd. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.aarch64.core"> + <reg name="x0" bitsize="64"/> + <reg name="x1" bitsize="64"/> + <reg name="x2" bitsize="64"/> + <reg name="x3" bitsize="64"/> + <reg name="x4" bitsize="64"/> + <reg name="x5" bitsize="64"/> + <reg name="x6" bitsize="64"/> + <reg name="x7" bitsize="64"/> + <reg name="x8" bitsize="64"/> + <reg name="x9" bitsize="64"/> + <reg name="x10" bitsize="64"/> + <reg name="x11" bitsize="64"/> + <reg name="x12" bitsize="64"/> + <reg name="x13" bitsize="64"/> + <reg name="x14" bitsize="64"/> + <reg name="x15" bitsize="64"/> + <reg name="x16" bitsize="64"/> + <reg name="x17" bitsize="64"/> + <reg name="x18" bitsize="64"/> + <reg name="x19" bitsize="64"/> + <reg name="x20" bitsize="64"/> + <reg name="x21" bitsize="64"/> + <reg name="x22" bitsize="64"/> + <reg name="x23" bitsize="64"/> + <reg name="x24" bitsize="64"/> + <reg name="x25" bitsize="64"/> + <reg name="x26" bitsize="64"/> + <reg name="x27" bitsize="64"/> + <reg name="x28" bitsize="64"/> + <reg name="x29" bitsize="64"/> + <reg name="x30" bitsize="64"/> + <reg name="sp" bitsize="64" type="data_ptr"/> + + <reg name="pc" bitsize="64" type="code_ptr"/> + <reg name="cpsr" bitsize="32"/> +</feature> diff --git a/qemu/gdb-xml/aarch64-fpu.xml b/qemu/gdb-xml/aarch64-fpu.xml new file mode 100644 index 000000000..997197e5e --- /dev/null +++ b/qemu/gdb-xml/aarch64-fpu.xml @@ -0,0 +1,86 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2009-2012 Free Software Foundation, Inc. + Contributed by ARM Ltd. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.aarch64.fpu"> + <vector id="v2d" type="ieee_double" count="2"/> + <vector id="v2u" type="uint64" count="2"/> + <vector id="v2i" type="int64" count="2"/> + <vector id="v4f" type="ieee_single" count="4"/> + <vector id="v4u" type="uint32" count="4"/> + <vector id="v4i" type="int32" count="4"/> + <vector id="v8u" type="uint16" count="8"/> + <vector id="v8i" type="int16" count="8"/> + <vector id="v16u" type="uint8" count="16"/> + <vector id="v16i" type="int8" count="16"/> + <vector id="v1u" type="uint128" count="1"/> + <vector id="v1i" type="int128" count="1"/> + <union id="vnd"> + <field name="f" type="v2d"/> + <field name="u" type="v2u"/> + <field name="s" type="v2i"/> + </union> + <union id="vns"> + <field name="f" type="v4f"/> + <field name="u" type="v4u"/> + <field name="s" type="v4i"/> + </union> + <union id="vnh"> + <field name="u" type="v8u"/> + <field name="s" type="v8i"/> + </union> + <union id="vnb"> + <field name="u" type="v16u"/> + <field name="s" type="v16i"/> + </union> + <union id="vnq"> + <field name="u" type="v1u"/> + <field name="s" type="v1i"/> + </union> + <union id="aarch64v"> + <field name="d" type="vnd"/> + <field name="s" type="vns"/> + <field name="h" type="vnh"/> + <field name="b" type="vnb"/> + <field name="q" type="vnq"/> + </union> + <reg name="v0" bitsize="128" type="aarch64v" regnum="34"/> + <reg name="v1" bitsize="128" type="aarch64v" /> + <reg name="v2" bitsize="128" type="aarch64v" /> + <reg name="v3" bitsize="128" type="aarch64v" /> + <reg name="v4" bitsize="128" type="aarch64v" /> + <reg name="v5" bitsize="128" type="aarch64v" /> + <reg name="v6" bitsize="128" type="aarch64v" /> + <reg name="v7" bitsize="128" type="aarch64v" /> + <reg name="v8" bitsize="128" type="aarch64v" /> + <reg name="v9" bitsize="128" type="aarch64v" /> + <reg name="v10" bitsize="128" type="aarch64v"/> + <reg name="v11" bitsize="128" type="aarch64v"/> + <reg name="v12" bitsize="128" type="aarch64v"/> + <reg name="v13" bitsize="128" type="aarch64v"/> + <reg name="v14" bitsize="128" type="aarch64v"/> + <reg name="v15" bitsize="128" type="aarch64v"/> + <reg name="v16" bitsize="128" type="aarch64v"/> + <reg name="v17" bitsize="128" type="aarch64v"/> + <reg name="v18" bitsize="128" type="aarch64v"/> + <reg name="v19" bitsize="128" type="aarch64v"/> + <reg name="v20" bitsize="128" type="aarch64v"/> + <reg name="v21" bitsize="128" type="aarch64v"/> + <reg name="v22" bitsize="128" type="aarch64v"/> + <reg name="v23" bitsize="128" type="aarch64v"/> + <reg name="v24" bitsize="128" type="aarch64v"/> + <reg name="v25" bitsize="128" type="aarch64v"/> + <reg name="v26" bitsize="128" type="aarch64v"/> + <reg name="v27" bitsize="128" type="aarch64v"/> + <reg name="v28" bitsize="128" type="aarch64v"/> + <reg name="v29" bitsize="128" type="aarch64v"/> + <reg name="v30" bitsize="128" type="aarch64v"/> + <reg name="v31" bitsize="128" type="aarch64v"/> + <reg name="fpsr" bitsize="32"/> + <reg name="fpcr" bitsize="32"/> +</feature> diff --git a/qemu/gdb-xml/arm-core.xml b/qemu/gdb-xml/arm-core.xml new file mode 100644 index 000000000..6012f3456 --- /dev/null +++ b/qemu/gdb-xml/arm-core.xml @@ -0,0 +1,31 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.arm.core"> + <reg name="r0" bitsize="32"/> + <reg name="r1" bitsize="32"/> + <reg name="r2" bitsize="32"/> + <reg name="r3" bitsize="32"/> + <reg name="r4" bitsize="32"/> + <reg name="r5" bitsize="32"/> + <reg name="r6" bitsize="32"/> + <reg name="r7" bitsize="32"/> + <reg name="r8" bitsize="32"/> + <reg name="r9" bitsize="32"/> + <reg name="r10" bitsize="32"/> + <reg name="r11" bitsize="32"/> + <reg name="r12" bitsize="32"/> + <reg name="sp" bitsize="32" type="data_ptr"/> + <reg name="lr" bitsize="32"/> + <reg name="pc" bitsize="32" type="code_ptr"/> + + <!-- The CPSR is register 25, rather than register 16, because + the FPA registers historically were placed between the PC + and the CPSR in the "g" packet. --> + <reg name="cpsr" bitsize="32" regnum="25"/> +</feature> diff --git a/qemu/gdb-xml/arm-neon.xml b/qemu/gdb-xml/arm-neon.xml new file mode 100644 index 000000000..ce3ee03ec --- /dev/null +++ b/qemu/gdb-xml/arm-neon.xml @@ -0,0 +1,88 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.arm.vfp"> + <vector id="neon_uint8x8" type="uint8" count="8"/> + <vector id="neon_uint16x4" type="uint16" count="4"/> + <vector id="neon_uint32x2" type="uint32" count="2"/> + <vector id="neon_float32x2" type="ieee_single" count="2"/> + <union id="neon_d"> + <field name="u8" type="neon_uint8x8"/> + <field name="u16" type="neon_uint16x4"/> + <field name="u32" type="neon_uint32x2"/> + <field name="u64" type="uint64"/> + <field name="f32" type="neon_float32x2"/> + <field name="f64" type="ieee_double"/> + </union> + <vector id="neon_uint8x16" type="uint8" count="16"/> + <vector id="neon_uint16x8" type="uint16" count="8"/> + <vector id="neon_uint32x4" type="uint32" count="4"/> + <vector id="neon_uint64x2" type="uint64" count="2"/> + <vector id="neon_float32x4" type="ieee_single" count="4"/> + <vector id="neon_float64x2" type="ieee_double" count="2"/> + <union id="neon_q"> + <field name="u8" type="neon_uint8x16"/> + <field name="u16" type="neon_uint16x8"/> + <field name="u32" type="neon_uint32x4"/> + <field name="u64" type="neon_uint64x2"/> + <field name="f32" type="neon_float32x4"/> + <field name="f64" type="neon_float64x2"/> + </union> + <reg name="d0" bitsize="64" type="neon_d"/> + <reg name="d1" bitsize="64" type="neon_d"/> + <reg name="d2" bitsize="64" type="neon_d"/> + <reg name="d3" bitsize="64" type="neon_d"/> + <reg name="d4" bitsize="64" type="neon_d"/> + <reg name="d5" bitsize="64" type="neon_d"/> + <reg name="d6" bitsize="64" type="neon_d"/> + <reg name="d7" bitsize="64" type="neon_d"/> + <reg name="d8" bitsize="64" type="neon_d"/> + <reg name="d9" bitsize="64" type="neon_d"/> + <reg name="d10" bitsize="64" type="neon_d"/> + <reg name="d11" bitsize="64" type="neon_d"/> + <reg name="d12" bitsize="64" type="neon_d"/> + <reg name="d13" bitsize="64" type="neon_d"/> + <reg name="d14" bitsize="64" type="neon_d"/> + <reg name="d15" bitsize="64" type="neon_d"/> + <reg name="d16" bitsize="64" type="neon_d"/> + <reg name="d17" bitsize="64" type="neon_d"/> + <reg name="d18" bitsize="64" type="neon_d"/> + <reg name="d19" bitsize="64" type="neon_d"/> + <reg name="d20" bitsize="64" type="neon_d"/> + <reg name="d21" bitsize="64" type="neon_d"/> + <reg name="d22" bitsize="64" type="neon_d"/> + <reg name="d23" bitsize="64" type="neon_d"/> + <reg name="d24" bitsize="64" type="neon_d"/> + <reg name="d25" bitsize="64" type="neon_d"/> + <reg name="d26" bitsize="64" type="neon_d"/> + <reg name="d27" bitsize="64" type="neon_d"/> + <reg name="d28" bitsize="64" type="neon_d"/> + <reg name="d29" bitsize="64" type="neon_d"/> + <reg name="d30" bitsize="64" type="neon_d"/> + <reg name="d31" bitsize="64" type="neon_d"/> + + <reg name="q0" bitsize="128" type="neon_q"/> + <reg name="q1" bitsize="128" type="neon_q"/> + <reg name="q2" bitsize="128" type="neon_q"/> + <reg name="q3" bitsize="128" type="neon_q"/> + <reg name="q4" bitsize="128" type="neon_q"/> + <reg name="q5" bitsize="128" type="neon_q"/> + <reg name="q6" bitsize="128" type="neon_q"/> + <reg name="q7" bitsize="128" type="neon_q"/> + <reg name="q8" bitsize="128" type="neon_q"/> + <reg name="q9" bitsize="128" type="neon_q"/> + <reg name="q10" bitsize="128" type="neon_q"/> + <reg name="q10" bitsize="128" type="neon_q"/> + <reg name="q12" bitsize="128" type="neon_q"/> + <reg name="q13" bitsize="128" type="neon_q"/> + <reg name="q14" bitsize="128" type="neon_q"/> + <reg name="q15" bitsize="128" type="neon_q"/> + + <reg name="fpsid" bitsize="32" type="int" group="float"/> + <reg name="fpscr" bitsize="32" type="int" group="float"/> + <reg name="fpexc" bitsize="32" type="int" group="float"/> +</feature> diff --git a/qemu/gdb-xml/arm-vfp.xml b/qemu/gdb-xml/arm-vfp.xml new file mode 100644 index 000000000..b20881e9a --- /dev/null +++ b/qemu/gdb-xml/arm-vfp.xml @@ -0,0 +1,29 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.arm.vfp"> + <reg name="d0" bitsize="64" type="float"/> + <reg name="d1" bitsize="64" type="float"/> + <reg name="d2" bitsize="64" type="float"/> + <reg name="d3" bitsize="64" type="float"/> + <reg name="d4" bitsize="64" type="float"/> + <reg name="d5" bitsize="64" type="float"/> + <reg name="d6" bitsize="64" type="float"/> + <reg name="d7" bitsize="64" type="float"/> + <reg name="d8" bitsize="64" type="float"/> + <reg name="d9" bitsize="64" type="float"/> + <reg name="d10" bitsize="64" type="float"/> + <reg name="d11" bitsize="64" type="float"/> + <reg name="d12" bitsize="64" type="float"/> + <reg name="d13" bitsize="64" type="float"/> + <reg name="d14" bitsize="64" type="float"/> + <reg name="d15" bitsize="64" type="float"/> + + <reg name="fpsid" bitsize="32" type="int" group="float"/> + <reg name="fpscr" bitsize="32" type="int" group="float"/> + <reg name="fpexc" bitsize="32" type="int" group="float"/> +</feature> diff --git a/qemu/gdb-xml/arm-vfp3.xml b/qemu/gdb-xml/arm-vfp3.xml new file mode 100644 index 000000000..227afd801 --- /dev/null +++ b/qemu/gdb-xml/arm-vfp3.xml @@ -0,0 +1,45 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.arm.vfp"> + <reg name="d0" bitsize="64" type="float"/> + <reg name="d1" bitsize="64" type="float"/> + <reg name="d2" bitsize="64" type="float"/> + <reg name="d3" bitsize="64" type="float"/> + <reg name="d4" bitsize="64" type="float"/> + <reg name="d5" bitsize="64" type="float"/> + <reg name="d6" bitsize="64" type="float"/> + <reg name="d7" bitsize="64" type="float"/> + <reg name="d8" bitsize="64" type="float"/> + <reg name="d9" bitsize="64" type="float"/> + <reg name="d10" bitsize="64" type="float"/> + <reg name="d11" bitsize="64" type="float"/> + <reg name="d12" bitsize="64" type="float"/> + <reg name="d13" bitsize="64" type="float"/> + <reg name="d14" bitsize="64" type="float"/> + <reg name="d15" bitsize="64" type="float"/> + <reg name="d16" bitsize="64" type="float"/> + <reg name="d17" bitsize="64" type="float"/> + <reg name="d18" bitsize="64" type="float"/> + <reg name="d19" bitsize="64" type="float"/> + <reg name="d20" bitsize="64" type="float"/> + <reg name="d21" bitsize="64" type="float"/> + <reg name="d22" bitsize="64" type="float"/> + <reg name="d23" bitsize="64" type="float"/> + <reg name="d24" bitsize="64" type="float"/> + <reg name="d25" bitsize="64" type="float"/> + <reg name="d26" bitsize="64" type="float"/> + <reg name="d27" bitsize="64" type="float"/> + <reg name="d28" bitsize="64" type="float"/> + <reg name="d29" bitsize="64" type="float"/> + <reg name="d30" bitsize="64" type="float"/> + <reg name="d31" bitsize="64" type="float"/> + + <reg name="fpsid" bitsize="32" type="int" group="float"/> + <reg name="fpscr" bitsize="32" type="int" group="float"/> + <reg name="fpexc" bitsize="32" type="int" group="float"/> +</feature> diff --git a/qemu/gdb-xml/cf-core.xml b/qemu/gdb-xml/cf-core.xml new file mode 100644 index 000000000..b90af3042 --- /dev/null +++ b/qemu/gdb-xml/cf-core.xml @@ -0,0 +1,29 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.coldfire.core"> + <reg name="d0" bitsize="32"/> + <reg name="d1" bitsize="32"/> + <reg name="d2" bitsize="32"/> + <reg name="d3" bitsize="32"/> + <reg name="d4" bitsize="32"/> + <reg name="d5" bitsize="32"/> + <reg name="d6" bitsize="32"/> + <reg name="d7" bitsize="32"/> + <reg name="a0" bitsize="32" type="data_ptr"/> + <reg name="a1" bitsize="32" type="data_ptr"/> + <reg name="a2" bitsize="32" type="data_ptr"/> + <reg name="a3" bitsize="32" type="data_ptr"/> + <reg name="a4" bitsize="32" type="data_ptr"/> + <reg name="a5" bitsize="32" type="data_ptr"/> + <reg name="fp" bitsize="32" type="data_ptr"/> + <reg name="sp" bitsize="32" type="data_ptr"/> + + <reg name="ps" bitsize="32"/> + <reg name="pc" bitsize="32" type="code_ptr"/> + +</feature> diff --git a/qemu/gdb-xml/cf-fp.xml b/qemu/gdb-xml/cf-fp.xml new file mode 100644 index 000000000..bf71c320b --- /dev/null +++ b/qemu/gdb-xml/cf-fp.xml @@ -0,0 +1,22 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.coldfire.fp"> + <reg name="fp0" bitsize="64" type="float" group="float"/> + <reg name="fp1" bitsize="64" type="float" group="float"/> + <reg name="fp2" bitsize="64" type="float" group="float"/> + <reg name="fp3" bitsize="64" type="float" group="float"/> + <reg name="fp4" bitsize="64" type="float" group="float"/> + <reg name="fp5" bitsize="64" type="float" group="float"/> + <reg name="fp6" bitsize="64" type="float" group="float"/> + <reg name="fp7" bitsize="64" type="float" group="float"/> + + + <reg name="fpcontrol" bitsize="32" group="float"/> + <reg name="fpstatus" bitsize="32" group="float"/>, + <reg name="fpiaddr" bitsize="32" type="code_ptr" group="float"/> +</feature> diff --git a/qemu/gdb-xml/power-altivec.xml b/qemu/gdb-xml/power-altivec.xml new file mode 100644 index 000000000..84f4d27bc --- /dev/null +++ b/qemu/gdb-xml/power-altivec.xml @@ -0,0 +1,57 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.power.altivec"> + <vector id="v4f" type="ieee_single" count="4"/> + <vector id="v4i32" type="int32" count="4"/> + <vector id="v8i16" type="int16" count="8"/> + <vector id="v16i8" type="int8" count="16"/> + <union id="vec128"> + <field name="uint128" type="uint128"/> + <field name="v4_float" type="v4f"/> + <field name="v4_int32" type="v4i32"/> + <field name="v8_int16" type="v8i16"/> + <field name="v16_int8" type="v16i8"/> + </union> + + <reg name="vr0" bitsize="128" type="vec128"/> + <reg name="vr1" bitsize="128" type="vec128"/> + <reg name="vr2" bitsize="128" type="vec128"/> + <reg name="vr3" bitsize="128" type="vec128"/> + <reg name="vr4" bitsize="128" type="vec128"/> + <reg name="vr5" bitsize="128" type="vec128"/> + <reg name="vr6" bitsize="128" type="vec128"/> + <reg name="vr7" bitsize="128" type="vec128"/> + <reg name="vr8" bitsize="128" type="vec128"/> + <reg name="vr9" bitsize="128" type="vec128"/> + <reg name="vr10" bitsize="128" type="vec128"/> + <reg name="vr11" bitsize="128" type="vec128"/> + <reg name="vr12" bitsize="128" type="vec128"/> + <reg name="vr13" bitsize="128" type="vec128"/> + <reg name="vr14" bitsize="128" type="vec128"/> + <reg name="vr15" bitsize="128" type="vec128"/> + <reg name="vr16" bitsize="128" type="vec128"/> + <reg name="vr17" bitsize="128" type="vec128"/> + <reg name="vr18" bitsize="128" type="vec128"/> + <reg name="vr19" bitsize="128" type="vec128"/> + <reg name="vr20" bitsize="128" type="vec128"/> + <reg name="vr21" bitsize="128" type="vec128"/> + <reg name="vr22" bitsize="128" type="vec128"/> + <reg name="vr23" bitsize="128" type="vec128"/> + <reg name="vr24" bitsize="128" type="vec128"/> + <reg name="vr25" bitsize="128" type="vec128"/> + <reg name="vr26" bitsize="128" type="vec128"/> + <reg name="vr27" bitsize="128" type="vec128"/> + <reg name="vr28" bitsize="128" type="vec128"/> + <reg name="vr29" bitsize="128" type="vec128"/> + <reg name="vr30" bitsize="128" type="vec128"/> + <reg name="vr31" bitsize="128" type="vec128"/> + + <reg name="vscr" bitsize="32" group="vector"/> + <reg name="vrsave" bitsize="32" group="vector"/> +</feature> diff --git a/qemu/gdb-xml/power-core.xml b/qemu/gdb-xml/power-core.xml new file mode 100644 index 000000000..0c69e8c8a --- /dev/null +++ b/qemu/gdb-xml/power-core.xml @@ -0,0 +1,49 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.power.core"> + <reg name="r0" bitsize="32" type="uint32"/> + <reg name="r1" bitsize="32" type="uint32"/> + <reg name="r2" bitsize="32" type="uint32"/> + <reg name="r3" bitsize="32" type="uint32"/> + <reg name="r4" bitsize="32" type="uint32"/> + <reg name="r5" bitsize="32" type="uint32"/> + <reg name="r6" bitsize="32" type="uint32"/> + <reg name="r7" bitsize="32" type="uint32"/> + <reg name="r8" bitsize="32" type="uint32"/> + <reg name="r9" bitsize="32" type="uint32"/> + <reg name="r10" bitsize="32" type="uint32"/> + <reg name="r11" bitsize="32" type="uint32"/> + <reg name="r12" bitsize="32" type="uint32"/> + <reg name="r13" bitsize="32" type="uint32"/> + <reg name="r14" bitsize="32" type="uint32"/> + <reg name="r15" bitsize="32" type="uint32"/> + <reg name="r16" bitsize="32" type="uint32"/> + <reg name="r17" bitsize="32" type="uint32"/> + <reg name="r18" bitsize="32" type="uint32"/> + <reg name="r19" bitsize="32" type="uint32"/> + <reg name="r20" bitsize="32" type="uint32"/> + <reg name="r21" bitsize="32" type="uint32"/> + <reg name="r22" bitsize="32" type="uint32"/> + <reg name="r23" bitsize="32" type="uint32"/> + <reg name="r24" bitsize="32" type="uint32"/> + <reg name="r25" bitsize="32" type="uint32"/> + <reg name="r26" bitsize="32" type="uint32"/> + <reg name="r27" bitsize="32" type="uint32"/> + <reg name="r28" bitsize="32" type="uint32"/> + <reg name="r29" bitsize="32" type="uint32"/> + <reg name="r30" bitsize="32" type="uint32"/> + <reg name="r31" bitsize="32" type="uint32"/> + + <reg name="pc" bitsize="32" type="code_ptr" regnum="64"/> + <reg name="msr" bitsize="32" type="uint32"/> + <reg name="cr" bitsize="32" type="uint32"/> + <reg name="lr" bitsize="32" type="code_ptr"/> + <reg name="ctr" bitsize="32" type="uint32"/> + <reg name="xer" bitsize="32" type="uint32"/> +</feature> diff --git a/qemu/gdb-xml/power-fpu.xml b/qemu/gdb-xml/power-fpu.xml new file mode 100644 index 000000000..38705515d --- /dev/null +++ b/qemu/gdb-xml/power-fpu.xml @@ -0,0 +1,44 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.power.fpu"> + <reg name="f0" bitsize="64" type="ieee_double" regnum="71"/> + <reg name="f1" bitsize="64" type="ieee_double"/> + <reg name="f2" bitsize="64" type="ieee_double"/> + <reg name="f3" bitsize="64" type="ieee_double"/> + <reg name="f4" bitsize="64" type="ieee_double"/> + <reg name="f5" bitsize="64" type="ieee_double"/> + <reg name="f6" bitsize="64" type="ieee_double"/> + <reg name="f7" bitsize="64" type="ieee_double"/> + <reg name="f8" bitsize="64" type="ieee_double"/> + <reg name="f9" bitsize="64" type="ieee_double"/> + <reg name="f10" bitsize="64" type="ieee_double"/> + <reg name="f11" bitsize="64" type="ieee_double"/> + <reg name="f12" bitsize="64" type="ieee_double"/> + <reg name="f13" bitsize="64" type="ieee_double"/> + <reg name="f14" bitsize="64" type="ieee_double"/> + <reg name="f15" bitsize="64" type="ieee_double"/> + <reg name="f16" bitsize="64" type="ieee_double"/> + <reg name="f17" bitsize="64" type="ieee_double"/> + <reg name="f18" bitsize="64" type="ieee_double"/> + <reg name="f19" bitsize="64" type="ieee_double"/> + <reg name="f20" bitsize="64" type="ieee_double"/> + <reg name="f21" bitsize="64" type="ieee_double"/> + <reg name="f22" bitsize="64" type="ieee_double"/> + <reg name="f23" bitsize="64" type="ieee_double"/> + <reg name="f24" bitsize="64" type="ieee_double"/> + <reg name="f25" bitsize="64" type="ieee_double"/> + <reg name="f26" bitsize="64" type="ieee_double"/> + <reg name="f27" bitsize="64" type="ieee_double"/> + <reg name="f28" bitsize="64" type="ieee_double"/> + <reg name="f29" bitsize="64" type="ieee_double"/> + <reg name="f30" bitsize="64" type="ieee_double"/> + <reg name="f31" bitsize="64" type="ieee_double"/> + + <reg name="fpscr" bitsize="32" group="float"/> +</feature> diff --git a/qemu/gdb-xml/power-spe.xml b/qemu/gdb-xml/power-spe.xml new file mode 100644 index 000000000..57740cc5c --- /dev/null +++ b/qemu/gdb-xml/power-spe.xml @@ -0,0 +1,45 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.power.spe"> + <reg name="ev0h" bitsize="32" regnum="71"/> + <reg name="ev1h" bitsize="32"/> + <reg name="ev2h" bitsize="32"/> + <reg name="ev3h" bitsize="32"/> + <reg name="ev4h" bitsize="32"/> + <reg name="ev5h" bitsize="32"/> + <reg name="ev6h" bitsize="32"/> + <reg name="ev7h" bitsize="32"/> + <reg name="ev8h" bitsize="32"/> + <reg name="ev9h" bitsize="32"/> + <reg name="ev10h" bitsize="32"/> + <reg name="ev11h" bitsize="32"/> + <reg name="ev12h" bitsize="32"/> + <reg name="ev13h" bitsize="32"/> + <reg name="ev14h" bitsize="32"/> + <reg name="ev15h" bitsize="32"/> + <reg name="ev16h" bitsize="32"/> + <reg name="ev17h" bitsize="32"/> + <reg name="ev18h" bitsize="32"/> + <reg name="ev19h" bitsize="32"/> + <reg name="ev20h" bitsize="32"/> + <reg name="ev21h" bitsize="32"/> + <reg name="ev22h" bitsize="32"/> + <reg name="ev23h" bitsize="32"/> + <reg name="ev24h" bitsize="32"/> + <reg name="ev25h" bitsize="32"/> + <reg name="ev26h" bitsize="32"/> + <reg name="ev27h" bitsize="32"/> + <reg name="ev28h" bitsize="32"/> + <reg name="ev29h" bitsize="32"/> + <reg name="ev30h" bitsize="32"/> + <reg name="ev31h" bitsize="32"/> + + <reg name="acc" bitsize="64"/> + <reg name="spefscr" bitsize="32"/> +</feature> diff --git a/qemu/gdb-xml/power64-core.xml b/qemu/gdb-xml/power64-core.xml new file mode 100644 index 000000000..6cc153120 --- /dev/null +++ b/qemu/gdb-xml/power64-core.xml @@ -0,0 +1,49 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.power.core"> + <reg name="r0" bitsize="64" type="uint64"/> + <reg name="r1" bitsize="64" type="uint64"/> + <reg name="r2" bitsize="64" type="uint64"/> + <reg name="r3" bitsize="64" type="uint64"/> + <reg name="r4" bitsize="64" type="uint64"/> + <reg name="r5" bitsize="64" type="uint64"/> + <reg name="r6" bitsize="64" type="uint64"/> + <reg name="r7" bitsize="64" type="uint64"/> + <reg name="r8" bitsize="64" type="uint64"/> + <reg name="r9" bitsize="64" type="uint64"/> + <reg name="r10" bitsize="64" type="uint64"/> + <reg name="r11" bitsize="64" type="uint64"/> + <reg name="r12" bitsize="64" type="uint64"/> + <reg name="r13" bitsize="64" type="uint64"/> + <reg name="r14" bitsize="64" type="uint64"/> + <reg name="r15" bitsize="64" type="uint64"/> + <reg name="r16" bitsize="64" type="uint64"/> + <reg name="r17" bitsize="64" type="uint64"/> + <reg name="r18" bitsize="64" type="uint64"/> + <reg name="r19" bitsize="64" type="uint64"/> + <reg name="r20" bitsize="64" type="uint64"/> + <reg name="r21" bitsize="64" type="uint64"/> + <reg name="r22" bitsize="64" type="uint64"/> + <reg name="r23" bitsize="64" type="uint64"/> + <reg name="r24" bitsize="64" type="uint64"/> + <reg name="r25" bitsize="64" type="uint64"/> + <reg name="r26" bitsize="64" type="uint64"/> + <reg name="r27" bitsize="64" type="uint64"/> + <reg name="r28" bitsize="64" type="uint64"/> + <reg name="r29" bitsize="64" type="uint64"/> + <reg name="r30" bitsize="64" type="uint64"/> + <reg name="r31" bitsize="64" type="uint64"/> + + <reg name="pc" bitsize="64" type="code_ptr" regnum="64"/> + <reg name="msr" bitsize="64" type="uint64"/> + <reg name="cr" bitsize="32" type="uint32"/> + <reg name="lr" bitsize="64" type="code_ptr"/> + <reg name="ctr" bitsize="64" type="uint64"/> + <reg name="xer" bitsize="32" type="uint32"/> +</feature> diff --git a/qemu/gdb-xml/s390-acr.xml b/qemu/gdb-xml/s390-acr.xml new file mode 100644 index 000000000..71dfb2052 --- /dev/null +++ b/qemu/gdb-xml/s390-acr.xml @@ -0,0 +1,26 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2010-2014 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.s390.acr"> + <reg name="acr0" bitsize="32" type="uint32" group="access"/> + <reg name="acr1" bitsize="32" type="uint32" group="access"/> + <reg name="acr2" bitsize="32" type="uint32" group="access"/> + <reg name="acr3" bitsize="32" type="uint32" group="access"/> + <reg name="acr4" bitsize="32" type="uint32" group="access"/> + <reg name="acr5" bitsize="32" type="uint32" group="access"/> + <reg name="acr6" bitsize="32" type="uint32" group="access"/> + <reg name="acr7" bitsize="32" type="uint32" group="access"/> + <reg name="acr8" bitsize="32" type="uint32" group="access"/> + <reg name="acr9" bitsize="32" type="uint32" group="access"/> + <reg name="acr10" bitsize="32" type="uint32" group="access"/> + <reg name="acr11" bitsize="32" type="uint32" group="access"/> + <reg name="acr12" bitsize="32" type="uint32" group="access"/> + <reg name="acr13" bitsize="32" type="uint32" group="access"/> + <reg name="acr14" bitsize="32" type="uint32" group="access"/> + <reg name="acr15" bitsize="32" type="uint32" group="access"/> +</feature> diff --git a/qemu/gdb-xml/s390-fpr.xml b/qemu/gdb-xml/s390-fpr.xml new file mode 100644 index 000000000..7de0c136a --- /dev/null +++ b/qemu/gdb-xml/s390-fpr.xml @@ -0,0 +1,27 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2010-2014 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.s390.fpr"> + <reg name="fpc" bitsize="32" type="uint32" group="float"/> + <reg name="f0" bitsize="64" type="ieee_double" group="float"/> + <reg name="f1" bitsize="64" type="ieee_double" group="float"/> + <reg name="f2" bitsize="64" type="ieee_double" group="float"/> + <reg name="f3" bitsize="64" type="ieee_double" group="float"/> + <reg name="f4" bitsize="64" type="ieee_double" group="float"/> + <reg name="f5" bitsize="64" type="ieee_double" group="float"/> + <reg name="f6" bitsize="64" type="ieee_double" group="float"/> + <reg name="f7" bitsize="64" type="ieee_double" group="float"/> + <reg name="f8" bitsize="64" type="ieee_double" group="float"/> + <reg name="f9" bitsize="64" type="ieee_double" group="float"/> + <reg name="f10" bitsize="64" type="ieee_double" group="float"/> + <reg name="f11" bitsize="64" type="ieee_double" group="float"/> + <reg name="f12" bitsize="64" type="ieee_double" group="float"/> + <reg name="f13" bitsize="64" type="ieee_double" group="float"/> + <reg name="f14" bitsize="64" type="ieee_double" group="float"/> + <reg name="f15" bitsize="64" type="ieee_double" group="float"/> +</feature> diff --git a/qemu/gdb-xml/s390-vx.xml b/qemu/gdb-xml/s390-vx.xml new file mode 100644 index 000000000..8239c116c --- /dev/null +++ b/qemu/gdb-xml/s390-vx.xml @@ -0,0 +1,59 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2010-2014 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.s390.vx"> + <vector id="v4f" type="ieee_single" count="4"/> + <vector id="v2d" type="ieee_double" count="2"/> + <vector id="v16i8" type="int8" count="16"/> + <vector id="v8i16" type="int16" count="8"/> + <vector id="v4i32" type="int32" count="4"/> + <vector id="v2i64" type="int64" count="2"/> + <union id="vec128"> + <field name="v4_float" type="v4f"/> + <field name="v2_double" type="v2d"/> + <field name="v16_int8" type="v16i8"/> + <field name="v8_int16" type="v8i16"/> + <field name="v4_int32" type="v4i32"/> + <field name="v2_int64" type="v2i64"/> + <field name="uint128" type="uint128"/> + </union> + + <reg name="v0l" bitsize="64" type="uint64"/> + <reg name="v1l" bitsize="64" type="uint64"/> + <reg name="v2l" bitsize="64" type="uint64"/> + <reg name="v3l" bitsize="64" type="uint64"/> + <reg name="v4l" bitsize="64" type="uint64"/> + <reg name="v5l" bitsize="64" type="uint64"/> + <reg name="v6l" bitsize="64" type="uint64"/> + <reg name="v7l" bitsize="64" type="uint64"/> + <reg name="v8l" bitsize="64" type="uint64"/> + <reg name="v9l" bitsize="64" type="uint64"/> + <reg name="v10l" bitsize="64" type="uint64"/> + <reg name="v11l" bitsize="64" type="uint64"/> + <reg name="v12l" bitsize="64" type="uint64"/> + <reg name="v13l" bitsize="64" type="uint64"/> + <reg name="v14l" bitsize="64" type="uint64"/> + <reg name="v15l" bitsize="64" type="uint64"/> + + <reg name="v16" bitsize="128" type="vec128"/> + <reg name="v17" bitsize="128" type="vec128"/> + <reg name="v18" bitsize="128" type="vec128"/> + <reg name="v19" bitsize="128" type="vec128"/> + <reg name="v20" bitsize="128" type="vec128"/> + <reg name="v21" bitsize="128" type="vec128"/> + <reg name="v22" bitsize="128" type="vec128"/> + <reg name="v23" bitsize="128" type="vec128"/> + <reg name="v24" bitsize="128" type="vec128"/> + <reg name="v25" bitsize="128" type="vec128"/> + <reg name="v26" bitsize="128" type="vec128"/> + <reg name="v27" bitsize="128" type="vec128"/> + <reg name="v28" bitsize="128" type="vec128"/> + <reg name="v29" bitsize="128" type="vec128"/> + <reg name="v30" bitsize="128" type="vec128"/> + <reg name="v31" bitsize="128" type="vec128"/> +</feature> diff --git a/qemu/gdb-xml/s390x-core64.xml b/qemu/gdb-xml/s390x-core64.xml new file mode 100644 index 000000000..15234378e --- /dev/null +++ b/qemu/gdb-xml/s390x-core64.xml @@ -0,0 +1,28 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2010-2014 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.s390.core"> + <reg name="pswm" bitsize="64" type="uint64" group="psw"/> + <reg name="pswa" bitsize="64" type="uint64" group="psw"/> + <reg name="r0" bitsize="64" type="uint64" group="general"/> + <reg name="r1" bitsize="64" type="uint64" group="general"/> + <reg name="r2" bitsize="64" type="uint64" group="general"/> + <reg name="r3" bitsize="64" type="uint64" group="general"/> + <reg name="r4" bitsize="64" type="uint64" group="general"/> + <reg name="r5" bitsize="64" type="uint64" group="general"/> + <reg name="r6" bitsize="64" type="uint64" group="general"/> + <reg name="r7" bitsize="64" type="uint64" group="general"/> + <reg name="r8" bitsize="64" type="uint64" group="general"/> + <reg name="r9" bitsize="64" type="uint64" group="general"/> + <reg name="r10" bitsize="64" type="uint64" group="general"/> + <reg name="r11" bitsize="64" type="uint64" group="general"/> + <reg name="r12" bitsize="64" type="uint64" group="general"/> + <reg name="r13" bitsize="64" type="uint64" group="general"/> + <reg name="r14" bitsize="64" type="uint64" group="general"/> + <reg name="r15" bitsize="64" type="uint64" group="general"/> +</feature> |