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-rw-r--r--kernel/include/uapi/drm/i915_drm.h8
-rw-r--r--kernel/include/uapi/linux/pci_regs.h1
2 files changed, 9 insertions, 0 deletions
diff --git a/kernel/include/uapi/drm/i915_drm.h b/kernel/include/uapi/drm/i915_drm.h
index 551b6737f..a7e41fb6e 100644
--- a/kernel/include/uapi/drm/i915_drm.h
+++ b/kernel/include/uapi/drm/i915_drm.h
@@ -1065,6 +1065,14 @@ struct drm_i915_reg_read {
__u64 offset;
__u64 val; /* Return value */
};
+/* Known registers:
+ *
+ * Render engine timestamp - 0x2358 + 64bit - gen7+
+ * - Note this register returns an invalid value if using the default
+ * single instruction 8byte read, in order to workaround that use
+ * offset (0x2538 | 1) instead.
+ *
+ */
struct drm_i915_reset_stats {
__u32 ctx_id;
diff --git a/kernel/include/uapi/linux/pci_regs.h b/kernel/include/uapi/linux/pci_regs.h
index efe344357..413417f37 100644
--- a/kernel/include/uapi/linux/pci_regs.h
+++ b/kernel/include/uapi/linux/pci_regs.h
@@ -319,6 +319,7 @@
#define PCI_MSIX_PBA 8 /* Pending Bit Array offset */
#define PCI_MSIX_PBA_BIR 0x00000007 /* BAR index */
#define PCI_MSIX_PBA_OFFSET 0xfffffff8 /* Offset into specified BAR */
+#define PCI_MSIX_FLAGS_BIRMASK PCI_MSIX_PBA_BIR /* deprecated */
#define PCI_CAP_MSIX_SIZEOF 12 /* size of MSIX registers */
/* MSI-X Table entry format */