diff options
Diffstat (limited to 'kernel/drivers/vme')
| -rw-r--r-- | kernel/drivers/vme/bridges/Kconfig | 2 | ||||
| -rw-r--r-- | kernel/drivers/vme/bridges/vme_ca91cx42.c | 23 | ||||
| -rw-r--r-- | kernel/drivers/vme/bridges/vme_ca91cx42.h | 2 | ||||
| -rw-r--r-- | kernel/drivers/vme/bridges/vme_tsi148.c | 214 | ||||
| -rw-r--r-- | kernel/drivers/vme/vme.c | 101 | ||||
| -rw-r--r-- | kernel/drivers/vme/vme_bridge.h | 25 |
6 files changed, 208 insertions, 159 deletions
diff --git a/kernel/drivers/vme/bridges/Kconfig b/kernel/drivers/vme/bridges/Kconfig index 9331064e0..f6d854584 100644 --- a/kernel/drivers/vme/bridges/Kconfig +++ b/kernel/drivers/vme/bridges/Kconfig @@ -9,7 +9,7 @@ config VME_CA91CX42 config VME_TSI148 tristate "Tempe" - depends on VIRT_TO_BUS + depends on HAS_DMA help If you say Y here you get support for the Tundra TSI148 VME bridge chip. diff --git a/kernel/drivers/vme/bridges/vme_ca91cx42.c b/kernel/drivers/vme/bridges/vme_ca91cx42.c index 18078ecbf..b79a74a98 100644 --- a/kernel/drivers/vme/bridges/vme_ca91cx42.c +++ b/kernel/drivers/vme/bridges/vme_ca91cx42.c @@ -204,8 +204,7 @@ static int ca91cx42_irq_init(struct vme_bridge *ca91cx42_bridge) /* Need pdev */ pdev = container_of(ca91cx42_bridge->parent, struct pci_dev, dev); - /* Initialise list for VME bus errors */ - INIT_LIST_HEAD(&ca91cx42_bridge->vme_errors); + INIT_LIST_HEAD(&ca91cx42_bridge->vme_error_handlers); mutex_init(&ca91cx42_bridge->irq_mtx); @@ -554,7 +553,7 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image, image->bus_resource.flags = IORESOURCE_MEM; retval = pci_bus_alloc_resource(pdev->bus, - &image->bus_resource, size, size, PCIBIOS_MIN_MEM, + &image->bus_resource, size, 0x10000, PCIBIOS_MIN_MEM, 0, NULL, NULL); if (retval) { dev_err(ca91cx42_bridge->parent, "Failed to allocate mem " @@ -1192,7 +1191,7 @@ static int ca91cx42_dma_list_exec(struct vme_dma_list *list) { struct vme_dma_resource *ctrlr; struct ca91cx42_dma_entry *entry; - int retval = 0; + int retval; dma_addr_t bus_addr; u32 val; struct device *dev; @@ -1245,8 +1244,18 @@ static int ca91cx42_dma_list_exec(struct vme_dma_list *list) iowrite32(val, bridge->base + DGCS); - wait_event_interruptible(bridge->dma_queue, - ca91cx42_dma_busy(ctrlr->parent)); + retval = wait_event_interruptible(bridge->dma_queue, + ca91cx42_dma_busy(ctrlr->parent)); + + if (retval) { + val = ioread32(bridge->base + DGCS); + iowrite32(val | CA91CX42_DGCS_STOP_REQ, bridge->base + DGCS); + /* Wait for the operation to abort */ + wait_event(bridge->dma_queue, + ca91cx42_dma_busy(ctrlr->parent)); + retval = -EINTR; + goto exit; + } /* * Read status register, this register is valid until we kick off a @@ -1259,8 +1268,10 @@ static int ca91cx42_dma_list_exec(struct vme_dma_list *list) dev_err(dev, "ca91c042: DMA Error. DGCS=%08X\n", val); val = ioread32(bridge->base + DCTL); + retval = -EIO; } +exit: /* Remove list from running list */ mutex_lock(&ctrlr->mtx); list_del(&list->list); diff --git a/kernel/drivers/vme/bridges/vme_ca91cx42.h b/kernel/drivers/vme/bridges/vme_ca91cx42.h index d46b12dc3..d54119e59 100644 --- a/kernel/drivers/vme/bridges/vme_ca91cx42.h +++ b/kernel/drivers/vme/bridges/vme_ca91cx42.h @@ -547,7 +547,7 @@ static const int CA91CX42_LINT_LM[] = { CA91CX42_LINT_LM0, CA91CX42_LINT_LM1, #define CA91CX42_LM_CTL_DATA (1<<22) #define CA91CX42_LM_CTL_SUPR (1<<21) #define CA91CX42_LM_CTL_NPRIV (1<<20) -#define CA91CX42_LM_CTL_AS_M (5<<16) +#define CA91CX42_LM_CTL_AS_M (7<<16) #define CA91CX42_LM_CTL_AS_A16 0 #define CA91CX42_LM_CTL_AS_A24 (1<<16) #define CA91CX42_LM_CTL_AS_A32 (1<<17) diff --git a/kernel/drivers/vme/bridges/vme_tsi148.c b/kernel/drivers/vme/bridges/vme_tsi148.c index 895c2a319..60524834d 100644 --- a/kernel/drivers/vme/bridges/vme_tsi148.c +++ b/kernel/drivers/vme/bridges/vme_tsi148.c @@ -169,7 +169,7 @@ static u32 tsi148_VERR_irqhandler(struct vme_bridge *tsi148_bridge) unsigned int error_addr_high, error_addr_low; unsigned long long error_addr; u32 error_attrib; - struct vme_bus_error *error = NULL; + int error_am; struct tsi148_driver *bridge; bridge = tsi148_bridge->driver_priv; @@ -177,6 +177,7 @@ static u32 tsi148_VERR_irqhandler(struct vme_bridge *tsi148_bridge) error_addr_high = ioread32be(bridge->base + TSI148_LCSR_VEAU); error_addr_low = ioread32be(bridge->base + TSI148_LCSR_VEAL); error_attrib = ioread32be(bridge->base + TSI148_LCSR_VEAT); + error_am = (error_attrib & TSI148_LCSR_VEAT_AM_M) >> 8; reg_join(error_addr_high, error_addr_low, &error_addr); @@ -186,23 +187,12 @@ static u32 tsi148_VERR_irqhandler(struct vme_bridge *tsi148_bridge) "Occurred\n"); } - if (err_chk) { - error = kmalloc(sizeof(struct vme_bus_error), GFP_ATOMIC); - if (error) { - error->address = error_addr; - error->attributes = error_attrib; - list_add_tail(&error->list, &tsi148_bridge->vme_errors); - } else { - dev_err(tsi148_bridge->parent, - "Unable to alloc memory for VMEbus Error reporting\n"); - } - } - - if (!error) { + if (err_chk) + vme_bus_error_handler(tsi148_bridge, error_addr, error_am); + else dev_err(tsi148_bridge->parent, "VME Bus Error at address: 0x%llx, attributes: %08x\n", error_addr, error_attrib); - } /* Clear Status */ iowrite32be(TSI148_LCSR_VEAT_VESCL, bridge->base + TSI148_LCSR_VEAT); @@ -324,8 +314,7 @@ static int tsi148_irq_init(struct vme_bridge *tsi148_bridge) bridge = tsi148_bridge->driver_priv; - /* Initialise list for VME bus errors */ - INIT_LIST_HEAD(&tsi148_bridge->vme_errors); + INIT_LIST_HEAD(&tsi148_bridge->vme_error_handlers); mutex_init(&tsi148_bridge->irq_mtx); @@ -483,73 +472,6 @@ static int tsi148_irq_generate(struct vme_bridge *tsi148_bridge, int level, } /* - * Find the first error in this address range - */ -static struct vme_bus_error *tsi148_find_error(struct vme_bridge *tsi148_bridge, - u32 aspace, unsigned long long address, size_t count) -{ - struct list_head *err_pos; - struct vme_bus_error *vme_err, *valid = NULL; - unsigned long long bound; - - bound = address + count; - - /* - * XXX We are currently not looking at the address space when parsing - * for errors. This is because parsing the Address Modifier Codes - * is going to be quite resource intensive to do properly. We - * should be OK just looking at the addresses and this is certainly - * much better than what we had before. - */ - err_pos = NULL; - /* Iterate through errors */ - list_for_each(err_pos, &tsi148_bridge->vme_errors) { - vme_err = list_entry(err_pos, struct vme_bus_error, list); - if ((vme_err->address >= address) && - (vme_err->address < bound)) { - - valid = vme_err; - break; - } - } - - return valid; -} - -/* - * Clear errors in the provided address range. - */ -static void tsi148_clear_errors(struct vme_bridge *tsi148_bridge, - u32 aspace, unsigned long long address, size_t count) -{ - struct list_head *err_pos, *temp; - struct vme_bus_error *vme_err; - unsigned long long bound; - - bound = address + count; - - /* - * XXX We are currently not looking at the address space when parsing - * for errors. This is because parsing the Address Modifier Codes - * is going to be quite resource intensive to do properly. We - * should be OK just looking at the addresses and this is certainly - * much better than what we had before. - */ - err_pos = NULL; - /* Iterate through errors */ - list_for_each_safe(err_pos, temp, &tsi148_bridge->vme_errors) { - vme_err = list_entry(err_pos, struct vme_bus_error, list); - - if ((vme_err->address >= address) && - (vme_err->address < bound)) { - - list_del(err_pos); - kfree(vme_err); - } - } -} - -/* * Initialize a slave window with the requested attributes. */ static int tsi148_slave_set(struct vme_slave_resource *image, int enabled, @@ -846,7 +768,7 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, image->bus_resource.flags = IORESOURCE_MEM; retval = pci_bus_alloc_resource(pdev->bus, - &image->bus_resource, size, size, PCIBIOS_MIN_MEM, + &image->bus_resource, size, 0x10000, PCIBIOS_MIN_MEM, 0, NULL, NULL); if (retval) { dev_err(tsi148_bridge->parent, "Failed to allocate mem " @@ -1264,7 +1186,7 @@ static ssize_t tsi148_master_read(struct vme_master_resource *image, void *buf, int retval, enabled; unsigned long long vme_base, size; u32 aspace, cycle, dwidth; - struct vme_bus_error *vme_err = NULL; + struct vme_error_handler *handler = NULL; struct vme_bridge *tsi148_bridge; void __iomem *addr = image->kern_base + offset; unsigned int done = 0; @@ -1274,6 +1196,17 @@ static ssize_t tsi148_master_read(struct vme_master_resource *image, void *buf, spin_lock(&image->lock); + if (err_chk) { + __tsi148_master_get(image, &enabled, &vme_base, &size, &aspace, + &cycle, &dwidth); + handler = vme_register_error_handler(tsi148_bridge, aspace, + vme_base + offset, count); + if (!handler) { + spin_unlock(&image->lock); + return -ENOMEM; + } + } + /* The following code handles VME address alignment. We cannot use * memcpy_xxx here because it may cut data transfers in to 8-bit * cycles when D16 or D32 cycles are required on the VME bus. @@ -1317,24 +1250,16 @@ static ssize_t tsi148_master_read(struct vme_master_resource *image, void *buf, out: retval = count; - if (!err_chk) - goto skip_chk; - - __tsi148_master_get(image, &enabled, &vme_base, &size, &aspace, &cycle, - &dwidth); - - vme_err = tsi148_find_error(tsi148_bridge, aspace, vme_base + offset, - count); - if (vme_err != NULL) { - dev_err(image->parent->parent, "First VME read error detected " - "an at address 0x%llx\n", vme_err->address); - retval = vme_err->address - (vme_base + offset); - /* Clear down save errors in this address range */ - tsi148_clear_errors(tsi148_bridge, aspace, vme_base + offset, - count); + if (err_chk) { + if (handler->num_errors) { + dev_err(image->parent->parent, + "First VME read error detected an at address 0x%llx\n", + handler->first_error); + retval = handler->first_error - (vme_base + offset); + } + vme_unregister_error_handler(handler); } -skip_chk: spin_unlock(&image->lock); return retval; @@ -1351,7 +1276,7 @@ static ssize_t tsi148_master_write(struct vme_master_resource *image, void *buf, unsigned int done = 0; unsigned int count32; - struct vme_bus_error *vme_err = NULL; + struct vme_error_handler *handler = NULL; struct vme_bridge *tsi148_bridge; struct tsi148_driver *bridge; @@ -1361,6 +1286,17 @@ static ssize_t tsi148_master_write(struct vme_master_resource *image, void *buf, spin_lock(&image->lock); + if (err_chk) { + __tsi148_master_get(image, &enabled, &vme_base, &size, &aspace, + &cycle, &dwidth); + handler = vme_register_error_handler(tsi148_bridge, aspace, + vme_base + offset, count); + if (!handler) { + spin_unlock(&image->lock); + return -ENOMEM; + } + } + /* Here we apply for the same strategy we do in master_read * function in order to assure the correct cycles. */ @@ -1410,30 +1346,18 @@ out: * We check for saved errors in the written address range/space. */ - if (!err_chk) - goto skip_chk; - - /* - * Get window info first, to maximise the time that the buffers may - * fluch on their own - */ - __tsi148_master_get(image, &enabled, &vme_base, &size, &aspace, &cycle, - &dwidth); - - ioread16(bridge->flush_image->kern_base + 0x7F000); + if (err_chk) { + ioread16(bridge->flush_image->kern_base + 0x7F000); - vme_err = tsi148_find_error(tsi148_bridge, aspace, vme_base + offset, - count); - if (vme_err != NULL) { - dev_warn(tsi148_bridge->parent, "First VME write error detected" - " an at address 0x%llx\n", vme_err->address); - retval = vme_err->address - (vme_base + offset); - /* Clear down save errors in this address range */ - tsi148_clear_errors(tsi148_bridge, aspace, vme_base + offset, - count); + if (handler->num_errors) { + dev_warn(tsi148_bridge->parent, + "First VME write error detected an at address 0x%llx\n", + handler->first_error); + retval = handler->first_error - (vme_base + offset); + } + vme_unregister_error_handler(handler); } -skip_chk: spin_unlock(&image->lock); return retval; @@ -1833,24 +1757,29 @@ static int tsi148_dma_list_add(struct vme_dma_list *list, /* Add to list */ list_add_tail(&entry->list, &list->entries); + entry->dma_handle = dma_map_single(tsi148_bridge->parent, + &entry->descriptor, + sizeof(struct tsi148_dma_descriptor), DMA_TO_DEVICE); + if (dma_mapping_error(tsi148_bridge->parent, entry->dma_handle)) { + dev_err(tsi148_bridge->parent, "DMA mapping error\n"); + retval = -EINVAL; + goto err_dma; + } + /* Fill out previous descriptors "Next Address" */ if (entry->list.prev != &list->entries) { - prev = list_entry(entry->list.prev, struct tsi148_dma_entry, - list); - /* We need the bus address for the pointer */ - entry->dma_handle = dma_map_single(tsi148_bridge->parent, - &entry->descriptor, - sizeof(struct tsi148_dma_descriptor), DMA_TO_DEVICE); - reg_split((unsigned long long)entry->dma_handle, &address_high, &address_low); - entry->descriptor.dnlau = cpu_to_be32(address_high); - entry->descriptor.dnlal = cpu_to_be32(address_low); + prev = list_entry(entry->list.prev, struct tsi148_dma_entry, + list); + prev->descriptor.dnlau = cpu_to_be32(address_high); + prev->descriptor.dnlal = cpu_to_be32(address_low); } return 0; +err_dma: err_dest: err_source: err_align: @@ -1887,7 +1816,7 @@ static int tsi148_dma_busy(struct vme_bridge *tsi148_bridge, int channel) static int tsi148_dma_list_exec(struct vme_dma_list *list) { struct vme_dma_resource *ctrlr; - int channel, retval = 0; + int channel, retval; struct tsi148_dma_entry *entry; u32 bus_addr_high, bus_addr_low; u32 val, dctlreg = 0; @@ -1921,10 +1850,6 @@ static int tsi148_dma_list_exec(struct vme_dma_list *list) entry = list_first_entry(&list->entries, struct tsi148_dma_entry, list); - entry->dma_handle = dma_map_single(tsi148_bridge->parent, - &entry->descriptor, - sizeof(struct tsi148_dma_descriptor), DMA_TO_DEVICE); - mutex_unlock(&ctrlr->mtx); reg_split(entry->dma_handle, &bus_addr_high, &bus_addr_low); @@ -1941,9 +1866,19 @@ static int tsi148_dma_list_exec(struct vme_dma_list *list) iowrite32be(dctlreg | TSI148_LCSR_DCTL_DGO, bridge->base + TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DCTL); - wait_event_interruptible(bridge->dma_queue[channel], + retval = wait_event_interruptible(bridge->dma_queue[channel], tsi148_dma_busy(ctrlr->parent, channel)); + if (retval) { + iowrite32be(dctlreg | TSI148_LCSR_DCTL_ABT, bridge->base + + TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DCTL); + /* Wait for the operation to abort */ + wait_event(bridge->dma_queue[channel], + tsi148_dma_busy(ctrlr->parent, channel)); + retval = -EINTR; + goto exit; + } + /* * Read status register, this register is valid until we kick off a * new transfer. @@ -1956,6 +1891,7 @@ static int tsi148_dma_list_exec(struct vme_dma_list *list) retval = -EIO; } +exit: /* Remove list from running list */ mutex_lock(&ctrlr->mtx); list_del(&list->list); diff --git a/kernel/drivers/vme/vme.c b/kernel/drivers/vme/vme.c index 6bab2c4ed..72924b063 100644 --- a/kernel/drivers/vme/vme.c +++ b/kernel/drivers/vme/vme.c @@ -177,8 +177,8 @@ size_t vme_get_size(struct vme_resource *resource) } EXPORT_SYMBOL(vme_get_size); -static int vme_check_window(u32 aspace, unsigned long long vme_base, - unsigned long long size) +int vme_check_window(u32 aspace, unsigned long long vme_base, + unsigned long long size) { int retval = 0; @@ -199,10 +199,8 @@ static int vme_check_window(u32 aspace, unsigned long long vme_base, retval = -EFAULT; break; case VME_A64: - /* - * Any value held in an unsigned long long can be used as the - * base - */ + if ((size != 0) && (vme_base > U64_MAX + 1 - size)) + retval = -EFAULT; break; case VME_CRCSR: if (((vme_base + size) > VME_CRCSR_MAX) || @@ -223,6 +221,40 @@ static int vme_check_window(u32 aspace, unsigned long long vme_base, return retval; } +EXPORT_SYMBOL(vme_check_window); + +static u32 vme_get_aspace(int am) +{ + switch (am) { + case 0x29: + case 0x2D: + return VME_A16; + case 0x38: + case 0x39: + case 0x3A: + case 0x3B: + case 0x3C: + case 0x3D: + case 0x3E: + case 0x3F: + return VME_A24; + case 0x8: + case 0x9: + case 0xA: + case 0xB: + case 0xC: + case 0xD: + case 0xE: + case 0xF: + return VME_A32; + case 0x0: + case 0x1: + case 0x3: + return VME_A64; + } + + return 0; +} /* * Request a slave image with specific attributes, return some unique @@ -991,6 +1023,63 @@ int vme_dma_free(struct vme_resource *resource) } EXPORT_SYMBOL(vme_dma_free); +void vme_bus_error_handler(struct vme_bridge *bridge, + unsigned long long address, int am) +{ + struct list_head *handler_pos = NULL; + struct vme_error_handler *handler; + int handler_triggered = 0; + u32 aspace = vme_get_aspace(am); + + list_for_each(handler_pos, &bridge->vme_error_handlers) { + handler = list_entry(handler_pos, struct vme_error_handler, + list); + if ((aspace == handler->aspace) && + (address >= handler->start) && + (address < handler->end)) { + if (!handler->num_errors) + handler->first_error = address; + if (handler->num_errors != UINT_MAX) + handler->num_errors++; + handler_triggered = 1; + } + } + + if (!handler_triggered) + dev_err(bridge->parent, + "Unhandled VME access error at address 0x%llx\n", + address); +} +EXPORT_SYMBOL(vme_bus_error_handler); + +struct vme_error_handler *vme_register_error_handler( + struct vme_bridge *bridge, u32 aspace, + unsigned long long address, size_t len) +{ + struct vme_error_handler *handler; + + handler = kmalloc(sizeof(*handler), GFP_KERNEL); + if (!handler) + return NULL; + + handler->aspace = aspace; + handler->start = address; + handler->end = address + len; + handler->num_errors = 0; + handler->first_error = 0; + list_add_tail(&handler->list, &bridge->vme_error_handlers); + + return handler; +} +EXPORT_SYMBOL(vme_register_error_handler); + +void vme_unregister_error_handler(struct vme_error_handler *handler) +{ + list_del(&handler->list); + kfree(handler); +} +EXPORT_SYMBOL(vme_unregister_error_handler); + void vme_irq_handler(struct vme_bridge *bridge, int level, int statid) { void (*call)(int, int, void *); diff --git a/kernel/drivers/vme/vme_bridge.h b/kernel/drivers/vme/vme_bridge.h index 934949abd..b59cbee23 100644 --- a/kernel/drivers/vme/vme_bridge.h +++ b/kernel/drivers/vme/vme_bridge.h @@ -1,6 +1,8 @@ #ifndef _VME_BRIDGE_H_ #define _VME_BRIDGE_H_ +#include <linux/vme.h> + #define VME_CRCSR_BUF_SIZE (508*1024) /* * Resource structures @@ -75,10 +77,13 @@ struct vme_lm_resource { int monitors; }; -struct vme_bus_error { +struct vme_error_handler { struct list_head list; - unsigned long long address; - u32 attributes; + unsigned long long start; /* Beginning of error window */ + unsigned long long end; /* End of error window */ + unsigned long long first_error; /* Address of the first error */ + u32 aspace; /* Address space of error window*/ + unsigned num_errors; /* Number of errors */ }; struct vme_callback { @@ -88,7 +93,7 @@ struct vme_callback { struct vme_irq { int count; - struct vme_callback callback[255]; + struct vme_callback callback[VME_NUM_STATUSID]; }; /* Allow 16 characters for name (including null character) */ @@ -106,8 +111,10 @@ struct vme_bridge { struct list_head dma_resources; struct list_head lm_resources; - struct list_head vme_errors; /* List for errors generated on VME */ - struct list_head devices; /* List of devices on this bridge */ + /* List for registered errors handlers */ + struct list_head vme_error_handlers; + /* List of devices on this bridge */ + struct list_head devices; /* Bridge Info - XXX Move to private structure? */ struct device *parent; /* Parent device (eg. pdev->dev for PCI) */ @@ -166,9 +173,15 @@ struct vme_bridge { void *vaddr, dma_addr_t dma); }; +void vme_bus_error_handler(struct vme_bridge *bridge, + unsigned long long address, int am); void vme_irq_handler(struct vme_bridge *, int, int); int vme_register_bridge(struct vme_bridge *); void vme_unregister_bridge(struct vme_bridge *); +struct vme_error_handler *vme_register_error_handler( + struct vme_bridge *bridge, u32 aspace, + unsigned long long address, size_t len); +void vme_unregister_error_handler(struct vme_error_handler *handler); #endif /* _VME_BRIDGE_H_ */ |