diff options
Diffstat (limited to 'kernel/drivers/clocksource/Kconfig')
| -rw-r--r-- | kernel/drivers/clocksource/Kconfig | 261 |
1 files changed, 261 insertions, 0 deletions
diff --git a/kernel/drivers/clocksource/Kconfig b/kernel/drivers/clocksource/Kconfig new file mode 100644 index 000000000..51d7865fd --- /dev/null +++ b/kernel/drivers/clocksource/Kconfig @@ -0,0 +1,261 @@ +menu "Clock Source drivers" + +config CLKSRC_OF + bool + +config CLKSRC_I8253 + bool + +config CLKEVT_I8253 + bool + +config I8253_LOCK + bool + +config CLKBLD_I8253 + def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK + +config CLKSRC_MMIO + bool + +config DIGICOLOR_TIMER + bool + +config DW_APB_TIMER + bool + +config DW_APB_TIMER_OF + bool + select DW_APB_TIMER + select CLKSRC_OF + +config ROCKCHIP_TIMER + bool + select CLKSRC_OF + +config ARMADA_370_XP_TIMER + bool + select CLKSRC_OF + +config MESON6_TIMER + bool + select CLKSRC_MMIO + +config ORION_TIMER + select CLKSRC_OF + select CLKSRC_MMIO + bool + +config SUN4I_TIMER + select CLKSRC_MMIO + bool + +config SUN5I_HSTIMER + select CLKSRC_MMIO + bool + +config TEGRA_TIMER + bool + +config VT8500_TIMER + bool + +config CADENCE_TTC_TIMER + bool + +config ASM9260_TIMER + bool + select CLKSRC_MMIO + select CLKSRC_OF + +config CLKSRC_NOMADIK_MTU + bool + depends on (ARCH_NOMADIK || ARCH_U8500) + select CLKSRC_MMIO + help + Support for Multi Timer Unit. MTU provides access + to multiple interrupt generating programmable + 32-bit free running decrementing counters. + +config CLKSRC_NOMADIK_MTU_SCHED_CLOCK + bool + depends on CLKSRC_NOMADIK_MTU + help + Use the Multi Timer Unit as the sched_clock. + +config CLKSRC_DBX500_PRCMU + bool "Clocksource PRCMU Timer" + depends on UX500_SOC_DB8500 + default y + help + Use the always on PRCMU Timer as clocksource + +config CLKSRC_DBX500_PRCMU_SCHED_CLOCK + bool "Clocksource PRCMU Timer sched_clock" + depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK) + default y + help + Use the always on PRCMU Timer as sched_clock + +config CLKSRC_EFM32 + bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32 + depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) + select CLKSRC_MMIO + default ARCH_EFM32 + help + Support to use the timers of EFM32 SoCs as clock source and clock + event device. + +config ARM_ARCH_TIMER + bool + select CLKSRC_OF if OF + +config ARM_ARCH_TIMER_EVTSTREAM + bool "Support for ARM architected timer event stream generation" + default y if ARM_ARCH_TIMER + depends on ARM_ARCH_TIMER + help + This option enables support for event stream generation based on + the ARM architected timer. It is used for waking up CPUs executing + the wfe instruction at a frequency represented as a power-of-2 + divisor of the clock rate. + The main use of the event stream is wfe-based timeouts of userspace + locking implementations. It might also be useful for imposing timeout + on wfe to safeguard against any programming errors in case an expected + event is not generated. + This must be disabled for hardware validation purposes to detect any + hardware anomalies of missing events. + +config ARM_GLOBAL_TIMER + bool + select CLKSRC_OF if OF + help + This options enables support for the ARM global timer unit + +config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK + bool + depends on ARM_GLOBAL_TIMER + default y + help + Use ARM global timer clock source as sched_clock + +config ATMEL_PIT + select CLKSRC_OF if OF + def_bool SOC_AT91SAM9 || SOC_SAMA5 + +config ATMEL_ST + bool + select CLKSRC_OF + select MFD_SYSCON + +config CLKSRC_METAG_GENERIC + def_bool y if METAG + help + This option enables support for the Meta per-thread timers. + +config CLKSRC_EXYNOS_MCT + def_bool y if ARCH_EXYNOS + depends on !ARM64 + help + Support for Multi Core Timer controller on Exynos SoCs. + +config CLKSRC_SAMSUNG_PWM + bool + help + This is a new clocksource driver for the PWM timer found in + Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver + for all devicetree enabled platforms. This driver will be + needed only on systems that do not have the Exynos MCT available. + +config FSL_FTM_TIMER + bool + help + Support for Freescale FlexTimer Module (FTM) timer. + +config VF_PIT_TIMER + bool + help + Support for Period Interrupt Timer on Freescale Vybrid Family SoCs. + +config SYS_SUPPORTS_SH_CMT + bool + +config MTK_TIMER + select CLKSRC_OF + select CLKSRC_MMIO + bool + +config SYS_SUPPORTS_SH_MTU2 + bool + +config SYS_SUPPORTS_SH_TMU + bool + +config SYS_SUPPORTS_EM_STI + bool + +config SH_TIMER_CMT + bool "Renesas CMT timer driver" if COMPILE_TEST + depends on GENERIC_CLOCKEVENTS + depends on HAS_IOMEM + default SYS_SUPPORTS_SH_CMT + help + This enables build of a clocksource and clockevent driver for + the Compare Match Timer (CMT) hardware available in 16/32/48-bit + variants on a wide range of Mobile and Automotive SoCs from Renesas. + +config SH_TIMER_MTU2 + bool "Renesas MTU2 timer driver" if COMPILE_TEST + depends on GENERIC_CLOCKEVENTS + depends on HAS_IOMEM + default SYS_SUPPORTS_SH_MTU2 + help + This enables build of a clockevent driver for the Multi-Function + Timer Pulse Unit 2 (MTU2) hardware available on SoCs from Renesas. + This hardware comes with 16 bit-timer registers. + +config SH_TIMER_TMU + bool "Renesas TMU timer driver" if COMPILE_TEST + depends on GENERIC_CLOCKEVENTS + depends on HAS_IOMEM + default SYS_SUPPORTS_SH_TMU + help + This enables build of a clocksource and clockevent driver for + the 32-bit Timer Unit (TMU) hardware available on a wide range + SoCs from Renesas. + +config EM_TIMER_STI + bool "Renesas STI timer driver" if COMPILE_TEST + depends on GENERIC_CLOCKEVENTS && HAS_IOMEM + default SYS_SUPPORTS_EM_STI + help + This enables build of a clocksource and clockevent driver for + the 48-bit System Timer (STI) hardware available on a SoCs + such as EMEV2 from former NEC Electronics. + +config CLKSRC_QCOM + bool + +config CLKSRC_VERSATILE + bool "ARM Versatile (Express) reference platforms clock source" + depends on PLAT_VERSATILE && GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET + select CLKSRC_OF + default y if MFD_VEXPRESS_SYSREG + help + This option enables clock source based on free running + counter available in the "System Registers" block of + ARM Versatile, RealView and Versatile Express reference + platforms. + +config CLKSRC_MIPS_GIC + bool + depends on MIPS_GIC + select CLKSRC_OF + +config CLKSRC_PXA + def_bool y if ARCH_PXA || ARCH_SA1100 + select CLKSRC_OF if USE_OF + help + This enables OST0 support available on PXA and SA-11x0 + platforms. +endmenu |