diff options
Diffstat (limited to 'kernel/drivers/clk/sunxi/clk-sunxi.c')
| -rw-r--r-- | kernel/drivers/clk/sunxi/clk-sunxi.c | 231 |
1 files changed, 27 insertions, 204 deletions
diff --git a/kernel/drivers/clk/sunxi/clk-sunxi.c b/kernel/drivers/clk/sunxi/clk-sunxi.c index 7e1e2bd18..9c79af0c0 100644 --- a/kernel/drivers/clk/sunxi/clk-sunxi.c +++ b/kernel/drivers/clk/sunxi/clk-sunxi.c @@ -14,11 +14,13 @@ * GNU General Public License for more details. */ +#include <linux/clk.h> #include <linux/clk-provider.h> #include <linux/clkdev.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/reset-controller.h> +#include <linux/slab.h> #include <linux/spinlock.h> #include <linux/log2.h> @@ -118,42 +120,42 @@ static long sun6i_ahb1_clk_round(unsigned long rate, u8 *divp, u8 *pre_divp, return (parent_rate / calcm) >> calcp; } -static long sun6i_ahb1_clk_determine_rate(struct clk_hw *hw, unsigned long rate, - unsigned long min_rate, - unsigned long max_rate, - unsigned long *best_parent_rate, - struct clk_hw **best_parent_clk) +static int sun6i_ahb1_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - struct clk *clk = hw->clk, *parent, *best_parent = NULL; + struct clk_hw *parent, *best_parent = NULL; int i, num_parents; unsigned long parent_rate, best = 0, child_rate, best_child_rate = 0; /* find the parent that can help provide the fastest rate <= rate */ - num_parents = __clk_get_num_parents(clk); + num_parents = clk_hw_get_num_parents(hw); for (i = 0; i < num_parents; i++) { - parent = clk_get_parent_by_index(clk, i); + parent = clk_hw_get_parent_by_index(hw, i); if (!parent) continue; - if (__clk_get_flags(clk) & CLK_SET_RATE_PARENT) - parent_rate = __clk_round_rate(parent, rate); + if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) + parent_rate = clk_hw_round_rate(parent, req->rate); else - parent_rate = __clk_get_rate(parent); + parent_rate = clk_hw_get_rate(parent); - child_rate = sun6i_ahb1_clk_round(rate, NULL, NULL, i, + child_rate = sun6i_ahb1_clk_round(req->rate, NULL, NULL, i, parent_rate); - if (child_rate <= rate && child_rate > best_child_rate) { + if (child_rate <= req->rate && child_rate > best_child_rate) { best_parent = parent; best = parent_rate; best_child_rate = child_rate; } } - if (best_parent) - *best_parent_clk = __clk_get_hw(best_parent); - *best_parent_rate = best; + if (!best_parent) + return -EINVAL; - return best_child_rate; + req->best_parent_hw = best_parent; + req->best_parent_rate = best; + req->rate = best_child_rate; + + return 0; } static int sun6i_ahb1_clk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -195,15 +197,14 @@ static void __init sun6i_ahb1_clk_setup(struct device_node *node) const char *clk_name = node->name; const char *parents[SUN6I_AHB1_MAX_PARENTS]; void __iomem *reg; - int i = 0; + int i; reg = of_io_request_and_map(node, 0, of_node_full_name(node)); + if (IS_ERR(reg)) + return; /* we have a mux, we will have >1 parents */ - while (i < SUN6I_AHB1_MAX_PARENTS && - (parents[i] = of_clk_get_parent_name(node, i)) != NULL) - i++; - + i = of_clk_parent_fill(node, parents, SUN6I_AHB1_MAX_PARENTS); of_property_read_string(node, "clock-output-names", &clk_name); ahb1 = kzalloc(sizeof(struct sun6i_ahb1_clk), GFP_KERNEL); @@ -784,14 +785,11 @@ static void __init sunxi_mux_clk_setup(struct device_node *node, const char *clk_name = node->name; const char *parents[SUNXI_MAX_PARENTS]; void __iomem *reg; - int i = 0; + int i; reg = of_iomap(node, 0); - while (i < SUNXI_MAX_PARENTS && - (parents[i] = of_clk_get_parent_name(node, i)) != NULL) - i++; - + i = of_clk_parent_fill(node, parents, SUNXI_MAX_PARENTS); of_property_read_string(node, "clock-output-names", &clk_name); clk = clk_register_mux(NULL, clk_name, parents, i, @@ -898,150 +896,6 @@ struct gates_data { DECLARE_BITMAP(mask, SUNXI_GATES_MAX_SIZE); }; -static const struct gates_data sun4i_axi_gates_data __initconst = { - .mask = {1}, -}; - -static const struct gates_data sun4i_ahb_gates_data __initconst = { - .mask = {0x7F77FFF, 0x14FB3F}, -}; - -static const struct gates_data sun5i_a10s_ahb_gates_data __initconst = { - .mask = {0x147667e7, 0x185915}, -}; - -static const struct gates_data sun5i_a13_ahb_gates_data __initconst = { - .mask = {0x107067e7, 0x185111}, -}; - -static const struct gates_data sun6i_a31_ahb1_gates_data __initconst = { - .mask = {0xEDFE7F62, 0x794F931}, -}; - -static const struct gates_data sun7i_a20_ahb_gates_data __initconst = { - .mask = { 0x12f77fff, 0x16ff3f }, -}; - -static const struct gates_data sun8i_a23_ahb1_gates_data __initconst = { - .mask = {0x25386742, 0x2505111}, -}; - -static const struct gates_data sun9i_a80_ahb0_gates_data __initconst = { - .mask = {0xF5F12B}, -}; - -static const struct gates_data sun9i_a80_ahb1_gates_data __initconst = { - .mask = {0x1E20003}, -}; - -static const struct gates_data sun9i_a80_ahb2_gates_data __initconst = { - .mask = {0x9B7}, -}; - -static const struct gates_data sun4i_apb0_gates_data __initconst = { - .mask = {0x4EF}, -}; - -static const struct gates_data sun5i_a10s_apb0_gates_data __initconst = { - .mask = {0x469}, -}; - -static const struct gates_data sun5i_a13_apb0_gates_data __initconst = { - .mask = {0x61}, -}; - -static const struct gates_data sun7i_a20_apb0_gates_data __initconst = { - .mask = { 0x4ff }, -}; - -static const struct gates_data sun9i_a80_apb0_gates_data __initconst = { - .mask = {0xEB822}, -}; - -static const struct gates_data sun4i_apb1_gates_data __initconst = { - .mask = {0xFF00F7}, -}; - -static const struct gates_data sun5i_a10s_apb1_gates_data __initconst = { - .mask = {0xf0007}, -}; - -static const struct gates_data sun5i_a13_apb1_gates_data __initconst = { - .mask = {0xa0007}, -}; - -static const struct gates_data sun6i_a31_apb1_gates_data __initconst = { - .mask = {0x3031}, -}; - -static const struct gates_data sun8i_a23_apb1_gates_data __initconst = { - .mask = {0x3021}, -}; - -static const struct gates_data sun6i_a31_apb2_gates_data __initconst = { - .mask = {0x3F000F}, -}; - -static const struct gates_data sun7i_a20_apb1_gates_data __initconst = { - .mask = { 0xff80ff }, -}; - -static const struct gates_data sun9i_a80_apb1_gates_data __initconst = { - .mask = {0x3F001F}, -}; - -static const struct gates_data sun8i_a23_apb2_gates_data __initconst = { - .mask = {0x1F0007}, -}; - -static void __init sunxi_gates_clk_setup(struct device_node *node, - struct gates_data *data) -{ - struct clk_onecell_data *clk_data; - const char *clk_parent; - const char *clk_name; - void __iomem *reg; - int qty; - int i = 0; - int j = 0; - - reg = of_iomap(node, 0); - - clk_parent = of_clk_get_parent_name(node, 0); - - /* Worst-case size approximation and memory allocation */ - qty = find_last_bit(data->mask, SUNXI_GATES_MAX_SIZE); - clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL); - if (!clk_data) - return; - clk_data->clks = kzalloc((qty+1) * sizeof(struct clk *), GFP_KERNEL); - if (!clk_data->clks) { - kfree(clk_data); - return; - } - - for_each_set_bit(i, data->mask, SUNXI_GATES_MAX_SIZE) { - of_property_read_string_index(node, "clock-output-names", - j, &clk_name); - - clk_data->clks[i] = clk_register_gate(NULL, clk_name, - clk_parent, 0, - reg + 4 * (i/32), i % 32, - 0, &clk_lock); - WARN_ON(IS_ERR(clk_data->clks[i])); - clk_register_clkdev(clk_data->clks[i], clk_name, NULL); - - j++; - } - - /* Adjust to the real max */ - clk_data->clk_num = i; - - of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -} - - - /** * sunxi_divs_clk_setup() helper data */ @@ -1279,34 +1133,6 @@ static const struct of_device_id clk_mux_match[] __initconst = { {} }; -/* Matches for gate clocks */ -static const struct of_device_id clk_gates_match[] __initconst = { - {.compatible = "allwinner,sun4i-a10-axi-gates-clk", .data = &sun4i_axi_gates_data,}, - {.compatible = "allwinner,sun4i-a10-ahb-gates-clk", .data = &sun4i_ahb_gates_data,}, - {.compatible = "allwinner,sun5i-a10s-ahb-gates-clk", .data = &sun5i_a10s_ahb_gates_data,}, - {.compatible = "allwinner,sun5i-a13-ahb-gates-clk", .data = &sun5i_a13_ahb_gates_data,}, - {.compatible = "allwinner,sun6i-a31-ahb1-gates-clk", .data = &sun6i_a31_ahb1_gates_data,}, - {.compatible = "allwinner,sun7i-a20-ahb-gates-clk", .data = &sun7i_a20_ahb_gates_data,}, - {.compatible = "allwinner,sun8i-a23-ahb1-gates-clk", .data = &sun8i_a23_ahb1_gates_data,}, - {.compatible = "allwinner,sun9i-a80-ahb0-gates-clk", .data = &sun9i_a80_ahb0_gates_data,}, - {.compatible = "allwinner,sun9i-a80-ahb1-gates-clk", .data = &sun9i_a80_ahb1_gates_data,}, - {.compatible = "allwinner,sun9i-a80-ahb2-gates-clk", .data = &sun9i_a80_ahb2_gates_data,}, - {.compatible = "allwinner,sun4i-a10-apb0-gates-clk", .data = &sun4i_apb0_gates_data,}, - {.compatible = "allwinner,sun5i-a10s-apb0-gates-clk", .data = &sun5i_a10s_apb0_gates_data,}, - {.compatible = "allwinner,sun5i-a13-apb0-gates-clk", .data = &sun5i_a13_apb0_gates_data,}, - {.compatible = "allwinner,sun7i-a20-apb0-gates-clk", .data = &sun7i_a20_apb0_gates_data,}, - {.compatible = "allwinner,sun9i-a80-apb0-gates-clk", .data = &sun9i_a80_apb0_gates_data,}, - {.compatible = "allwinner,sun4i-a10-apb1-gates-clk", .data = &sun4i_apb1_gates_data,}, - {.compatible = "allwinner,sun5i-a10s-apb1-gates-clk", .data = &sun5i_a10s_apb1_gates_data,}, - {.compatible = "allwinner,sun5i-a13-apb1-gates-clk", .data = &sun5i_a13_apb1_gates_data,}, - {.compatible = "allwinner,sun6i-a31-apb1-gates-clk", .data = &sun6i_a31_apb1_gates_data,}, - {.compatible = "allwinner,sun7i-a20-apb1-gates-clk", .data = &sun7i_a20_apb1_gates_data,}, - {.compatible = "allwinner,sun8i-a23-apb1-gates-clk", .data = &sun8i_a23_apb1_gates_data,}, - {.compatible = "allwinner,sun9i-a80-apb1-gates-clk", .data = &sun9i_a80_apb1_gates_data,}, - {.compatible = "allwinner,sun6i-a31-apb2-gates-clk", .data = &sun6i_a31_apb2_gates_data,}, - {.compatible = "allwinner,sun8i-a23-apb2-gates-clk", .data = &sun8i_a23_apb2_gates_data,}, - {} -}; static void __init of_sunxi_table_clock_setup(const struct of_device_id *clk_match, void *function) @@ -1338,9 +1164,6 @@ static void __init sunxi_init_clocks(const char *clocks[], int nclocks) /* Register mux clocks */ of_sunxi_table_clock_setup(clk_mux_match, sunxi_mux_clk_setup); - /* Register gate clocks */ - of_sunxi_table_clock_setup(clk_gates_match, sunxi_gates_clk_setup); - /* Protect the clocks that needs to stay on */ for (i = 0; i < nclocks; i++) { struct clk *clk = clk_get(NULL, clocks[i]); @@ -1352,7 +1175,6 @@ static void __init sunxi_init_clocks(const char *clocks[], int nclocks) static const char *sun4i_a10_critical_clocks[] __initdata = { "pll5_ddr", - "ahb_sdram", }; static void __init sun4i_a10_init_clocks(struct device_node *node) @@ -1365,7 +1187,6 @@ CLK_OF_DECLARE(sun4i_a10_clk_init, "allwinner,sun4i-a10", sun4i_a10_init_clocks) static const char *sun5i_critical_clocks[] __initdata = { "cpu", "pll5_ddr", - "ahb_sdram", }; static void __init sun5i_init_clocks(struct device_node *node) @@ -1375,6 +1196,7 @@ static void __init sun5i_init_clocks(struct device_node *node) } CLK_OF_DECLARE(sun5i_a10s_clk_init, "allwinner,sun5i-a10s", sun5i_init_clocks); CLK_OF_DECLARE(sun5i_a13_clk_init, "allwinner,sun5i-a13", sun5i_init_clocks); +CLK_OF_DECLARE(sun5i_r8_clk_init, "allwinner,sun5i-r8", sun5i_init_clocks); CLK_OF_DECLARE(sun7i_a20_clk_init, "allwinner,sun7i-a20", sun5i_init_clocks); static const char *sun6i_critical_clocks[] __initdata = { @@ -1389,6 +1211,7 @@ static void __init sun6i_init_clocks(struct device_node *node) CLK_OF_DECLARE(sun6i_a31_clk_init, "allwinner,sun6i-a31", sun6i_init_clocks); CLK_OF_DECLARE(sun6i_a31s_clk_init, "allwinner,sun6i-a31s", sun6i_init_clocks); CLK_OF_DECLARE(sun8i_a23_clk_init, "allwinner,sun8i-a23", sun6i_init_clocks); +CLK_OF_DECLARE(sun8i_a33_clk_init, "allwinner,sun8i-a33", sun6i_init_clocks); static void __init sun9i_init_clocks(struct device_node *node) { |