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-rw-r--r--kernel/arch/m32r/platforms/oaks32r/Makefile1
-rw-r--r--kernel/arch/m32r/platforms/oaks32r/dot.gdbinit.nommu154
-rw-r--r--kernel/arch/m32r/platforms/oaks32r/io.c228
-rw-r--r--kernel/arch/m32r/platforms/oaks32r/setup.c113
4 files changed, 496 insertions, 0 deletions
diff --git a/kernel/arch/m32r/platforms/oaks32r/Makefile b/kernel/arch/m32r/platforms/oaks32r/Makefile
new file mode 100644
index 000000000..0de59084f
--- /dev/null
+++ b/kernel/arch/m32r/platforms/oaks32r/Makefile
@@ -0,0 +1 @@
+obj-y := setup.o io.o
diff --git a/kernel/arch/m32r/platforms/oaks32r/dot.gdbinit.nommu b/kernel/arch/m32r/platforms/oaks32r/dot.gdbinit.nommu
new file mode 100644
index 000000000..d481d972b
--- /dev/null
+++ b/kernel/arch/m32r/platforms/oaks32r/dot.gdbinit.nommu
@@ -0,0 +1,154 @@
+# .gdbinit file
+# $Id: dot.gdbinit.oaks32r,v 1.4 2004/10/20 02:24:37 takata Exp $
+#-----
+# NOTE: this file is generated by a script, "gen_gdbinit.pl".
+# (Please type "gen_gdbinit.pl --help" and check the help message).
+# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
+#-----
+# target platform: oaks32r
+
+# setting
+set width 0d70
+set radix 0d16
+
+# clk xin:cpu:bus=16:66:33
+define clock_init
+ set *(unsigned long *)0x00ef4008 = 1
+ shell sleep 0.1
+ set *(unsigned long *)0x00ef4000 = 0x00020100
+end
+
+# Initialize programmable ports
+define port_init
+ set *(unsigned long *)0x00ef1000 = 0x1
+ set *(unsigned long *)0x00ef1060 = 0x01400001
+ set *(unsigned long *)0x00ef1064 = 0x00015555
+ set *(unsigned long *)0x00ef1068 = 0x55555050
+ set *(unsigned long *)0x00ef106c = 0x05150040
+end
+
+# Initialize SDRAM controller
+define sdram_init
+ set *(unsigned long *)0x00ef6008 = 0x00000182
+ set *(unsigned long *)0x00ef600c = 0x00000001
+ shell sleep 0.1
+ set *(unsigned long *)0x00ef602c = 0x00000010
+ set *(unsigned long *)0x00ef6028 = 0x00000300
+ set *(unsigned long *)0x00ef6048 = 0x00000001
+ set *(unsigned long *)0x00ef6020 = 0x01000041
+ set *(unsigned long *)0x00ef6004 = 0x00010117
+ set *(unsigned long *)0x00ef6010 = 0x00000001
+ set *(unsigned long *)0x00ef6024 = 0x00000001
+end
+document sdram_init
+ SDRAM controller initialization
+ 0x01000000 - 0x017fffff (8MB)
+end
+
+# Initialize LAN controller
+define lanc_init
+ set *(unsigned long *)0x00ef5008 = 0x03031303
+ #RST DRV (P64)
+ set *(unsigned char *)0x00ef1046 = 0x08
+ set *(unsigned char *)0x00ef1026 = 0xff
+ set *(unsigned char *)0x00ef1026 = 0x00
+ set *(unsigned short *)0x02000630 = 0xffff
+end
+
+# Show current task structure
+define show_current
+ set $current = $spi & 0xffffe000
+ printf "$current=0x%08lX\n",$current
+ print *(struct task_struct *)$current
+end
+
+# Show user assigned task structure
+define show_task
+ set = $arg0 & 0xffffe000
+ printf "$task=0x%08lX\n",$task
+ print *(struct task_struct *)$task
+end
+document show_task
+ Show user assigned task structure
+ arg0 : task structure address
+end
+
+# Show M32R registers
+define show_regs
+ printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
+ printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
+ printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
+ printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
+ printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
+ printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
+end
+
+# Setup all
+define setup
+ use_mon_code
+ set *(unsigned int)0xfffffffc=0x60
+ shell sleep 0.1
+ clock_init
+ shell sleep 0.1
+ port_init
+ sdram_init
+ lanc_init
+end
+
+# Load modules
+define load_modules
+ use_debug_dma
+ load
+end
+
+# Set kernel parameters
+define set_kernel_parameters
+ set $param = (void*)0x01001000
+ # INITRD_START
+# set *(unsigned long *)($param + 0x0010) = 0x00000000
+ # INITRD_SIZE
+# set *(unsigned long *)($param + 0x0014) = 0x00000000
+ # M32R_CPUCLK
+ set *(unsigned long *)($param + 0x0018) = 0d66666667
+ # M32R_BUSCLK
+ set *(unsigned long *)($param + 0x001c) = 0d33333333
+
+ # M32R_TIMER_DIVIDE
+ set *(unsigned long *)($param + 0x0020) = 0d128
+
+ set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
+end
+
+# Boot
+define boot
+ set_kernel_parameters
+ set $fp = 0
+ set $pc = 0x01002000
+ si
+ c
+end
+
+# Set breakpoints
+define set_breakpoints
+ b *0x00000020
+ b *0x00000030
+end
+
+# Restart
+define restart
+ sdireset
+ sdireset
+ setup
+ load_modules
+ boot
+end
+
+sdireset
+sdireset
+file vmlinux
+target m32rsdi
+setup
+#load_modules
+#set_breakpoints
+#boot
+
diff --git a/kernel/arch/m32r/platforms/oaks32r/io.c b/kernel/arch/m32r/platforms/oaks32r/io.c
new file mode 100644
index 000000000..364a3b2e8
--- /dev/null
+++ b/kernel/arch/m32r/platforms/oaks32r/io.c
@@ -0,0 +1,228 @@
+/*
+ * linux/arch/m32r/platforms/oaks32r/io.c
+ *
+ * Typical I/O routines for OAKS32R board.
+ *
+ * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
+ * Hitoshi Yamamoto, Mamoru Sakugawa
+ */
+
+#include <asm/m32r.h>
+#include <asm/page.h>
+#include <asm/io.h>
+
+#define PORT2ADDR(port) _port2addr(port)
+
+static inline void *_port2addr(unsigned long port)
+{
+ return (void *)(port | NONCACHE_OFFSET);
+}
+
+static inline void *_port2addr_ne(unsigned long port)
+{
+ return (void *)((port<<1) + NONCACHE_OFFSET + 0x02000000);
+}
+
+static inline void delay(void)
+{
+ __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
+}
+
+/*
+ * NIC I/O function
+ */
+
+#define PORT2ADDR_NE(port) _port2addr_ne(port)
+
+static inline unsigned char _ne_inb(void *portp)
+{
+ return *(volatile unsigned char *)(portp+1);
+}
+
+static inline unsigned short _ne_inw(void *portp)
+{
+ unsigned short tmp;
+
+ tmp = *(unsigned short *)(portp) & 0xff;
+ tmp |= *(unsigned short *)(portp+2) << 8;
+ return tmp;
+}
+
+static inline void _ne_insb(void *portp, void *addr, unsigned long count)
+{
+ unsigned char *buf = addr;
+ while (count--)
+ *buf++ = *(volatile unsigned char *)(portp+1);
+}
+
+static inline void _ne_outb(unsigned char b, void *portp)
+{
+ *(volatile unsigned char *)(portp+1) = b;
+}
+
+static inline void _ne_outw(unsigned short w, void *portp)
+{
+ *(volatile unsigned short *)portp = (w >> 8);
+ *(volatile unsigned short *)(portp+2) = (w & 0xff);
+}
+
+unsigned char _inb(unsigned long port)
+{
+ if (port >= 0x300 && port < 0x320)
+ return _ne_inb(PORT2ADDR_NE(port));
+
+ return *(volatile unsigned char *)PORT2ADDR(port);
+}
+
+unsigned short _inw(unsigned long port)
+{
+ if (port >= 0x300 && port < 0x320)
+ return _ne_inw(PORT2ADDR_NE(port));
+
+ return *(volatile unsigned short *)PORT2ADDR(port);
+}
+
+unsigned long _inl(unsigned long port)
+{
+ return *(volatile unsigned long *)PORT2ADDR(port);
+}
+
+unsigned char _inb_p(unsigned long port)
+{
+ unsigned char v = _inb(port);
+ delay();
+ return (v);
+}
+
+unsigned short _inw_p(unsigned long port)
+{
+ unsigned short v = _inw(port);
+ delay();
+ return (v);
+}
+
+unsigned long _inl_p(unsigned long port)
+{
+ unsigned long v = _inl(port);
+ delay();
+ return (v);
+}
+
+void _outb(unsigned char b, unsigned long port)
+{
+ if (port >= 0x300 && port < 0x320)
+ _ne_outb(b, PORT2ADDR_NE(port));
+ else
+ *(volatile unsigned char *)PORT2ADDR(port) = b;
+}
+
+void _outw(unsigned short w, unsigned long port)
+{
+ if (port >= 0x300 && port < 0x320)
+ _ne_outw(w, PORT2ADDR_NE(port));
+ else
+ *(volatile unsigned short *)PORT2ADDR(port) = w;
+}
+
+void _outl(unsigned long l, unsigned long port)
+{
+ *(volatile unsigned long *)PORT2ADDR(port) = l;
+}
+
+void _outb_p(unsigned char b, unsigned long port)
+{
+ _outb(b, port);
+ delay();
+}
+
+void _outw_p(unsigned short w, unsigned long port)
+{
+ _outw(w, port);
+ delay();
+}
+
+void _outl_p(unsigned long l, unsigned long port)
+{
+ _outl(l, port);
+ delay();
+}
+
+void _insb(unsigned int port, void *addr, unsigned long count)
+{
+ if (port >= 0x300 && port < 0x320)
+ _ne_insb(PORT2ADDR_NE(port), addr, count);
+ else {
+ unsigned char *buf = addr;
+ unsigned char *portp = PORT2ADDR(port);
+ while (count--)
+ *buf++ = *(volatile unsigned char *)portp;
+ }
+}
+
+void _insw(unsigned int port, void *addr, unsigned long count)
+{
+ unsigned short *buf = addr;
+ unsigned short *portp;
+
+ if (port >= 0x300 && port < 0x320) {
+ portp = PORT2ADDR_NE(port);
+ while (count--)
+ *buf++ = _ne_inw(portp);
+ } else {
+ portp = PORT2ADDR(port);
+ while (count--)
+ *buf++ = *(volatile unsigned short *)portp;
+ }
+}
+
+void _insl(unsigned int port, void *addr, unsigned long count)
+{
+ unsigned long *buf = addr;
+ unsigned long *portp;
+
+ portp = PORT2ADDR(port);
+ while (count--)
+ *buf++ = *(volatile unsigned long *)portp;
+}
+
+void _outsb(unsigned int port, const void *addr, unsigned long count)
+{
+ const unsigned char *buf = addr;
+ unsigned char *portp;
+
+ if (port >= 0x300 && port < 0x320) {
+ portp = PORT2ADDR_NE(port);
+ while (count--)
+ _ne_outb(*buf++, portp);
+ } else {
+ portp = PORT2ADDR(port);
+ while (count--)
+ *(volatile unsigned char *)portp = *buf++;
+ }
+}
+
+void _outsw(unsigned int port, const void *addr, unsigned long count)
+{
+ const unsigned short *buf = addr;
+ unsigned short *portp;
+
+ if (port >= 0x300 && port < 0x320) {
+ portp = PORT2ADDR_NE(port);
+ while (count--)
+ _ne_outw(*buf++, portp);
+ } else {
+ portp = PORT2ADDR(port);
+ while (count--)
+ *(volatile unsigned short *)portp = *buf++;
+ }
+}
+
+void _outsl(unsigned int port, const void *addr, unsigned long count)
+{
+ const unsigned long *buf = addr;
+ unsigned char *portp;
+
+ portp = PORT2ADDR(port);
+ while (count--)
+ *(volatile unsigned long *)portp = *buf++;
+}
diff --git a/kernel/arch/m32r/platforms/oaks32r/setup.c b/kernel/arch/m32r/platforms/oaks32r/setup.c
new file mode 100644
index 000000000..f8373c069
--- /dev/null
+++ b/kernel/arch/m32r/platforms/oaks32r/setup.c
@@ -0,0 +1,113 @@
+/*
+ * linux/arch/m32r/platforms/oaks32r/setup.c
+ *
+ * Setup routines for OAKS32R Board
+ *
+ * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata,
+ * Hitoshi Yamamoto, Mamoru Sakugawa
+ */
+
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/m32r.h>
+#include <asm/io.h>
+
+#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
+
+icu_data_t icu_data[NR_IRQS];
+
+static void disable_oaks32r_irq(unsigned int irq)
+{
+ unsigned long port, data;
+
+ port = irq2port(irq);
+ data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
+ outl(data, port);
+}
+
+static void enable_oaks32r_irq(unsigned int irq)
+{
+ unsigned long port, data;
+
+ port = irq2port(irq);
+ data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
+ outl(data, port);
+}
+
+static void mask_oaks32r(struct irq_data *data)
+{
+ disable_oaks32r_irq(data->irq);
+}
+
+static void unmask_oaks32r(struct irq_data *data)
+{
+ enable_oaks32r_irq(data->irq);
+}
+
+static void shutdown_oaks32r(struct irq_data *data)
+{
+ unsigned long port;
+
+ port = irq2port(data->irq);
+ outl(M32R_ICUCR_ILEVEL7, port);
+}
+
+static struct irq_chip oaks32r_irq_type =
+{
+ .name = "OAKS32R-IRQ",
+ .irq_shutdown = shutdown_oaks32r,
+ .irq_mask = mask_oaks32r,
+ .irq_unmask = unmask_oaks32r,
+};
+
+void __init init_IRQ(void)
+{
+ static int once = 0;
+
+ if (once)
+ return;
+ else
+ once++;
+
+#ifdef CONFIG_NE2000
+ /* INT3 : LAN controller (RTL8019AS) */
+ irq_set_chip_and_handler(M32R_IRQ_INT3, &oaks32r_irq_type,
+ handle_level_irq);
+ icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
+ disable_oaks32r_irq(M32R_IRQ_INT3);
+#endif /* CONFIG_M32R_NE2000 */
+
+ /* MFT2 : system timer */
+ irq_set_chip_and_handler(M32R_IRQ_MFT2, &oaks32r_irq_type,
+ handle_level_irq);
+ icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
+ disable_oaks32r_irq(M32R_IRQ_MFT2);
+
+#ifdef CONFIG_SERIAL_M32R_SIO
+ /* SIO0_R : uart receive data */
+ irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &oaks32r_irq_type,
+ handle_level_irq);
+ icu_data[M32R_IRQ_SIO0_R].icucr = 0;
+ disable_oaks32r_irq(M32R_IRQ_SIO0_R);
+
+ /* SIO0_S : uart send data */
+ irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &oaks32r_irq_type,
+ handle_level_irq);
+ icu_data[M32R_IRQ_SIO0_S].icucr = 0;
+ disable_oaks32r_irq(M32R_IRQ_SIO0_S);
+
+ /* SIO1_R : uart receive data */
+ irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &oaks32r_irq_type,
+ handle_level_irq);
+ icu_data[M32R_IRQ_SIO1_R].icucr = 0;
+ disable_oaks32r_irq(M32R_IRQ_SIO1_R);
+
+ /* SIO1_S : uart send data */
+ irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &oaks32r_irq_type,
+ handle_level_irq);
+ icu_data[M32R_IRQ_SIO1_S].icucr = 0;
+ disable_oaks32r_irq(M32R_IRQ_SIO1_S);
+#endif /* CONFIG_SERIAL_M32R_SIO */
+}