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Diffstat (limited to 'kernel/arch/frv/Kconfig')
| -rw-r--r-- | kernel/arch/frv/Kconfig | 380 |
1 files changed, 380 insertions, 0 deletions
diff --git a/kernel/arch/frv/Kconfig b/kernel/arch/frv/Kconfig new file mode 100644 index 000000000..34aa19352 --- /dev/null +++ b/kernel/arch/frv/Kconfig @@ -0,0 +1,380 @@ +config FRV + bool + default y + select HAVE_IDE + select HAVE_ARCH_TRACEHOOK + select HAVE_PERF_EVENTS + select HAVE_UID16 + select VIRT_TO_BUS + select GENERIC_IRQ_SHOW + select HAVE_DEBUG_BUGVERBOSE + select ARCH_HAVE_NMI_SAFE_CMPXCHG + select GENERIC_CPU_DEVICES + select ARCH_WANT_IPC_PARSE_VERSION + select OLD_SIGSUSPEND3 + select OLD_SIGACTION + select HAVE_DEBUG_STACKOVERFLOW + +config ZONE_DMA + bool + default y + +config RWSEM_GENERIC_SPINLOCK + bool + default y + +config RWSEM_XCHGADD_ALGORITHM + bool + +config GENERIC_HWEIGHT + bool + default y + +config GENERIC_CALIBRATE_DELAY + bool + default n + +config TIME_LOW_RES + bool + default y + +config QUICKLIST + bool + default y + +config ARCH_HAS_ILOG2_U32 + bool + default y + +config ARCH_HAS_ILOG2_U64 + bool + default y + +config HZ + int + default 1000 + +source "init/Kconfig" + +source "kernel/Kconfig.freezer" + + +menu "Fujitsu FR-V system setup" + +config MMU + bool "MMU support" + help + This options switches on and off support for the FR-V MMU + (effectively switching between vmlinux and uClinux). Not all FR-V + CPUs support this. Currently only the FR451 has a sufficiently + featured MMU. + +config FRV_OUTOFLINE_ATOMIC_OPS + bool "Out-of-line the FRV atomic operations" + default n + help + Setting this option causes the FR-V atomic operations to be mostly + implemented out-of-line. + + See Documentation/frv/atomic-ops.txt for more information. + +config HIGHMEM + bool "High memory support" + depends on MMU + default y + help + If you wish to use more than 256MB of memory with your MMU based + system, you will need to select this option. The kernel can only see + the memory between 0xC0000000 and 0xD0000000 directly... everything + else must be kmapped. + + The arch is, however, capable of supporting up to 3GB of SDRAM. + +config HIGHPTE + bool "Allocate page tables in highmem" + depends on HIGHMEM + default y + help + The VM uses one page of memory for each page table. For systems + with a lot of RAM, this can be wasteful of precious low memory. + Setting this option will put user-space page tables in high memory. + +source "mm/Kconfig" + +choice + prompt "uClinux kernel load address" + depends on !MMU + default UCPAGE_OFFSET_C0000000 + help + This option sets the base address for the uClinux kernel. The kernel + will rearrange the SDRAM layout to start at this address, and move + itself to start there. It must be greater than 0, and it must be + sufficiently less than 0xE0000000 that the SDRAM does not intersect + the I/O region. + + The base address must also be aligned such that the SDRAM controller + can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned. + +config UCPAGE_OFFSET_20000000 + bool "0x20000000" + +config UCPAGE_OFFSET_40000000 + bool "0x40000000" + +config UCPAGE_OFFSET_60000000 + bool "0x60000000" + +config UCPAGE_OFFSET_80000000 + bool "0x80000000" + +config UCPAGE_OFFSET_A0000000 + bool "0xA0000000" + +config UCPAGE_OFFSET_C0000000 + bool "0xC0000000 (Recommended)" + +endchoice + +config PAGE_OFFSET + hex + default 0x20000000 if UCPAGE_OFFSET_20000000 + default 0x40000000 if UCPAGE_OFFSET_40000000 + default 0x60000000 if UCPAGE_OFFSET_60000000 + default 0x80000000 if UCPAGE_OFFSET_80000000 + default 0xA0000000 if UCPAGE_OFFSET_A0000000 + default 0xC0000000 + +config PROTECT_KERNEL + bool "Protect core kernel against userspace" + depends on !MMU + default y + help + Selecting this option causes the uClinux kernel to change the + permittivity of DAMPR register covering the core kernel image to + prevent userspace accessing the underlying memory directly. + +choice + prompt "CPU Caching mode" + default FRV_DEFL_CACHE_WBACK + help + This option determines the default caching mode for the kernel. + + Write-Back caching mode involves the all reads and writes causing + the affected cacheline to be read into the cache first before being + operated upon. Memory is not then updated by a write until the cache + is filled and a cacheline needs to be displaced from the cache to + make room. Only at that point is it written back. + + Write-Behind caching is similar to Write-Back caching, except that a + write won't fetch a cacheline into the cache if there isn't already + one there; it will write directly to memory instead. + + Write-Through caching only fetches cachelines from memory on a + read. Writes always get written directly to memory. If the affected + cacheline is also in cache, it will be updated too. + + The final option is to turn of caching entirely. + + Note that not all CPUs support Write-Behind caching. If the CPU on + which the kernel is running doesn't, it'll fall back to Write-Back + caching. + +config FRV_DEFL_CACHE_WBACK + bool "Write-Back" + +config FRV_DEFL_CACHE_WBEHIND + bool "Write-Behind" + +config FRV_DEFL_CACHE_WTHRU + bool "Write-Through" + +config FRV_DEFL_CACHE_DISABLED + bool "Disabled" + +endchoice + +menu "CPU core support" + +config CPU_FR401 + bool "Include FR401 core support" + depends on !MMU + default y + help + This enables support for the FR401, FR401A and FR403 CPUs + +config CPU_FR405 + bool "Include FR405 core support" + depends on !MMU + default y + help + This enables support for the FR405 CPU + +config CPU_FR451 + bool "Include FR451 core support" + default y + help + This enables support for the FR451 CPU + +config CPU_FR451_COMPILE + bool "Specifically compile for FR451 core" + depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551 + default y + help + This causes appropriate flags to be passed to the compiler to + optimise for the FR451 CPU + +config CPU_FR551 + bool "Include FR551 core support" + depends on !MMU + default y + help + This enables support for the FR555 CPU + +config CPU_FR551_COMPILE + bool "Specifically compile for FR551 core" + depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451 + default y + help + This causes appropriate flags to be passed to the compiler to + optimise for the FR555 CPU + +config FRV_L1_CACHE_SHIFT + int + default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451 + default "6" if CPU_FR551 + +endmenu + +choice + prompt "System support" + default MB93091_VDK + +config MB93091_VDK + bool "MB93091 CPU board with or without motherboard" + +config MB93093_PDK + bool "MB93093 PDK unit" + +endchoice + +if MB93091_VDK +choice + prompt "Motherboard support" + default MB93090_MB00 + +config MB93090_MB00 + bool "Use the MB93090-MB00 motherboard" + help + Select this option if the MB93091 CPU board is going to be used with + a MB93090-MB00 VDK motherboard + +config MB93091_NO_MB + bool "Use standalone" + help + Select this option if the MB93091 CPU board is going to be used + without a motherboard + +endchoice +endif + +config FUJITSU_MB93493 + bool "MB93493 Multimedia chip" + help + Select this option if the MB93493 multimedia chip is going to be + used. + +choice + prompt "GP-Relative data support" + default GPREL_DATA_8 + help + This option controls what data, if any, should be placed in the GP + relative data sections. Using this means that the compiler can + generate accesses to the data using GR16-relative addressing which + is faster than absolute instructions and saves space (2 instructions + per access). + + However, the GPREL region is limited in size because the immediate + value used in the load and store instructions is limited to a 12-bit + signed number. + + So if the linker starts complaining that accesses to GPREL data are + out of range, try changing this option from the default. + + Note that modules will always be compiled with this feature disabled + as the module data will not be in range of the GP base address. + +config GPREL_DATA_8 + bool "Put data objects of up to 8 bytes into GP-REL" + +config GPREL_DATA_4 + bool "Put data objects of up to 4 bytes into GP-REL" + +config GPREL_DATA_NONE + bool "Don't use GP-REL" + +endchoice + +config FRV_ONCPU_SERIAL + bool "Use on-CPU serial ports" + select SERIAL_8250 + default y + +config PCI + bool "Use PCI" + depends on MB93090_MB00 + default y + select GENERIC_PCI_IOMAP + help + Some FR-V systems (such as the MB93090-MB00 VDK) have PCI + onboard. If you have one of these boards and you wish to use the PCI + facilities, say Y here. + +config RESERVE_DMA_COHERENT + bool "Reserve DMA coherent memory" + depends on PCI && !MMU + default y + help + Many PCI drivers require access to uncached memory for DMA device + communications (such as is done with some Ethernet buffer rings). If + a fully featured MMU is available, this can be done through page + table settings, but if not, a region has to be set aside and marked + with a special DAMPR register. + + Setting this option causes uClinux to set aside a portion of the + available memory for use in this manner. The memory will then be + unavailable for normal kernel use. + +source "drivers/pci/Kconfig" + +source "drivers/pcmcia/Kconfig" + +menu "Power management options" + +config ARCH_SUSPEND_POSSIBLE + def_bool y + +source kernel/power/Kconfig +endmenu + +endmenu + + +menu "Executable formats" + +source "fs/Kconfig.binfmt" + +endmenu + +source "net/Kconfig" + +source "drivers/Kconfig" + +source "fs/Kconfig" + +source "arch/frv/Kconfig.debug" + +source "security/Kconfig" + +source "crypto/Kconfig" + +source "lib/Kconfig" |