diff options
Diffstat (limited to 'kernel/arch/blackfin/mach-bf527/Kconfig')
| -rw-r--r-- | kernel/arch/blackfin/mach-bf527/Kconfig | 324 |
1 files changed, 324 insertions, 0 deletions
diff --git a/kernel/arch/blackfin/mach-bf527/Kconfig b/kernel/arch/blackfin/mach-bf527/Kconfig new file mode 100644 index 000000000..0ba54701a --- /dev/null +++ b/kernel/arch/blackfin/mach-bf527/Kconfig @@ -0,0 +1,324 @@ +config BF52x + def_bool y + depends on (BF522 || BF523 || BF524 || BF525 || BF526 || BF527) + +if (BF52x) + +source "arch/blackfin/mach-bf527/boards/Kconfig" + +menu "BF527 Specific Configuration" + +comment "Alternative Multiplexing Scheme" + +choice + prompt "SPORT0" + default BF527_SPORT0_PORTG + help + Select PORT used for SPORT0. See Hardware Reference Manual + +config BF527_SPORT0_PORTF + bool "PORT F" + help + PORT F + +config BF527_SPORT0_PORTG + bool "PORT G" + help + PORT G +endchoice + +choice + prompt "SPORT0 TSCLK Location" + depends on BF527_SPORT0_PORTG + default BF527_SPORT0_TSCLK_PG10 + help + Select PIN used for SPORT0_TSCLK. See Hardware Reference Manual + +config BF527_SPORT0_TSCLK_PG10 + bool "PORT PG10" + help + PORT PG10 + +config BF527_SPORT0_TSCLK_PG14 + bool "PORT PG14" + help + PORT PG14 +endchoice + +choice + prompt "UART1" + default BF527_UART1_PORTF + help + Select PORT used for UART1. See Hardware Reference Manual + +config BF527_UART1_PORTF + bool "PORT F" + help + PORT F + +config BF527_UART1_PORTG + bool "PORT G" + help + PORT G +endchoice + +choice + prompt "NAND (NFC) Data" + default BF527_NAND_D_PORTH + help + Select PORT used for NAND Data Bus. See Hardware Reference Manual + +config BF527_NAND_D_PORTF + bool "PORT F" + help + PORT F + +config BF527_NAND_D_PORTH + bool "PORT H" + help + PORT H +endchoice + +comment "Hysteresis/Schmitt Trigger Control" +config BFIN_HYSTERESIS_CONTROL + bool "Enable Hysteresis Control" + help + The ADSP-BF52x allows to control input hysteresis for Port F, + Port G and Port H and other processor signal inputs. + The Schmitt trigger enables can be set only for pin groups. + Saying Y will overwrite the default reset or boot loader + initialization. + +menu "PORT F" + depends on BFIN_HYSTERESIS_CONTROL +config GPIO_HYST_PORTF_0_7 + bool "Enable Hysteresis on PORTF {0...7}" +config GPIO_HYST_PORTF_8_9 + bool "Enable Hysteresis on PORTF {8, 9}" +config GPIO_HYST_PORTF_10 + bool "Enable Hysteresis on PORTF 10" +config GPIO_HYST_PORTF_11 + bool "Enable Hysteresis on PORTF 11" +config GPIO_HYST_PORTF_12_13 + bool "Enable Hysteresis on PORTF {12, 13}" +config GPIO_HYST_PORTF_14_15 + bool "Enable Hysteresis on PORTF {14, 15}" +endmenu + +menu "PORT G" + depends on BFIN_HYSTERESIS_CONTROL +config GPIO_HYST_PORTG_0 + bool "Enable Hysteresis on PORTG 0" +config GPIO_HYST_PORTG_1_4 + bool "Enable Hysteresis on PORTG {1...4}" +config GPIO_HYST_PORTG_5_6 + bool "Enable Hysteresis on PORTG {5, 6}" +config GPIO_HYST_PORTG_7_8 + bool "Enable Hysteresis on PORTG {7, 8}" +config GPIO_HYST_PORTG_9 + bool "Enable Hysteresis on PORTG 9" +config GPIO_HYST_PORTG_10 + bool "Enable Hysteresis on PORTG 10" +config GPIO_HYST_PORTG_11_13 + bool "Enable Hysteresis on PORTG {11...13}" +config GPIO_HYST_PORTG_14_15 + bool "Enable Hysteresis on PORTG {14, 15}" +endmenu + +menu "PORT H" + depends on BFIN_HYSTERESIS_CONTROL +config GPIO_HYST_PORTH_0_7 + bool "Enable Hysteresis on PORTH {0...7}" +config GPIO_HYST_PORTH_8 + bool "Enable Hysteresis on PORTH 8" +config GPIO_HYST_PORTH_9_15 + bool "Enable Hysteresis on PORTH {9...15}" +endmenu + +menu "None-GPIO" + depends on BFIN_HYSTERESIS_CONTROL +config NONEGPIO_HYST_TMR0_FS1_PPICLK + bool "Enable Hysteresis on {TMR0, PPI_FS1, PPI_CLK}" +config NONEGPIO_HYST_NMI_RST_BMODE + bool "Enable Hysteresis on {NMI, RESET, BMODE}" +config NONEGPIO_HYST_JTAG + bool "Enable Hysteresis on JTAG" +endmenu + +comment "Interrupt Priority Assignment" +menu "Priority" + +config IRQ_PLL_WAKEUP + int "IRQ_PLL_WAKEUP" + default 7 +config IRQ_DMA0_ERROR + int "IRQ_DMA0_ERROR" + default 7 +config IRQ_DMAR0_BLK + int "IRQ_DMAR0_BLK" + default 7 +config IRQ_DMAR1_BLK + int "IRQ_DMAR1_BLK" + default 7 +config IRQ_DMAR0_OVR + int "IRQ_DMAR0_OVR" + default 7 +config IRQ_DMAR1_OVR + int "IRQ_DMAR1_OVR" + default 7 +config IRQ_PPI_ERROR + int "IRQ_PPI_ERROR" + default 7 +config IRQ_MAC_ERROR + int "IRQ_MAC_ERROR" + default 7 +config IRQ_SPORT0_ERROR + int "IRQ_SPORT0_ERROR" + default 7 +config IRQ_SPORT1_ERROR + int "IRQ_SPORT1_ERROR" + default 7 +config IRQ_UART0_ERROR + int "IRQ_UART0_ERROR" + default 7 +config IRQ_UART1_ERROR + int "IRQ_UART1_ERROR" + default 7 +config IRQ_RTC + int "IRQ_RTC" + default 8 +config IRQ_PPI + int "IRQ_PPI" + default 8 +config IRQ_SPORT0_RX + int "IRQ_SPORT0_RX" + default 9 +config IRQ_SPORT0_TX + int "IRQ_SPORT0_TX" + default 9 +config IRQ_SPORT1_RX + int "IRQ_SPORT1_RX" + default 9 +config IRQ_SPORT1_TX + int "IRQ_SPORT1_TX" + default 9 +config IRQ_TWI + int "IRQ_TWI" + default 10 +config IRQ_SPI + int "IRQ_SPI" + default 10 +config IRQ_UART0_RX + int "IRQ_UART0_RX" + default 10 +config IRQ_UART0_TX + int "IRQ_UART0_TX" + default 10 +config IRQ_UART1_RX + int "IRQ_UART1_RX" + default 10 +config IRQ_UART1_TX + int "IRQ_UART1_TX" + default 10 +config IRQ_OPTSEC + int "IRQ_OPTSEC" + default 11 +config IRQ_CNT + int "IRQ_CNT" + default 11 +config IRQ_MAC_RX + int "IRQ_MAC_RX" + default 11 +config IRQ_PORTH_INTA + int "IRQ_PORTH_INTA" + default 11 +config IRQ_MAC_TX + int "IRQ_MAC_TX/NFC" + default 11 +config IRQ_PORTH_INTB + int "IRQ_PORTH_INTB" + default 11 +config IRQ_TIMER0 + int "IRQ_TIMER0" + default 7 if TICKSOURCE_GPTMR0 + default 8 +config IRQ_TIMER1 + int "IRQ_TIMER1" + default 12 +config IRQ_TIMER2 + int "IRQ_TIMER2" + default 12 +config IRQ_TIMER3 + int "IRQ_TIMER3" + default 12 +config IRQ_TIMER4 + int "IRQ_TIMER4" + default 12 +config IRQ_TIMER5 + int "IRQ_TIMER5" + default 12 +config IRQ_TIMER6 + int "IRQ_TIMER6" + default 12 +config IRQ_TIMER7 + int "IRQ_TIMER7" + default 12 +config IRQ_PORTG_INTA + int "IRQ_PORTG_INTA" + default 12 +config IRQ_PORTG_INTB + int "IRQ_PORTG_INTB" + default 12 +config IRQ_MEM_DMA0 + int "IRQ_MEM_DMA0" + default 13 +config IRQ_MEM_DMA1 + int "IRQ_MEM_DMA1" + default 13 +config IRQ_WATCH + int "IRQ_WATCH" + default 13 +config IRQ_PORTF_INTA + int "IRQ_PORTF_INTA" + default 13 +config IRQ_PORTF_INTB + int "IRQ_PORTF_INTB" + default 13 +config IRQ_SPI_ERROR + int "IRQ_SPI_ERROR" + default 7 +config IRQ_NFC_ERROR + int "IRQ_NFC_ERROR" + default 7 +config IRQ_HDMA_ERROR + int "IRQ_HDMA_ERROR" + default 7 +config IRQ_HDMA + int "IRQ_HDMA" + default 7 +config IRQ_USB_EINT + int "IRQ_USB_EINT" + default 10 +config IRQ_USB_INT0 + int "IRQ_USB_INT0" + default 10 +config IRQ_USB_INT1 + int "IRQ_USB_INT1" + default 10 +config IRQ_USB_INT2 + int "IRQ_USB_INT2" + default 10 +config IRQ_USB_DMA + int "IRQ_USB_DMA" + default 10 + + help + Enter the priority numbers between 7-13 ONLY. Others are Reserved. + This applies to all the above. It is not recommended to assign the + highest priority number 7 to UART or any other device. + +endmenu + +endmenu + +endif |