diff options
Diffstat (limited to 'kernel/arch/avr32/boards/atngw100')
| -rw-r--r-- | kernel/arch/avr32/boards/atngw100/Kconfig | 65 | ||||
| -rw-r--r-- | kernel/arch/avr32/boards/atngw100/Kconfig_mrmt | 80 | ||||
| -rw-r--r-- | kernel/arch/avr32/boards/atngw100/Makefile | 3 | ||||
| -rw-r--r-- | kernel/arch/avr32/boards/atngw100/evklcd10x.c | 178 | ||||
| -rw-r--r-- | kernel/arch/avr32/boards/atngw100/flash.c | 98 | ||||
| -rw-r--r-- | kernel/arch/avr32/boards/atngw100/mrmt.c | 383 | ||||
| -rw-r--r-- | kernel/arch/avr32/boards/atngw100/setup.c | 324 |
7 files changed, 1131 insertions, 0 deletions
diff --git a/kernel/arch/avr32/boards/atngw100/Kconfig b/kernel/arch/avr32/boards/atngw100/Kconfig new file mode 100644 index 000000000..4e55617ad --- /dev/null +++ b/kernel/arch/avr32/boards/atngw100/Kconfig @@ -0,0 +1,65 @@ +# NGW100 customization + +if BOARD_ATNGW100_COMMON + +config BOARD_ATNGW100_MKII_LCD + bool "Enable ATNGW100 mkII LCD interface" + depends on BOARD_ATNGW100_MKII + help + This enables the LCD controller (LCDC) in the AT32AP7000. Since the + LCDC is multiplexed with MACB1 (LAN) Ethernet port, only one can be + enabled at a time. + + This choice enables the LCDC and disables the MACB1 interface marked + LAN on the PCB. + +choice + prompt "Select an NGW100 add-on board to support" + default BOARD_ATNGW100_ADDON_NONE + +config BOARD_ATNGW100_ADDON_NONE + bool "None" + +config BOARD_ATNGW100_EVKLCD10X + bool "EVKLCD10X addon board" + depends on BOARD_ATNGW100_MKI || BOARD_ATNGW100_MKII_LCD + help + This enables support for the EVKLCD100 (QVGA) or EVKLCD101 (VGA) + addon board for the NGW100 and NGW100 mkII. By enabling this the LCD + controller and AC97 controller is added as platform devices. + +config BOARD_ATNGW100_MRMT + bool "Mediama RMT1/2 add-on board" + help + This enables support for the Mediama RMT1 or RMT2 board. + RMT provides LCD support, AC97 codec and other + optional peripherals to the Atmel NGW100. + + This choice disables the detect pin and the write-protect pin for the + MCI platform device, since it conflicts with the LCD platform device. + The MCI pins can be reenabled by editing the "add device function" but + this may break the setup for other displays that use these pins. + +endchoice + +choice + prompt "LCD panel resolution on EVKLCD10X" + depends on BOARD_ATNGW100_EVKLCD10X + default BOARD_ATNGW100_EVKLCD10X_VGA + +config BOARD_ATNGW100_EVKLCD10X_QVGA + bool "QVGA (320x240)" + +config BOARD_ATNGW100_EVKLCD10X_VGA + bool "VGA (640x480)" + +config BOARD_ATNGW100_EVKLCD10X_POW_QVGA + bool "Powertip QVGA (320x240)" + +endchoice + +if BOARD_ATNGW100_MRMT +source "arch/avr32/boards/atngw100/Kconfig_mrmt" +endif + +endif # BOARD_ATNGW100_COMMON diff --git a/kernel/arch/avr32/boards/atngw100/Kconfig_mrmt b/kernel/arch/avr32/boards/atngw100/Kconfig_mrmt new file mode 100644 index 000000000..9a199a207 --- /dev/null +++ b/kernel/arch/avr32/boards/atngw100/Kconfig_mrmt @@ -0,0 +1,80 @@ +# RMT for NGW100 customization + +choice + prompt "RMT Version" + help + Select the RMTx board version. + +config BOARD_MRMT_REV1 + bool "RMT1" +config BOARD_MRMT_REV2 + bool "RMT2" + +endchoice + +config BOARD_MRMT_AC97 + bool "Enable AC97 CODEC" + help + Enable the UCB1400 AC97 CODEC driver. + +choice + prompt "Touchscreen Driver" + default BOARD_MRMT_ADS7846_TS + +config BOARD_MRMT_UCB1400_TS + bool "Use UCB1400 Touchscreen" + +config BOARD_MRMT_ADS7846_TS + bool "Use ADS7846 Touchscreen" + +endchoice + +choice + prompt "RMTx LCD Selection" + default BOARD_MRMT_LCD_DISABLE + +config BOARD_MRMT_LCD_DISABLE + bool "LCD Disabled" + +config BOARD_MRMT_LCD_LQ043T3DX0X + bool "Sharp LQ043T3DX0x or compatible" + help + If using RMT2, be sure to load the resistor pack selectors accordingly + +if BOARD_MRMT_REV2 +config BOARD_MRMT_LCD_KWH043GM08 + bool "Formike KWH043GM08 or compatible" + help + Be sure to load the RMT2 resistor pack selectors accordingly +endif + +endchoice + +if !BOARD_MRMT_LCD_DISABLE +config BOARD_MRMT_BL_PWM + bool "Use PWM control for LCD Backlight" + help + Use PWM driver for controlling LCD Backlight. + Otherwise, LCD Backlight is always on. +endif + +config BOARD_MRMT_RTC_I2C + bool "Use External RTC on I2C Bus" + help + RMT1 has an optional RTC device on the I2C bus. + It is a SII S35390A. Be sure to select the + matching RTC driver. + +choice + prompt "Wireless Module on ttyS2" + default BOARD_MRMT_WIRELESS_ZB + +config BOARD_MRMT_WIRELESS_ZB + bool "Use ZigBee/802.15.4 Module" + +config BOARD_MRMT_WIRELESS_BT + bool "Use Bluetooth (HCI) Module" + +config BOARD_MRMT_WIRELESS_NONE + bool "Not Installed" +endchoice diff --git a/kernel/arch/avr32/boards/atngw100/Makefile b/kernel/arch/avr32/boards/atngw100/Makefile new file mode 100644 index 000000000..f4ebe42a8 --- /dev/null +++ b/kernel/arch/avr32/boards/atngw100/Makefile @@ -0,0 +1,3 @@ +obj-y += setup.o flash.o +obj-$(CONFIG_BOARD_ATNGW100_EVKLCD10X) += evklcd10x.o +obj-$(CONFIG_BOARD_ATNGW100_MRMT) += mrmt.o diff --git a/kernel/arch/avr32/boards/atngw100/evklcd10x.c b/kernel/arch/avr32/boards/atngw100/evklcd10x.c new file mode 100644 index 000000000..64919b0da --- /dev/null +++ b/kernel/arch/avr32/boards/atngw100/evklcd10x.c @@ -0,0 +1,178 @@ +/* + * Board-specific setup code for the ATEVKLCD10X addon board to the ATNGW100 + * Network Gateway + * + * Copyright (C) 2008 Atmel Corporation + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ + +#include <linux/init.h> +#include <linux/linkage.h> +#include <linux/gpio.h> +#include <linux/fb.h> +#include <linux/platform_device.h> + +#include <video/atmel_lcdc.h> + +#include <asm/setup.h> + +#include <mach/at32ap700x.h> +#include <mach/portmux.h> +#include <mach/board.h> + +#include <sound/atmel-ac97c.h> + +static struct ac97c_platform_data __initdata ac97c0_data = { + .reset_pin = GPIO_PIN_PB(19), +}; + +#ifdef CONFIG_BOARD_ATNGW100_EVKLCD10X_VGA +static struct fb_videomode __initdata tcg057vglad_modes[] = { + { + .name = "640x480 @ 50", + .refresh = 50, + .xres = 640, .yres = 480, + .pixclock = KHZ2PICOS(25180), + + .left_margin = 64, .right_margin = 96, + .upper_margin = 34, .lower_margin = 11, + .hsync_len = 64, .vsync_len = 15, + + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + }, +}; + +static struct fb_monspecs __initdata atevklcd10x_default_monspecs = { + .manufacturer = "KYO", + .monitor = "TCG057VGLAD", + .modedb = tcg057vglad_modes, + .modedb_len = ARRAY_SIZE(tcg057vglad_modes), + .hfmin = 19948, + .hfmax = 31478, + .vfmin = 50, + .vfmax = 67, + .dclkmax = 28330000, +}; + +static struct atmel_lcdfb_pdata __initdata atevklcd10x_lcdc_data = { + .default_bpp = 16, + .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, + .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT + | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE + | ATMEL_LCDC_MEMOR_BIG), + .default_monspecs = &atevklcd10x_default_monspecs, + .guard_time = 2, +}; +#elif CONFIG_BOARD_ATNGW100_EVKLCD10X_QVGA +static struct fb_videomode __initdata tcg057qvlad_modes[] = { + { + .name = "320x240 @ 50", + .refresh = 50, + .xres = 320, .yres = 240, + .pixclock = KHZ2PICOS(6300), + + .left_margin = 34, .right_margin = 46, + .upper_margin = 7, .lower_margin = 15, + .hsync_len = 64, .vsync_len = 12, + + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + }, +}; + +static struct fb_monspecs __initdata atevklcd10x_default_monspecs = { + .manufacturer = "KYO", + .monitor = "TCG057QVLAD", + .modedb = tcg057qvlad_modes, + .modedb_len = ARRAY_SIZE(tcg057qvlad_modes), + .hfmin = 19948, + .hfmax = 31478, + .vfmin = 50, + .vfmax = 67, + .dclkmax = 7000000, +}; + +static struct atmel_lcdfb_pdata __initdata atevklcd10x_lcdc_data = { + .default_bpp = 16, + .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, + .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT + | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE + | ATMEL_LCDC_MEMOR_BIG), + .default_monspecs = &atevklcd10x_default_monspecs, + .guard_time = 2, +}; +#elif CONFIG_BOARD_ATNGW100_EVKLCD10X_POW_QVGA +static struct fb_videomode __initdata ph320240t_modes[] = { + { + .name = "320x240 @ 60", + .refresh = 60, + .xres = 320, .yres = 240, + .pixclock = KHZ2PICOS(6300), + + .left_margin = 38, .right_margin = 20, + .upper_margin = 15, .lower_margin = 5, + .hsync_len = 30, .vsync_len = 3, + + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + }, +}; + +static struct fb_monspecs __initdata atevklcd10x_default_monspecs = { + .manufacturer = "POW", + .monitor = "PH320240T", + .modedb = ph320240t_modes, + .modedb_len = ARRAY_SIZE(ph320240t_modes), + .hfmin = 14400, + .hfmax = 21600, + .vfmin = 50, + .vfmax = 90, + .dclkmax = 6400000, +}; + +static struct atmel_lcdfb_pdata __initdata atevklcd10x_lcdc_data = { + .default_bpp = 16, + .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, + .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT + | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE + | ATMEL_LCDC_MEMOR_BIG), + .default_monspecs = &atevklcd10x_default_monspecs, + .guard_time = 2, +}; +#endif + +static void atevklcd10x_lcdc_power_control(struct atmel_lcdfb_pdata *pdata, int on) +{ + gpio_set_value(GPIO_PIN_PB(15), on); +} + +static int __init atevklcd10x_init(void) +{ + /* PB15 is connected to the enable line on the boost regulator + * controlling the backlight for the LCD panel. + */ + at32_select_gpio(GPIO_PIN_PB(15), AT32_GPIOF_OUTPUT); + gpio_request(GPIO_PIN_PB(15), "backlight"); + gpio_direction_output(GPIO_PIN_PB(15), 0); + + atevklcd10x_lcdc_data.atmel_lcdfb_power_control = + atevklcd10x_lcdc_power_control; + + at32_add_device_lcdc(0, &atevklcd10x_lcdc_data, + fbmem_start, fbmem_size, +#ifdef CONFIG_BOARD_ATNGW100_MKII + ATMEL_LCDC_PRI_18BIT | ATMEL_LCDC_PC_DVAL +#else + ATMEL_LCDC_ALT_18BIT | ATMEL_LCDC_PE_DVAL +#endif + ); + + at32_add_device_ac97c(0, &ac97c0_data, AC97C_BOTH); + + return 0; +} +postcore_initcall(atevklcd10x_init); diff --git a/kernel/arch/avr32/boards/atngw100/flash.c b/kernel/arch/avr32/boards/atngw100/flash.c new file mode 100644 index 000000000..55ccc9ce4 --- /dev/null +++ b/kernel/arch/avr32/boards/atngw100/flash.c @@ -0,0 +1,98 @@ +/* + * ATNGW100 board-specific flash initialization + * + * Copyright (C) 2005-2006 Atmel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> + +#include <mach/smc.h> + +static struct smc_timing flash_timing __initdata = { + .ncs_read_setup = 0, + .nrd_setup = 40, + .ncs_write_setup = 0, + .nwe_setup = 10, + + .ncs_read_pulse = 80, + .nrd_pulse = 40, + .ncs_write_pulse = 65, + .nwe_pulse = 55, + + .read_cycle = 120, + .write_cycle = 120, +}; + +static struct smc_config flash_config __initdata = { + .bus_width = 2, + .nrd_controlled = 1, + .nwe_controlled = 1, + .byte_write = 1, +}; + +static struct mtd_partition flash_parts[] = { + { + .name = "u-boot", + .offset = 0x00000000, + .size = 0x00020000, /* 128 KiB */ + .mask_flags = MTD_WRITEABLE, + }, + { + .name = "root", + .offset = 0x00020000, + .size = 0x007d0000, + }, + { + .name = "env", + .offset = 0x007f0000, + .size = 0x00010000, + .mask_flags = MTD_WRITEABLE, + }, +}; + +static struct physmap_flash_data flash_data = { + .width = 2, + .nr_parts = ARRAY_SIZE(flash_parts), + .parts = flash_parts, +}; + +static struct resource flash_resource = { + .start = 0x00000000, + .end = 0x007fffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device flash_device = { + .name = "physmap-flash", + .id = 0, + .resource = &flash_resource, + .num_resources = 1, + .dev = { + .platform_data = &flash_data, + }, +}; + +/* This needs to be called after the SMC has been initialized */ +static int __init atngw100_flash_init(void) +{ + int ret; + + smc_set_timing(&flash_config, &flash_timing); + ret = smc_set_configuration(0, &flash_config); + if (ret < 0) { + printk(KERN_ERR "atngw100: failed to set NOR flash timing\n"); + return ret; + } + + platform_device_register(&flash_device); + + return 0; +} +device_initcall(atngw100_flash_init); diff --git a/kernel/arch/avr32/boards/atngw100/mrmt.c b/kernel/arch/avr32/boards/atngw100/mrmt.c new file mode 100644 index 000000000..91146b416 --- /dev/null +++ b/kernel/arch/avr32/boards/atngw100/mrmt.c @@ -0,0 +1,383 @@ +/* + * Board-specific setup code for Remote Media Terminal 1 (RMT1) + * add-on board for the ATNGW100 Network Gateway + * + * Copyright (C) 2008 Mediama Technologies + * Based on ATNGW100 Network Gateway (Copyright (C) Atmel) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/gpio.h> +#include <linux/init.h> +#include <linux/irq.h> +#include <linux/linkage.h> +#include <linux/platform_device.h> +#include <linux/types.h> +#include <linux/fb.h> +#include <linux/leds.h> +#include <linux/pwm.h> +#include <linux/leds_pwm.h> +#include <linux/input.h> +#include <linux/gpio_keys.h> +#include <linux/atmel_serial.h> +#include <linux/spi/spi.h> +#include <linux/spi/ads7846.h> + +#include <video/atmel_lcdc.h> +#include <sound/atmel-ac97c.h> + +#include <asm/delay.h> +#include <asm/io.h> +#include <asm/setup.h> + +#include <mach/at32ap700x.h> +#include <mach/board.h> +#include <mach/init.h> +#include <mach/portmux.h> + +/* Define board-specifoic GPIO assignments */ +#define PIN_LCD_BL GPIO_PIN_PA(28) +#define PWM_CH_BL 0 /* Must match with GPIO pin definition */ +#define PIN_LCD_DISP GPIO_PIN_PA(31) +#define PIN_AC97_RST_N GPIO_PIN_PA(30) +#define PB_EXTINT_BASE 25 +#define TS_IRQ 0 +#define PIN_TS_EXTINT GPIO_PIN_PB(PB_EXTINT_BASE+TS_IRQ) +#define PIN_PB_LEFT GPIO_PIN_PB(11) +#define PIN_PB_RIGHT GPIO_PIN_PB(12) +#define PIN_PWR_SW_N GPIO_PIN_PB(14) +#define PIN_PWR_ON GPIO_PIN_PB(13) +#define PIN_ZB_RST_N GPIO_PIN_PA(21) +#define PIN_BT_RST GPIO_PIN_PA(22) +#define PIN_LED_SYS GPIO_PIN_PA(16) +#define PIN_LED_A GPIO_PIN_PA(19) +#define PIN_LED_B GPIO_PIN_PE(19) + +#ifdef CONFIG_BOARD_MRMT_LCD_LQ043T3DX0X +/* Sharp LQ043T3DX0x (or compatible) panel */ +static struct fb_videomode __initdata lcd_fb_modes[] = { + { + .name = "480x272 @ 59.94Hz", + .refresh = 59.94, + .xres = 480, .yres = 272, + .pixclock = KHZ2PICOS(9000), + + .left_margin = 2, .right_margin = 2, + .upper_margin = 3, .lower_margin = 9, + .hsync_len = 41, .vsync_len = 1, + + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + }, +}; + +static struct fb_monspecs __initdata lcd_fb_default_monspecs = { + .manufacturer = "SHA", + .monitor = "LQ043T3DX02", + .modedb = lcd_fb_modes, + .modedb_len = ARRAY_SIZE(lcd_fb_modes), + .hfmin = 14915, + .hfmax = 17638, + .vfmin = 53, + .vfmax = 61, + .dclkmax = 9260000, +}; + +static struct atmel_lcdfb_pdata __initdata rmt_lcdc_data = { + .default_bpp = 24, + .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, + .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT + | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE + | ATMEL_LCDC_INVCLK_NORMAL + | ATMEL_LCDC_MEMOR_BIG), + .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB, + .default_monspecs = &lcd_fb_default_monspecs, + .guard_time = 2, +}; +#endif + +#ifdef CONFIG_BOARD_MRMT_LCD_KWH043GM08 +/* Sharp KWH043GM08-Fxx (or compatible) panel */ +static struct fb_videomode __initdata lcd_fb_modes[] = { + { + .name = "480x272 @ 59.94Hz", + .refresh = 59.94, + .xres = 480, .yres = 272, + .pixclock = KHZ2PICOS(9000), + + .left_margin = 2, .right_margin = 2, + .upper_margin = 3, .lower_margin = 9, + .hsync_len = 41, .vsync_len = 1, + + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + }, +}; + +static struct fb_monspecs __initdata lcd_fb_default_monspecs = { + .manufacturer = "FOR", + .monitor = "KWH043GM08", + .modedb = lcd_fb_modes, + .modedb_len = ARRAY_SIZE(lcd_fb_modes), + .hfmin = 14915, + .hfmax = 17638, + .vfmin = 53, + .vfmax = 61, + .dclkmax = 9260000, +}; + +static struct atmel_lcdfb_pdata __initdata rmt_lcdc_data = { + .default_bpp = 24, + .default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, + .default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT + | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE + | ATMEL_LCDC_INVCLK_INVERTED + | ATMEL_LCDC_MEMOR_BIG), + .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB, + .default_monspecs = &lcd_fb_default_monspecs, + .guard_time = 2, +}; +#endif + +#ifdef CONFIG_BOARD_MRMT_AC97 +static struct ac97c_platform_data __initdata ac97c0_data = { + .reset_pin = PIN_AC97_RST_N, +}; +#endif + +#ifdef CONFIG_BOARD_MRMT_UCB1400_TS +/* NOTE: IRQ assignment relies on kernel module parameter */ +static struct platform_device rmt_ts_device = { + .name = "ucb1400_ts", + .id = -1, +}; +#endif + +#ifdef CONFIG_BOARD_MRMT_BL_PWM +/* PWM LEDs: LCD Backlight, etc */ +static struct pwm_lookup pwm_lookup[] = { + PWM_LOOKUP("at91sam9rl-pwm", PWM_CH_BL, "leds_pwm", "ds1", + 5000, PWM_POLARITY_INVERSED), +}; + +static struct led_pwm pwm_leds[] = { + { + .name = "backlight", + .max_brightness = 255, + }, +}; + +static struct led_pwm_platform_data pwm_data = { + .num_leds = ARRAY_SIZE(pwm_leds), + .leds = pwm_leds, +}; + +static struct platform_device leds_pwm = { + .name = "leds_pwm", + .id = -1, + .dev = { + .platform_data = &pwm_data, + }, +}; +#endif + +#ifdef CONFIG_BOARD_MRMT_ADS7846_TS +static int ads7846_pendown_state(void) +{ + return !gpio_get_value( PIN_TS_EXTINT ); /* PENIRQ.*/ +} + +static struct ads7846_platform_data ads_info = { + .model = 7846, + .keep_vref_on = 0, /* Use external VREF pin */ + .vref_delay_usecs = 0, + .vref_mv = 3300, /* VREF = 3.3V */ + .settle_delay_usecs = 800, + .penirq_recheck_delay_usecs = 800, + .x_plate_ohms = 750, + .y_plate_ohms = 300, + .pressure_max = 4096, + .debounce_max = 1, + .debounce_rep = 0, + .debounce_tol = (~0), + .get_pendown_state = ads7846_pendown_state, + .filter = NULL, + .filter_init = NULL, +}; + +static struct spi_board_info spi01_board_info[] __initdata = { + { + .modalias = "ads7846", + .max_speed_hz = 31250*26, + .bus_num = 0, + .chip_select = 1, + .platform_data = &ads_info, + .irq = AT32_EXTINT(TS_IRQ), + }, +}; +#endif + +/* GPIO Keys: left, right, power, etc */ +static const struct gpio_keys_button rmt_gpio_keys_buttons[] = { + [0] = { + .type = EV_KEY, + .code = KEY_POWER, + .gpio = PIN_PWR_SW_N, + .active_low = 1, + .desc = "power button", + }, + [1] = { + .type = EV_KEY, + .code = KEY_LEFT, + .gpio = PIN_PB_LEFT, + .active_low = 1, + .desc = "left button", + }, + [2] = { + .type = EV_KEY, + .code = KEY_RIGHT, + .gpio = PIN_PB_RIGHT, + .active_low = 1, + .desc = "right button", + }, +}; + +static const struct gpio_keys_platform_data rmt_gpio_keys_data = { + .nbuttons = ARRAY_SIZE(rmt_gpio_keys_buttons), + .buttons = (void *) rmt_gpio_keys_buttons, +}; + +static struct platform_device rmt_gpio_keys = { + .name = "gpio-keys", + .id = -1, + .dev = { + .platform_data = (void *) &rmt_gpio_keys_data, + } +}; + +#ifdef CONFIG_BOARD_MRMT_RTC_I2C +static struct i2c_board_info __initdata mrmt1_i2c_rtc = { + I2C_BOARD_INFO("s35390a", 0x30), + .irq = 0, +}; +#endif + +static void mrmt_power_off(void) +{ + /* PWR_ON=0 will force power off */ + gpio_set_value( PIN_PWR_ON, 0 ); +} + +static int __init mrmt1_init(void) +{ + gpio_set_value( PIN_PWR_ON, 1 ); /* Ensure PWR_ON is enabled */ + + pm_power_off = mrmt_power_off; + + /* Setup USARTS (other than console) */ + at32_map_usart(2, 1, 0); /* USART 2: /dev/ttyS1, RMT1:DB9M */ + at32_map_usart(3, 2, ATMEL_USART_RTS | ATMEL_USART_CTS); + /* USART 3: /dev/ttyS2, RMT1:Wireless, w/ RTS/CTS */ + at32_add_device_usart(1); + at32_add_device_usart(2); + + /* Select GPIO Key pins */ + at32_select_gpio( PIN_PWR_SW_N, AT32_GPIOF_DEGLITCH); + at32_select_gpio( PIN_PB_LEFT, AT32_GPIOF_DEGLITCH); + at32_select_gpio( PIN_PB_RIGHT, AT32_GPIOF_DEGLITCH); + platform_device_register(&rmt_gpio_keys); + +#ifdef CONFIG_BOARD_MRMT_RTC_I2C + i2c_register_board_info(0, &mrmt1_i2c_rtc, 1); +#endif + +#ifndef CONFIG_BOARD_MRMT_LCD_DISABLE + /* User "alternate" LCDC inferface on Port E & D */ + /* NB: exclude LCDC_CC pin, as NGW100 reserves it for other use */ + at32_add_device_lcdc(0, &rmt_lcdc_data, + fbmem_start, fbmem_size, + (ATMEL_LCDC_ALT_24BIT | ATMEL_LCDC_PE_DVAL ) ); +#endif + +#ifdef CONFIG_BOARD_MRMT_AC97 + at32_add_device_ac97c(0, &ac97c0_data, AC97C_BOTH); +#endif + +#ifdef CONFIG_BOARD_MRMT_ADS7846_TS + /* Select the Touchscreen interrupt pin mode */ + at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ), + GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); + irq_set_irq_type(AT32_EXTINT(TS_IRQ), IRQ_TYPE_EDGE_FALLING); + at32_spi_setup_slaves(0,spi01_board_info,ARRAY_SIZE(spi01_board_info)); + spi_register_board_info(spi01_board_info,ARRAY_SIZE(spi01_board_info)); +#endif + +#ifdef CONFIG_BOARD_MRMT_UCB1400_TS + /* Select the Touchscreen interrupt pin mode */ + at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ), + GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); + platform_device_register(&rmt_ts_device); +#endif + + at32_select_gpio( PIN_LCD_DISP, AT32_GPIOF_OUTPUT ); + gpio_request( PIN_LCD_DISP, "LCD_DISP" ); + gpio_direction_output( PIN_LCD_DISP, 0 ); /* LCD DISP */ +#ifdef CONFIG_BOARD_MRMT_LCD_DISABLE + /* Keep Backlight and DISP off */ + at32_select_gpio( PIN_LCD_BL, AT32_GPIOF_OUTPUT ); + gpio_request( PIN_LCD_BL, "LCD_BL" ); + gpio_direction_output( PIN_LCD_BL, 0 ); /* Backlight */ +#else + gpio_set_value( PIN_LCD_DISP, 1 ); /* DISP asserted first */ +#ifdef CONFIG_BOARD_MRMT_BL_PWM + /* Use PWM for Backlight controls */ + at32_add_device_pwm(1 << PWM_CH_BL); + pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup)); + platform_device_register(&leds_pwm); +#else + /* Backlight always on */ + udelay( 1 ); + at32_select_gpio( PIN_LCD_BL, AT32_GPIOF_OUTPUT ); + gpio_request( PIN_LCD_BL, "LCD_BL" ); + gpio_direction_output( PIN_LCD_BL, 1 ); +#endif +#endif + + /* Make sure BT and Zigbee modules in reset */ + at32_select_gpio( PIN_BT_RST, AT32_GPIOF_OUTPUT ); + gpio_request( PIN_BT_RST, "BT_RST" ); + gpio_direction_output( PIN_BT_RST, 1 ); + /* BT Module in Reset */ + + at32_select_gpio( PIN_ZB_RST_N, AT32_GPIOF_OUTPUT ); + gpio_request( PIN_ZB_RST_N, "ZB_RST_N" ); + gpio_direction_output( PIN_ZB_RST_N, 0 ); + /* XBee Module in Reset */ + +#ifdef CONFIG_BOARD_MRMT_WIRELESS_ZB + udelay( 1000 ); + /* Unreset the XBee Module */ + gpio_set_value( PIN_ZB_RST_N, 1 ); +#endif +#ifdef CONFIG_BOARD_MRMT_WIRELESS_BT + udelay( 1000 ); + /* Unreset the BT Module */ + gpio_set_value( PIN_BT_RST, 0 ); +#endif + + return 0; +} +arch_initcall(mrmt1_init); + +static int __init mrmt1_early_init(void) +{ + /* To maintain power-on signal in case boot loader did not already */ + at32_select_gpio( PIN_PWR_ON, AT32_GPIOF_OUTPUT ); + gpio_request( PIN_PWR_ON, "PIN_PWR_ON" ); + gpio_direction_output( PIN_PWR_ON, 1 ); + + return 0; +} +core_initcall(mrmt1_early_init); diff --git a/kernel/arch/avr32/boards/atngw100/setup.c b/kernel/arch/avr32/boards/atngw100/setup.c new file mode 100644 index 000000000..afeae8978 --- /dev/null +++ b/kernel/arch/avr32/boards/atngw100/setup.c @@ -0,0 +1,324 @@ +/* + * Board-specific setup code for the ATNGW100 Network Gateway + * + * Copyright (C) 2005-2006 Atmel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/clk.h> +#include <linux/etherdevice.h> +#include <linux/gpio.h> +#include <linux/irq.h> +#include <linux/i2c.h> +#include <linux/i2c-gpio.h> +#include <linux/init.h> +#include <linux/linkage.h> +#include <linux/platform_device.h> +#include <linux/types.h> +#include <linux/leds.h> +#include <linux/spi/spi.h> +#include <linux/atmel-mci.h> +#include <linux/usb/atmel_usba_udc.h> + +#include <asm/io.h> +#include <asm/setup.h> + +#include <mach/at32ap700x.h> +#include <mach/board.h> +#include <mach/init.h> +#include <mach/portmux.h> + +/* Oscillator frequencies. These are board-specific */ +unsigned long at32_board_osc_rates[3] = { + [0] = 32768, /* 32.768 kHz on RTC osc */ + [1] = 20000000, /* 20 MHz on osc0 */ + [2] = 12000000, /* 12 MHz on osc1 */ +}; + +/* + * The ATNGW100 mkII is very similar to the ATNGW100. Both have the AT32AP7000 + * chip on board; the difference is that the ATNGW100 mkII has 128 MB 32-bit + * SDRAM (the ATNGW100 has 32 MB 16-bit SDRAM) and 256 MB 16-bit NAND flash + * (the ATNGW100 has none.) + * + * The RAM difference is handled by the boot loader, so the only difference we + * end up handling here is the NAND flash, EBI pin reservation and if LCDC or + * MACB1 should be enabled. + */ +#ifdef CONFIG_BOARD_ATNGW100_MKII +#include <linux/mtd/partitions.h> +#include <mach/smc.h> + +static struct smc_timing nand_timing __initdata = { + .ncs_read_setup = 0, + .nrd_setup = 10, + .ncs_write_setup = 0, + .nwe_setup = 10, + + .ncs_read_pulse = 30, + .nrd_pulse = 15, + .ncs_write_pulse = 30, + .nwe_pulse = 15, + + .read_cycle = 30, + .write_cycle = 30, + + .ncs_read_recover = 0, + .nrd_recover = 15, + .ncs_write_recover = 0, + /* WE# high -> RE# low min 60 ns */ + .nwe_recover = 50, +}; + +static struct smc_config nand_config __initdata = { + .bus_width = 2, + .nrd_controlled = 1, + .nwe_controlled = 1, + .nwait_mode = 0, + .byte_write = 0, + .tdf_cycles = 2, + .tdf_mode = 0, +}; + +static struct mtd_partition nand_partitions[] = { + { + .name = "main", + .offset = 0x00000000, + .size = MTDPART_SIZ_FULL, + }, +}; + + +static struct atmel_nand_data atngw100mkii_nand_data __initdata = { + .cle = 21, + .ale = 22, + .rdy_pin = GPIO_PIN_PB(28), + .enable_pin = GPIO_PIN_PE(23), + .bus_width_16 = true, + .ecc_mode = NAND_ECC_SOFT, + .parts = nand_partitions, + .num_parts = ARRAY_SIZE(nand_partitions), +}; +#endif + +/* Initialized by bootloader-specific startup code. */ +struct tag *bootloader_tags __initdata; + +struct eth_addr { + u8 addr[6]; +}; +static struct eth_addr __initdata hw_addr[2]; +static struct macb_platform_data __initdata eth_data[2]; + +static struct spi_board_info spi0_board_info[] __initdata = { + { + .modalias = "mtd_dataflash", + .max_speed_hz = 8000000, + .chip_select = 0, + }, +}; + +static struct mci_platform_data __initdata mci0_data = { + .slot[0] = { + .bus_width = 4, +#if defined(CONFIG_BOARD_ATNGW100_MKII) + .detect_pin = GPIO_PIN_PC(25), + .wp_pin = GPIO_PIN_PE(22), +#else + .detect_pin = GPIO_PIN_PC(25), + .wp_pin = GPIO_PIN_PE(0), +#endif + }, +}; + +static struct usba_platform_data atngw100_usba_data __initdata = { +#if defined(CONFIG_BOARD_ATNGW100_MKII) + .vbus_pin = GPIO_PIN_PE(26), +#else + .vbus_pin = -ENODEV, +#endif +}; + +/* + * The next two functions should go away as the boot loader is + * supposed to initialize the macb address registers with a valid + * ethernet address. But we need to keep it around for a while until + * we can be reasonably sure the boot loader does this. + * + * The phy_id is ignored as the driver will probe for it. + */ +static int __init parse_tag_ethernet(struct tag *tag) +{ + int i; + + i = tag->u.ethernet.mac_index; + if (i < ARRAY_SIZE(hw_addr)) + memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address, + sizeof(hw_addr[i].addr)); + + return 0; +} +__tagtable(ATAG_ETHERNET, parse_tag_ethernet); + +static void __init set_hw_addr(struct platform_device *pdev) +{ + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + const u8 *addr; + void __iomem *regs; + struct clk *pclk; + + if (!res) + return; + if (pdev->id >= ARRAY_SIZE(hw_addr)) + return; + + addr = hw_addr[pdev->id].addr; + if (!is_valid_ether_addr(addr)) + return; + + /* + * Since this is board-specific code, we'll cheat and use the + * physical address directly as we happen to know that it's + * the same as the virtual address. + */ + regs = (void __iomem __force *)res->start; + pclk = clk_get(&pdev->dev, "pclk"); + if (IS_ERR(pclk)) + return; + + clk_enable(pclk); + __raw_writel((addr[3] << 24) | (addr[2] << 16) + | (addr[1] << 8) | addr[0], regs + 0x98); + __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c); + clk_disable(pclk); + clk_put(pclk); +} + +void __init setup_board(void) +{ + at32_map_usart(1, 0, 0); /* USART 1: /dev/ttyS0, DB9 */ + at32_setup_serial_console(0); +} + +static const struct gpio_led ngw_leds[] = { + { .name = "sys", .gpio = GPIO_PIN_PA(16), .active_low = 1, + .default_trigger = "heartbeat", + }, + { .name = "a", .gpio = GPIO_PIN_PA(19), .active_low = 1, }, + { .name = "b", .gpio = GPIO_PIN_PE(19), .active_low = 1, }, +}; + +static const struct gpio_led_platform_data ngw_led_data = { + .num_leds = ARRAY_SIZE(ngw_leds), + .leds = (void *) ngw_leds, +}; + +static struct platform_device ngw_gpio_leds = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = (void *) &ngw_led_data, + } +}; + +static struct i2c_gpio_platform_data i2c_gpio_data = { + .sda_pin = GPIO_PIN_PA(6), + .scl_pin = GPIO_PIN_PA(7), + .sda_is_open_drain = 1, + .scl_is_open_drain = 1, + .udelay = 2, /* close to 100 kHz */ +}; + +static struct platform_device i2c_gpio_device = { + .name = "i2c-gpio", + .id = 0, + .dev = { + .platform_data = &i2c_gpio_data, + }, +}; + +static struct i2c_board_info __initdata i2c_info[] = { + /* NOTE: original ATtiny24 firmware is at address 0x0b */ +}; + +static int __init atngw100_init(void) +{ + unsigned i; + + /* + * ATNGW100 mkII uses 32-bit SDRAM interface. Reserve the + * SDRAM-specific pins so that nobody messes with them. + */ +#ifdef CONFIG_BOARD_ATNGW100_MKII + at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL); + + smc_set_timing(&nand_config, &nand_timing); + smc_set_configuration(3, &nand_config); + at32_add_device_nand(0, &atngw100mkii_nand_data); +#endif + + at32_add_device_usart(0); + + set_hw_addr(at32_add_device_eth(0, ð_data[0])); +#ifndef CONFIG_BOARD_ATNGW100_MKII_LCD + set_hw_addr(at32_add_device_eth(1, ð_data[1])); +#endif + + at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); + at32_add_device_mci(0, &mci0_data); + at32_add_device_usba(0, &atngw100_usba_data); + + for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { + at32_select_gpio(ngw_leds[i].gpio, + AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); + } + platform_device_register(&ngw_gpio_leds); + + /* all these i2c/smbus pins should have external pullups for + * open-drain sharing among all I2C devices. SDA and SCL do; + * PB28/EXTINT3 (ATNGW100) and PE21 (ATNGW100 mkII) doesn't; it should + * be SMBALERT# (for PMBus), but it's not available off-board. + */ +#ifdef CONFIG_BOARD_ATNGW100_MKII + at32_select_periph(GPIO_PIOE_BASE, 1 << 21, 0, AT32_GPIOF_PULLUP); +#else + at32_select_periph(GPIO_PIOB_BASE, 1 << 28, 0, AT32_GPIOF_PULLUP); +#endif + at32_select_gpio(i2c_gpio_data.sda_pin, + AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); + at32_select_gpio(i2c_gpio_data.scl_pin, + AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); + platform_device_register(&i2c_gpio_device); + i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info)); + + return 0; +} +postcore_initcall(atngw100_init); + +static int __init atngw100_arch_init(void) +{ + /* PB30 (ATNGW100) and PE30 (ATNGW100 mkII) is the otherwise unused + * jumper on the mainboard, with an external pullup; the jumper grounds + * it. Use it however you like, including letting U-Boot or Linux tweak + * boot sequences. + */ +#ifdef CONFIG_BOARD_ATNGW100_MKII + at32_select_gpio(GPIO_PIN_PE(30), 0); + gpio_request(GPIO_PIN_PE(30), "j15"); + gpio_direction_input(GPIO_PIN_PE(30)); + gpio_export(GPIO_PIN_PE(30), false); +#else + at32_select_gpio(GPIO_PIN_PB(30), 0); + gpio_request(GPIO_PIN_PB(30), "j15"); + gpio_direction_input(GPIO_PIN_PB(30)); + gpio_export(GPIO_PIN_PB(30), false); +#endif + + /* set_irq_type() after the arch_initcall for EIC has run, and + * before the I2C subsystem could try using this IRQ. + */ + return irq_set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING); +} +arch_initcall(atngw100_arch_init); |