1 files changed, 23 insertions, 25 deletions

diff --git a/kernel/arch/arm/mach-footbridge/dc21285-timer.c b/kernel/arch/arm/mach-footbridge/dc21285-timer.c
index bf7aa7d29..810edc78c 100644
--- a/kernel/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/kernel/arch/arm/mach-footbridge/dc21285-timer.c
@@ -57,34 +57,32 @@ static int ckevt_dc21285_set_next_event(unsigned long delta,
 	return 0;
 }
 
-static void ckevt_dc21285_set_mode(enum clock_event_mode mode,
-	struct clock_event_device *c)
+static int ckevt_dc21285_shutdown(struct clock_event_device *c)
 {
-	switch (mode) {
-	case CLOCK_EVT_MODE_RESUME:
-	case CLOCK_EVT_MODE_PERIODIC:
-		*CSR_TIMER1_CLR = 0;
-		*CSR_TIMER1_LOAD = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
-		*CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD |
-				   TIMER_CNTL_DIV16;
-		break;
-
-	case CLOCK_EVT_MODE_ONESHOT:
-	case CLOCK_EVT_MODE_UNUSED:
-	case CLOCK_EVT_MODE_SHUTDOWN:
-		*CSR_TIMER1_CNTL = 0;
-		break;
-	}
+	*CSR_TIMER1_CNTL = 0;
+	return 0;
+}
+
+static int ckevt_dc21285_set_periodic(struct clock_event_device *c)
+{
+	*CSR_TIMER1_CLR = 0;
+	*CSR_TIMER1_LOAD = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
+	*CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD |
+			   TIMER_CNTL_DIV16;
+	return 0;
 }
 
 static struct clock_event_device ckevt_dc21285 = {
-	.name		= "dc21285_timer1",
-	.features	= CLOCK_EVT_FEAT_PERIODIC |
-			  CLOCK_EVT_FEAT_ONESHOT,
-	.rating		= 200,
-	.irq		= IRQ_TIMER1,
-	.set_next_event	= ckevt_dc21285_set_next_event,
-	.set_mode	= ckevt_dc21285_set_mode,
+	.name			= "dc21285_timer1",
+	.features		= CLOCK_EVT_FEAT_PERIODIC |
+				  CLOCK_EVT_FEAT_ONESHOT,
+	.rating			= 200,
+	.irq			= IRQ_TIMER1,
+	.set_next_event		= ckevt_dc21285_set_next_event,
+	.set_state_shutdown	= ckevt_dc21285_shutdown,
+	.set_state_periodic	= ckevt_dc21285_set_periodic,
+	.set_state_oneshot	= ckevt_dc21285_shutdown,
+	.tick_resume		= ckevt_dc21285_set_periodic,
 };
 
 static irqreturn_t timer1_interrupt(int irq, void *dev_id)
@@ -94,7 +92,7 @@ static irqreturn_t timer1_interrupt(int irq, void *dev_id)
 	*CSR_TIMER1_CLR = 0;
 
 	/* Stop the timer if in one-shot mode */
-	if (ce->mode == CLOCK_EVT_MODE_ONESHOT)
+	if (clockevent_state_oneshot(ce))
 		*CSR_TIMER1_CNTL = 0;
 
 	ce->event_handler(ce);