diff options
Diffstat (limited to 'kernel/arch/arm/mach-ep93xx')
24 files changed, 4545 insertions, 0 deletions
diff --git a/kernel/arch/arm/mach-ep93xx/Kconfig b/kernel/arch/arm/mach-ep93xx/Kconfig new file mode 100644 index 000000000..bec570ae6 --- /dev/null +++ b/kernel/arch/arm/mach-ep93xx/Kconfig @@ -0,0 +1,200 @@ +if ARCH_EP93XX + +menu "Cirrus EP93xx Implementation Options" + +config EP93XX_SOC_COMMON + bool + default y + select SOC_BUS + select LEDS_GPIO_REGISTER + +config CRUNCH + bool "Support for MaverickCrunch" + help + Enable kernel support for MaverickCrunch. + +comment "EP93xx Platforms" + +choice + prompt "EP93xx first SDRAM bank selection" + default EP93XX_SDCE3_SYNC_PHYS_OFFSET + +config EP93XX_SDCE3_SYNC_PHYS_OFFSET + bool "0x00000000 - SDCE3/SyncBoot" + help + Select this option if you want support for EP93xx boards with the + first SDRAM bank at 0x00000000. + +config EP93XX_SDCE0_PHYS_OFFSET + bool "0xc0000000 - SDCEO" + help + Select this option if you want support for EP93xx boards with the + first SDRAM bank at 0xc0000000. + +config EP93XX_SDCE1_PHYS_OFFSET + bool "0xd0000000 - SDCE1" + help + Select this option if you want support for EP93xx boards with the + first SDRAM bank at 0xd0000000. + +config EP93XX_SDCE2_PHYS_OFFSET + bool "0xe0000000 - SDCE2" + help + Select this option if you want support for EP93xx boards with the + first SDRAM bank at 0xe0000000. + +config EP93XX_SDCE3_ASYNC_PHYS_OFFSET + bool "0xf0000000 - SDCE3/AsyncBoot" + help + Select this option if you want support for EP93xx boards with the + first SDRAM bank at 0xf0000000. + +endchoice + +config MACH_ADSSPHERE + bool "Support ADS Sphere" + depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET + help + Say 'Y' here if you want your kernel to support the ADS + Sphere board. + +config MACH_EDB93XX + bool + +config MACH_EDB9301 + bool "Support Cirrus Logic EDB9301" + depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET + select MACH_EDB93XX + help + Say 'Y' here if you want your kernel to support the Cirrus + Logic EDB9301 Evaluation Board. + +config MACH_EDB9302 + bool "Support Cirrus Logic EDB9302" + depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET + select MACH_EDB93XX + help + Say 'Y' here if you want your kernel to support the Cirrus + Logic EDB9302 Evaluation Board. + +config MACH_EDB9302A + bool "Support Cirrus Logic EDB9302A" + depends on EP93XX_SDCE0_PHYS_OFFSET + select MACH_EDB93XX + help + Say 'Y' here if you want your kernel to support the Cirrus + Logic EDB9302A Evaluation Board. + +config MACH_EDB9307 + bool "Support Cirrus Logic EDB9307" + depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET + select MACH_EDB93XX + help + Say 'Y' here if you want your kernel to support the Cirrus + Logic EDB9307 Evaluation Board. + +config MACH_EDB9307A + bool "Support Cirrus Logic EDB9307A" + depends on EP93XX_SDCE0_PHYS_OFFSET + select MACH_EDB93XX + help + Say 'Y' here if you want your kernel to support the Cirrus + Logic EDB9307A Evaluation Board. + +config MACH_EDB9312 + bool "Support Cirrus Logic EDB9312" + depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET + select MACH_EDB93XX + help + Say 'Y' here if you want your kernel to support the Cirrus + Logic EDB9312 Evaluation Board. + +config MACH_EDB9315 + bool "Support Cirrus Logic EDB9315" + depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET + select MACH_EDB93XX + help + Say 'Y' here if you want your kernel to support the Cirrus + Logic EDB9315 Evaluation Board. + +config MACH_EDB9315A + bool "Support Cirrus Logic EDB9315A" + depends on EP93XX_SDCE0_PHYS_OFFSET + select MACH_EDB93XX + help + Say 'Y' here if you want your kernel to support the Cirrus + Logic EDB9315A Evaluation Board. + +config MACH_GESBC9312 + depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET + bool "Support Glomation GESBC-9312-sx" + help + Say 'Y' here if you want your kernel to support the Glomation + GESBC-9312-sx board. + +config MACH_MICRO9 + bool + +config MACH_MICRO9H + bool "Support Contec Micro9-High" + depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET + select MACH_MICRO9 + help + Say 'Y' here if you want your kernel to support the + Contec Micro9-High board. + +config MACH_MICRO9M + bool "Support Contec Micro9-Mid" + depends on EP93XX_SDCE3_ASYNC_PHYS_OFFSET + select MACH_MICRO9 + help + Say 'Y' here if you want your kernel to support the + Contec Micro9-Mid board. + +config MACH_MICRO9L + bool "Support Contec Micro9-Lite" + depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET + select MACH_MICRO9 + help + Say 'Y' here if you want your kernel to support the + Contec Micro9-Lite board. + +config MACH_MICRO9S + bool "Support Contec Micro9-Slim" + depends on EP93XX_SDCE3_ASYNC_PHYS_OFFSET + select MACH_MICRO9 + help + Say 'Y' here if you want your kernel to support the + Contec Micro9-Slim board. + +config MACH_SIM_ONE + bool "Support Simplemachines Sim.One board" + depends on EP93XX_SDCE0_PHYS_OFFSET + help + Say 'Y' here if you want your kernel to support the + Simplemachines Sim.One board. + +config MACH_SNAPPER_CL15 + bool "Support Bluewater Systems Snapper CL15 Module" + depends on EP93XX_SDCE0_PHYS_OFFSET + help + Say 'Y' here if you want your kernel to support the Bluewater + Systems Snapper CL15 Module. + +config MACH_TS72XX + bool "Support Technologic Systems TS-72xx SBC" + depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET + help + Say 'Y' here if you want your kernel to support the + Technologic Systems TS-72xx board. + +config MACH_VISION_EP9307 + bool "Support Vision Engraving Systems EP9307 SoM" + depends on EP93XX_SDCE0_PHYS_OFFSET + help + Say 'Y' here if you want your kernel to support the + Vision Engraving Systems EP9307 SoM. + +endmenu + +endif diff --git a/kernel/arch/arm/mach-ep93xx/Makefile b/kernel/arch/arm/mach-ep93xx/Makefile new file mode 100644 index 000000000..78d427b34 --- /dev/null +++ b/kernel/arch/arm/mach-ep93xx/Makefile @@ -0,0 +1,18 @@ +# +# Makefile for the linux kernel. +# +obj-y := core.o clock.o + +obj-$(CONFIG_EP93XX_DMA) += dma.o + +obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o +AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 + +obj-$(CONFIG_MACH_ADSSPHERE) += adssphere.o +obj-$(CONFIG_MACH_EDB93XX) += edb93xx.o +obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o +obj-$(CONFIG_MACH_MICRO9) += micro9.o +obj-$(CONFIG_MACH_SIM_ONE) += simone.o +obj-$(CONFIG_MACH_SNAPPER_CL15) += snappercl15.o +obj-$(CONFIG_MACH_TS72XX) += ts72xx.o +obj-$(CONFIG_MACH_VISION_EP9307)+= vision_ep9307.o diff --git a/kernel/arch/arm/mach-ep93xx/Makefile.boot b/kernel/arch/arm/mach-ep93xx/Makefile.boot new file mode 100644 index 000000000..d3113a71c --- /dev/null +++ b/kernel/arch/arm/mach-ep93xx/Makefile.boot @@ -0,0 +1,14 @@ + zreladdr-$(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET) += 0x00008000 +params_phys-$(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET) := 0x00000100 + + zreladdr-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) += 0xc0008000 +params_phys-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0000100 + + zreladdr-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET) += 0xd0008000 +params_phys-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET) := 0xd0000100 + + zreladdr-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET) += 0xe0008000 +params_phys-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET) := 0xe0000100 + + zreladdr-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET) += 0xf0008000 +params_phys-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET) := 0xf0000100 diff --git a/kernel/arch/arm/mach-ep93xx/adssphere.c b/kernel/arch/arm/mach-ep93xx/adssphere.c new file mode 100644 index 000000000..bda6c3a5c --- /dev/null +++ b/kernel/arch/arm/mach-ep93xx/adssphere.c @@ -0,0 +1,45 @@ +/* + * arch/arm/mach-ep93xx/adssphere.c + * ADS Sphere support. + * + * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or (at + * your option) any later version. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/sizes.h> + +#include <mach/hardware.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> + +#include "soc.h" + +static struct ep93xx_eth_data __initdata adssphere_eth_data = { + .phy_id = 1, +}; + +static void __init adssphere_init_machine(void) +{ + ep93xx_init_devices(); + ep93xx_register_flash(4, EP93XX_CS6_PHYS_BASE, SZ_32M); + ep93xx_register_eth(&adssphere_eth_data, 1); +} + +MACHINE_START(ADSSPHERE, "ADS Sphere board") + /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ + .atag_offset = 0x100, + .map_io = ep93xx_map_io, + .init_irq = ep93xx_init_irq, + .init_time = ep93xx_timer_init, + .init_machine = adssphere_init_machine, + .init_late = ep93xx_init_late, + .restart = ep93xx_restart, +MACHINE_END diff --git a/kernel/arch/arm/mach-ep93xx/clock.c b/kernel/arch/arm/mach-ep93xx/clock.c new file mode 100644 index 000000000..39ef3b613 --- /dev/null +++ b/kernel/arch/arm/mach-ep93xx/clock.c @@ -0,0 +1,563 @@ +/* + * arch/arm/mach-ep93xx/clock.c + * Clock control for Cirrus EP93xx chips. + * + * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or (at + * your option) any later version. + */ + +#define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt + +#include <linux/kernel.h> +#include <linux/clk.h> +#include <linux/err.h> +#include <linux/module.h> +#include <linux/string.h> +#include <linux/io.h> +#include <linux/spinlock.h> +#include <linux/clkdev.h> + +#include <mach/hardware.h> + +#include <asm/div64.h> + +#include "soc.h" + +struct clk { + struct clk *parent; + unsigned long rate; + int users; + int sw_locked; + void __iomem *enable_reg; + u32 enable_mask; + + unsigned long (*get_rate)(struct clk *clk); + int (*set_rate)(struct clk *clk, unsigned long rate); +}; + + +static unsigned long get_uart_rate(struct clk *clk); + +static int set_keytchclk_rate(struct clk *clk, unsigned long rate); +static int set_div_rate(struct clk *clk, unsigned long rate); +static int set_i2s_sclk_rate(struct clk *clk, unsigned long rate); +static int set_i2s_lrclk_rate(struct clk *clk, unsigned long rate); + +static struct clk clk_xtali = { + .rate = EP93XX_EXT_CLK_RATE, +}; +static struct clk clk_uart1 = { + .parent = &clk_xtali, + .sw_locked = 1, + .enable_reg = EP93XX_SYSCON_DEVCFG, + .enable_mask = EP93XX_SYSCON_DEVCFG_U1EN, + .get_rate = get_uart_rate, +}; +static struct clk clk_uart2 = { + .parent = &clk_xtali, + .sw_locked = 1, + .enable_reg = EP93XX_SYSCON_DEVCFG, + .enable_mask = EP93XX_SYSCON_DEVCFG_U2EN, + .get_rate = get_uart_rate, +}; +static struct clk clk_uart3 = { + .parent = &clk_xtali, + .sw_locked = 1, + .enable_reg = EP93XX_SYSCON_DEVCFG, + .enable_mask = EP93XX_SYSCON_DEVCFG_U3EN, + .get_rate = get_uart_rate, +}; +static struct clk clk_pll1 = { + .parent = &clk_xtali, +}; +static struct clk clk_f = { + .parent = &clk_pll1, +}; +static struct clk clk_h = { + .parent = &clk_pll1, +}; +static struct clk clk_p = { + .parent = &clk_pll1, +}; +static struct clk clk_pll2 = { + .parent = &clk_xtali, +}; +static struct clk clk_usb_host = { + .parent = &clk_pll2, + .enable_reg = EP93XX_SYSCON_PWRCNT, + .enable_mask = EP93XX_SYSCON_PWRCNT_USH_EN, +}; +static struct clk clk_keypad = { + .parent = &clk_xtali, + .sw_locked = 1, + .enable_reg = EP93XX_SYSCON_KEYTCHCLKDIV, + .enable_mask = EP93XX_SYSCON_KEYTCHCLKDIV_KEN, + .set_rate = set_keytchclk_rate, +}; +static struct clk clk_spi = { + .parent = &clk_xtali, + .rate = EP93XX_EXT_CLK_RATE, +}; +static struct clk clk_pwm = { + .parent = &clk_xtali, + .rate = EP93XX_EXT_CLK_RATE, +}; + +static struct clk clk_video = { + .sw_locked = 1, + .enable_reg = EP93XX_SYSCON_VIDCLKDIV, + .enable_mask = EP93XX_SYSCON_CLKDIV_ENABLE, + .set_rate = set_div_rate, +}; + +static struct clk clk_i2s_mclk = { + .sw_locked = 1, + .enable_reg = EP93XX_SYSCON_I2SCLKDIV, + .enable_mask = EP93XX_SYSCON_CLKDIV_ENABLE, + .set_rate = set_div_rate, +}; + +static struct clk clk_i2s_sclk = { + .sw_locked = 1, + .parent = &clk_i2s_mclk, + .enable_reg = EP93XX_SYSCON_I2SCLKDIV, + .enable_mask = EP93XX_SYSCON_I2SCLKDIV_SENA, + .set_rate = set_i2s_sclk_rate, +}; + +static struct clk clk_i2s_lrclk = { + .sw_locked = 1, + .parent = &clk_i2s_sclk, + .enable_reg = EP93XX_SYSCON_I2SCLKDIV, + .enable_mask = EP93XX_SYSCON_I2SCLKDIV_SENA, + .set_rate = set_i2s_lrclk_rate, +}; + +/* DMA Clocks */ +static struct clk clk_m2p0 = { + .parent = &clk_h, + .enable_reg = EP93XX_SYSCON_PWRCNT, + .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P0, +}; +static struct clk clk_m2p1 = { + .parent = &clk_h, + .enable_reg = EP93XX_SYSCON_PWRCNT, + .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P1, +}; +static struct clk clk_m2p2 = { + .parent = &clk_h, + .enable_reg = EP93XX_SYSCON_PWRCNT, + .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P2, +}; +static struct clk clk_m2p3 = { + .parent = &clk_h, + .enable_reg = EP93XX_SYSCON_PWRCNT, + .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P3, +}; +static struct clk clk_m2p4 = { + .parent = &clk_h, + .enable_reg = EP93XX_SYSCON_PWRCNT, + .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P4, +}; +static struct clk clk_m2p5 = { + .parent = &clk_h, + .enable_reg = EP93XX_SYSCON_PWRCNT, + .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P5, +}; +static struct clk clk_m2p6 = { + .parent = &clk_h, + .enable_reg = EP93XX_SYSCON_PWRCNT, + .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P6, +}; +static struct clk clk_m2p7 = { + .parent = &clk_h, + .enable_reg = EP93XX_SYSCON_PWRCNT, + .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P7, +}; +static struct clk clk_m2p8 = { + .parent = &clk_h, + .enable_reg = EP93XX_SYSCON_PWRCNT, + .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P8, +}; +static struct clk clk_m2p9 = { + .parent = &clk_h, + .enable_reg = EP93XX_SYSCON_PWRCNT, + .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P9, +}; +static struct clk clk_m2m0 = { + .parent = &clk_h, + .enable_reg = EP93XX_SYSCON_PWRCNT, + .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M0, +}; +static struct clk clk_m2m1 = { + .parent = &clk_h, + .enable_reg = EP93XX_SYSCON_PWRCNT, + .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M1, +}; + +#define INIT_CK(dev,con,ck) \ + { .dev_id = dev, .con_id = con, .clk = ck } + +static struct clk_lookup clocks[] = { + INIT_CK(NULL, "xtali", &clk_xtali), + INIT_CK("apb:uart1", NULL, &clk_uart1), + INIT_CK("apb:uart2", NULL, &clk_uart2), + INIT_CK("apb:uart3", NULL, &clk_uart3), + INIT_CK(NULL, "pll1", &clk_pll1), + INIT_CK(NULL, "fclk", &clk_f), + INIT_CK(NULL, "hclk", &clk_h), + INIT_CK(NULL, "apb_pclk", &clk_p), + INIT_CK(NULL, "pll2", &clk_pll2), + INIT_CK("ohci-platform", NULL, &clk_usb_host), + INIT_CK("ep93xx-keypad", NULL, &clk_keypad), + INIT_CK("ep93xx-fb", NULL, &clk_video), + INIT_CK("ep93xx-spi.0", NULL, &clk_spi), + INIT_CK("ep93xx-i2s", "mclk", &clk_i2s_mclk), + INIT_CK("ep93xx-i2s", "sclk", &clk_i2s_sclk), + INIT_CK("ep93xx-i2s", "lrclk", &clk_i2s_lrclk), + INIT_CK(NULL, "pwm_clk", &clk_pwm), + INIT_CK(NULL, "m2p0", &clk_m2p0), + INIT_CK(NULL, "m2p1", &clk_m2p1), + INIT_CK(NULL, "m2p2", &clk_m2p2), + INIT_CK(NULL, "m2p3", &clk_m2p3), + INIT_CK(NULL, "m2p4", &clk_m2p4), + INIT_CK(NULL, "m2p5", &clk_m2p5), + INIT_CK(NULL, "m2p6", &clk_m2p6), + INIT_CK(NULL, "m2p7", &clk_m2p7), + INIT_CK(NULL, "m2p8", &clk_m2p8), + INIT_CK(NULL, "m2p9", &clk_m2p9), + INIT_CK(NULL, "m2m0", &clk_m2m0), + INIT_CK(NULL, "m2m1", &clk_m2m1), +}; + +static DEFINE_SPINLOCK(clk_lock); + +static void __clk_enable(struct clk *clk) +{ + if (!clk->users++) { + if (clk->parent) + __clk_enable(clk->parent); + + if (clk->enable_reg) { + u32 v; + + v = __raw_readl(clk->enable_reg); + v |= clk->enable_mask; + if (clk->sw_locked) + ep93xx_syscon_swlocked_write(v, clk->enable_reg); + else + __raw_writel(v, clk->enable_reg); + } + } +} + +int clk_enable(struct clk *clk) +{ + unsigned long flags; + + if (!clk) + return -EINVAL; + + spin_lock_irqsave(&clk_lock, flags); + __clk_enable(clk); + spin_unlock_irqrestore(&clk_lock, flags); + + return 0; +} +EXPORT_SYMBOL(clk_enable); + +static void __clk_disable(struct clk *clk) +{ + if (!--clk->users) { + if (clk->enable_reg) { + u32 v; + + v = __raw_readl(clk->enable_reg); + v &= ~clk->enable_mask; + if (clk->sw_locked) + ep93xx_syscon_swlocked_write(v, clk->enable_reg); + else + __raw_writel(v, clk->enable_reg); + } + + if (clk->parent) + __clk_disable(clk->parent); + } +} + +void clk_disable(struct clk *clk) +{ + unsigned long flags; + + if (!clk) + return; + + spin_lock_irqsave(&clk_lock, flags); + __clk_disable(clk); + spin_unlock_irqrestore(&clk_lock, flags); +} +EXPORT_SYMBOL(clk_disable); + +static unsigned long get_uart_rate(struct clk *clk) +{ + unsigned long rate = clk_get_rate(clk->parent); + u32 value; + + value = __raw_readl(EP93XX_SYSCON_PWRCNT); + if (value & EP93XX_SYSCON_PWRCNT_UARTBAUD) + return rate; + else + return rate / 2; +} + +unsigned long clk_get_rate(struct clk *clk) +{ + if (clk->get_rate) + return clk->get_rate(clk); + + return clk->rate; +} +EXPORT_SYMBOL(clk_get_rate); + +static int set_keytchclk_rate(struct clk *clk, unsigned long rate) +{ + u32 val; + u32 div_bit; + + val = __raw_readl(clk->enable_reg); + + /* + * The Key Matrix and ADC clocks are configured using the same + * System Controller register. The clock used will be either + * 1/4 or 1/16 the external clock rate depending on the + * EP93XX_SYSCON_KEYTCHCLKDIV_KDIV/EP93XX_SYSCON_KEYTCHCLKDIV_ADIV + * bit being set or cleared. + */ + div_bit = clk->enable_mask >> 15; + + if (rate == EP93XX_KEYTCHCLK_DIV4) + val |= div_bit; + else if (rate == EP93XX_KEYTCHCLK_DIV16) + val &= ~div_bit; + else + return -EINVAL; + + ep93xx_
}
# Copyright 2014 Huawei Technologies Co. Ltd
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
"""Compass api client library.
"""
import json
import logging
import requests
class Client(object):
"""compass restful api wrapper"""
def __init__(self, url, headers=None, proxies=None, stream=None):
logging.info('create api client %s', url)
self.url_ = url
self.session_ = requests.Session()
if headers:
self.session_.headers.update(headers)
self.session_.headers.update({
'Accept': 'application/json'
})
if proxies is not None:
self.session_.proxies = proxies
if stream is not None:
self.session_.stream = stream
def __del__(self):
self.session_.close()
@classmethod
def _get_response(cls, resp):
response_object = {}
try:
response_object = resp.json()
except Exception as error:
logging.error('failed to load object from %s: %s',
resp.url, resp.content)
logging.exception(error)
response_object['status'] = 'Json Parsing Failed'
response_object['message'] = resp.content
return resp.status_code, response_object
def _get(self, req_url, data=None):
url = '%s%s' % (self.url_, req_url)
logging.debug('get %s with data %s', url, data)
if data:
resp = self.session_.get(url, params=data)
else:
resp = self.session_.get(url)
return self._get_response(resp)
def _post(self, req_url, data=None):
url = '%s%s' % (self.url_, req_url)
logging.debug('post %s with data %s', url, data)
if data:
resp = self.session_.post(url, json.dumps(data))
else:
resp = self.session_.post(url)
return self._get_response(resp)
def _put(self, req_url, data=None):
"""encapsulate put method."""
url = '%s%s' % (self.url_, req_url)
logging.debug('put %s with data %s', url, data)
if data:
resp = self.session_.put(url, json.dumps(data))
else:
resp = self.session_.put(url)
return self._get_response(resp)
def _patch(self, req_url, data=None):
url = '%s%s' % (self.url_, req_url)
logging.debug('patch %s with data %s', url, data)
if data:
resp = self.session_.patch(url, json.dumps(data))
else:
resp = self.session_.patch(url)
return self._get_response(resp)
def _delete(self, req_url):
url = '%s%s' % (self.url_, req_url)
logging.debug('delete %s', url)
return self._get_response(self.session_.delete(url))
def login(self, email, password):
credential = {}
credential['email'] = email
credential['password'] = password
return self._post('/users/login', data=credential)
def get_token(self, email, password):
credential = {}
credential['email'] = email
credential['password'] = password
status, resp = self._post('/users/token', data=credential)
if status < 400:
self.session_.headers.update({'X-Auth-Token': resp['token']})
return status, resp
def get_users(self):
users = self._get('/users')
return users
def list_switches(
self,
switch_ips=None,
switch_ip_networks=None):
"""list switches."""
params = {}
if switch_ips:
params['switchIp'] = switch_ips
if switch_ip_networks:
params['switchIpNetwork'] = switch_ip_networks
switchlist = self._get('/switches', data=params)
return switchlist
def get_switch(self, switch_id):
return self._get('/switches/%s' % switch_id)
def add_switch(
self,
switch_ip,
version=None,
community=None,
raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
data['ip'] = switch_ip
data['credentials'] = {}
if version:
data['credentials']['version'] = version
if community:
data['credentials']['community'] = community
return self._post('/switches', data=data)
def update_switch(self, switch_id, state='initialized',
version='2c', community='public', raw_data={}):
data = {}
if raw_data:
data = raw_data
else:
data['credentials'] = {}
if version:
data['credentials']['version'] = version
if community:
data['credentials']['community'] = community
if state:
data['state'] = state
return self._put('/switches/%s' % switch_id, data=data)
def delete_switch(self, switch_id):
return self._delete('/switches/%s' % switch_id)
def list_switch_machines(self, switch_id, port=None, vlans=None,
tag=None, location=None):
data = {}
if port:
data['port'] = port
if vlans:
data['vlans'] = vlans
if tag:
data['tag'] = tag
if location:
data['location'] = location
return self._get('/switches/%s/machines' % switch_id, data=data)
def get_switch_machine(self, switch_id, machine_id):
return self._get('/switches/%s/machines/%s' % (switch_id, machine_id))
def list_switch_machines_hosts(self, switch_id, port=None, vlans=None,
mac=None, tag=None, location=None,
os_name=None, os_id=None):
data = {}
if port:
data['port'] = port
if vlans:
data['vlans'] = vlans
if mac:
data['mac'] = mac
if tag:
data['tag'] = tag
if location:
data['location'] = location
if os_name:
data['os_name'] = os_name
if os_id:
data['os_id'] = os_id
return self._get('/switches/%s/machines-hosts' % switch_id, data=data)
def add_switch_machine(self, switch_id, mac=None, port=None,
vlans=None, ipmi_credentials=None,
tag=None, location=None, raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if mac:
data['mac'] = mac
if port:
data['port'] = port
if vlans:
data['vlans'] = vlans
if ipmi_credentials:
data['ipmi_credentials'] = ipmi_credentials
if tag:
data['tag'] = tag
if location:
data['location'] = location
return self._post('/switches/%s/machines' % switch_id, data=data)
def update_switch_machine(self, switch_id, machine_id, port=None,
vlans=None, ipmi_credentials=None, tag=None,
location=None, raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if port:
data['port'] = port
if vlans:
data['vlans'] = vlans
if ipmi_credentials:
data['ipmi_credentials'] = ipmi_credentials
if tag:
data['tag'] = tag
if location:
data['location'] = location
return self._put('/switches/%s/machines/%s' %
(switch_id, machine_id), data=data)
def delete_switch_machine(self, switch_id, machine_id):
return self._delete('/switches/%s/machines/%s' %
(switch_id, machine_id))
# test these
def poll_switch(self, switch_id):
data = {}
data['find_machines'] = None
return self._post('/switches/%s/action' % switch_id, data=data)
def add_group_switch_machines(self, switch_id, group_machine_ids):
data = {}
data['add_machines'] = group_machine_ids
return self._post('/switches/%s/action' % switch_id, data=data)
def remove_group_switch_machines(self, switch_id, group_machine_ids):
data = {}
data['remove_machines'] = group_machine_ids
return self._post('/switches/%s/action' % switch_id, data=data)
def update_group_switch_machines(self, switch_id, group_machines):
data = {}
data['set_machines'] = group_machines
return self._post('/switches/%s/action' % switch_id, data=data)
# end
def list_switchmachines(self, switch_ip_int=None, port=None, vlans=None,
mac=None, tag=None, location=None):
data = {}
if switch_ip_int:
data['switch_ip_int'] = switch_ip_int
if port:
data['port'] = port
if vlans:
data['vlans'] = vlans
if mac:
data['mac'] = mac
if tag:
data['tag'] = tag
if location:
data['location'] = location
return self._get('/switch-machines', data=data)
def list_switchmachines_hosts(self, switch_ip_int=None, port=None,
vlans=None, mac=None, tag=None,
location=None, os_name=None, os_id=None):
data = {}
if switch_ip_int:
data['switch_ip_int'] = switch_ip_int
if port:
data['port'] = port
if vlans:
data['vlans'] = vlans
if mac:
data['mac'] = mac
if tag:
data['tag'] = tag
if location:
data['location'] = location
if os_name:
data['os_name'] = os_name
if os_id:
data['os_id'] = os_id
return self._get('/switches-machines-hosts', data=data)
def show_switchmachine(self, switchmachine_id):
return self._get('/switch-machines/%s' % switchmachine_id)
def update_switchmachine(self, switchmachine_id,
port=None, vlans=None, raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if port:
data['port'] = port
if vlans:
data['vlans'] = vlans
return self._put('/switch-machines/%s' % switchmachine_id, data=data)
def patch_switchmachine(self, switchmachine_id,
vlans=None, raw_data=None):
data = {}
if raw_data:
data = raw_data
elif vlans:
data['vlans'] = vlans
return self._patch('/switch-machines/%s' % switchmachine_id, data=data)
def delete_switchmachine(self, switchmachine_id):
return self._delete('/switch-machines/%s' % switchmachine_id)
def list_machines(self, mac=None, tag=None, location=None):
data = {}
if mac:
data['mac'] = mac
if tag:
data['tag'] = tag
if location:
data['location'] = location
return self._get('/machines', data=data)
def get_machine(self, machine_id):
data = {}
if id:
data['id'] = id
return self._get('/machines/%s' % machine_id, data=data)
def update_machine(self, machine_id, ipmi_credentials=None, tag=None,
location=None, raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if ipmi_credentials:
data['ipmi_credentials'] = ipmi_credentials
if tag:
data['tag'] = tag
if location:
data['location'] = location
return self._put('/machines/%s' % machine_id, data=data)
def patch_machine(self, machine_id, ipmi_credentials=None,
tag=None, location=None,
raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if ipmi_credentials:
data['ipmi_credentials'] = ipmi_credentials
if tag:
data['tag'] = tag
if location:
data['location'] = location
return self._patch('/machines/%s' % machine_id, data=data)
def delete_machine(self, machine_id):
return self._delete('machines/%s' % machine_id)
def list_subnets(self, subnet=None, name=None):
data = {}
if subnet:
data['subnet'] = subnet
if name:
data['name'] = name
return self._get('/subnets', data=data)
def get_subnet(self, subnet_id):
return self._get('/subnets/%s' % subnet_id)
def add_subnet(self, subnet, name=None, raw_data=None):
data = {}
data['subnet'] = subnet
if raw_data:
data.update(raw_data)
else:
if name:
data['name'] = name
return self._post('/subnets', data=data)
def update_subnet(self, subnet_id, subnet=None,
name=None, raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if subnet:
data['subnet'] = subnet
if name:
data['name'] = name
return self._put('/subnets/%s' % subnet_id, data=data)
def delete_subnet(self, subnet_id):
return self._delete('/subnets/%s' % subnet_id)
def list_adapters(self, name=None, distributed_system_name=None,
os_installer_name=None, package_installer_name=None):
data = {}
if name:
data['name'] = name
if distributed_system_name:
data['distributed_system_name'] = distributed_system_name
if os_installer_name:
data['os_installer_name'] = os_installer_name
if package_installer_name:
data['package_installer_name'] = package_installer_name
return self._get('/adapters', data=data)
def get_adapter(self, adapter_id):
return self._get('/adapters/%s' % adapter_id)
def get_adapter_roles(self, adapter_id):
return self._get('/adapters/%s/roles' % adapter_id)
def get_adapter_metadata(self, adapter_id):
return self._get('/adapters/%s/metadata' % adapter_id)
def get_os_metadata(self, os_id):
return self._get('/oses/%s/metadata' % os_id)
def list_clusters(self, name=None, os_name=None,
distributed_system_name=None, owner=None,
adapter_id=None):
data = {}
if name:
data['name'] = name
if os_name:
data['os_name'] = os_name
if distributed_system_name:
data['distributed_system_name'] = distributed_system_name
if owner:
data['owner'] = owner
if adapter_id:
data['adapter_id'] = adapter_id
return self._get('/clusters', data=data)
def get_cluster(self, cluster_id):
return self._get('/clusters/%s' % cluster_id)
def add_cluster(self, name, adapter_id, os_id,
flavor_id=None, raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if flavor_id:
data['flavor_id'] = flavor_id
data['name'] = name
data['adapter_id'] = adapter_id
data['os_id'] = os_id
return self._post('/clusters', data=data)
def update_cluster(self, cluster_id, name=None,
reinstall_distributed_system=None,
raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if name:
data['name'] = name
if reinstall_distributed_system:
data['reinstall_distributed_system'] = (
reinstall_distributed_system
)
return self._put('/clusters/%s' % cluster_id, data=data)
def delete_cluster(self, cluster_id):
return self._delete('/clusters/%s' % cluster_id)
def get_cluster_config(self, cluster_id):
return self._get('/clusters/%s/config' % cluster_id)
def get_cluster_metadata(self, cluster_id):
return self._get('/clusters/%s/metadata' % cluster_id)
def update_cluster_config(self, cluster_id, os_config=None,
package_config=None, config_step=None,
raw_data=None):
data = {}
if raw_data:
data = raw_data
if os_config:
data['os_config'] = os_config
if package_config:
data['package_config'] = package_config
if config_step:
data['config_step'] = config_step
return self._put('/clusters/%s/config' % cluster_id, data=data)
def patch_cluster_config(self, cluster_id, os_config=None,
package_config=None, config_step=None,
raw_data=None):
data = {}
if raw_data:
data = raw_data
if os_config:
data['os_config'] = os_config
if package_config:
data['package_config'] = package_config
if config_step:
data['config_step'] = config_step
return self._patch('/clusters/%s/config' % cluster_id, data=data)
def delete_cluster_config(self, cluster_id):
return self._delete('/clusters/%s/config' % cluster_id)
# test these
def add_hosts_to_cluster(self, cluster_id, hosts):
data = {}
data['add_hosts'] = hosts
return self._post('/clusters/%s/action' % cluster_id, data=data)
def set_hosts_in_cluster(self, cluster_id, hosts):
data = {}
data['set_hosts'] = hosts
return self._post('/clusters/%s/action' % cluster_id, data=data)
def remove_hosts_from_cluster(self, cluster_id, hosts):
data = {}
data['remove_hosts'] = hosts
return self._post('/clusters/%s/action' % cluster_id, data=data)
def review_cluster(self, cluster_id, review={}):
data = {}
data['review'] = review
return self._post('/clusters/%s/action' % cluster_id, data=data)
def deploy_cluster(self, cluster_id, deploy={}):
data = {}
data['deploy'] = deploy
return self._post('/clusters/%s/action' % cluster_id, data=data)
def redeploy_cluster(self, cluster_id):
data = {}
data['redeploy'] = {}
return self._post('/clusters/%s/action' % cluster_id, data=data)
def get_cluster_state(self, cluster_id):
return self._get('/clusters/%s/state' % cluster_id)
def list_cluster_hosts(self, cluster_id):
return self._get('/clusters/%s/hosts' % cluster_id)
def list_clusterhosts(self):
return self._get('/clusterhosts')
def get_cluster_host(self, cluster_id, host_id):
return self._get('/clusters/%s/hosts/%s' % (cluster_id, host_id))
def get_clusterhost(self, clusterhost_id):
return self._get('/clusterhosts/%s' % clusterhost_id)
def add_cluster_host(self, cluster_id, machine_id=None, name=None,
reinstall_os=None, raw_data=None):
data = {}
data['machine_id'] = machine_id
if raw_data:
data.update(raw_data)
else:
if name:
data['name'] = name
if reinstall_os:
data['reinstall_os'] = reinstall_os
return self._post('/clusters/%s/hosts' % cluster_id, data=data)
def delete_cluster_host(self, cluster_id, host_id):
return self._delete('/clusters/%s/hosts/%s' %
(cluster_id, host_id))
def delete_clusterhost(self, clusterhost_id):
return self._delete('/clusterhosts/%s' % clusterhost_id)
def get_cluster_host_config(self, cluster_id, host_id):
return self._get('/clusters/%s/hosts/%s/config' %
(cluster_id, host_id))
def get_clusterhost_config(self, clusterhost_id):
return self._get('/clusterhosts/%s/config' % clusterhost_id)
def update_cluster_host_config(self, cluster_id, host_id,
os_config=None,
package_config=None,
raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if os_config:
data['os_config'] = os_config
if package_config:
data['package_config'] = package_config
return self._put('/clusters/%s/hosts/%s/config' %
(cluster_id, host_id), data=data)
def update_clusterhost_config(self, clusterhost_id, os_config=None,
package_config=None, raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if os_config:
data['os_config'] = os_config
if package_config:
data['package_config'] = package_config
return self._put('/clusterhosts/%s/config' % clusterhost_id,
data=data)
def patch_cluster_host_config(self, cluster_id, host_id,
os_config=None,
package_config=None,
raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if os_config:
data['os_config'] = os_config
if package_config:
data['package_config'] = package_config
return self._patch('/clusters/%s/hosts/%s/config' %
(cluster_id, host_id), data=data)
def patch_clusterhost_config(self, clusterhost_id, os_config=None,
package_config=None, raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if os_config:
data['os_config'] = os_config
if package_config:
data['package_config'] = package_config
return self._patch('/clusterhosts/%s' % clusterhost_id, data=data)
def delete_cluster_host_config(self, cluster_id, host_id):
return self._delete('/clusters/%s/hosts/%s/config' %
(cluster_id, host_id))
def delete_clusterhost_config(self, clusterhost_id):
return self._delete('/clusterhosts/%s/config' % clusterhost_id)
def get_cluster_host_state(self, cluster_id, host_id):
return self._get('/clusters/%s/hosts/%s/state' %
(cluster_id, host_id))
def update_cluster_host(self, cluster_id, host_id,
roles=None, raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if roles:
data['roles'] = roles
return self._put('/clusters/%s/hosts/%s' %
(cluster_id, host_id), data=data)
def update_clusterhost(self, clusterhost_id,
roles=None, raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if roles:
data['roles'] = roles
return self._put('/clusterhosts/%s' % clusterhost_id, data=data)
def patch_cluster_host(self, cluster_id, host_id,
roles=None, raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if roles:
data['roles'] = roles
return self._patch('/clusters/%s/hosts/%s' %
(cluster_id, host_id), data=data)
def patch_clusterhost(self, clusterhost_id,
roles=None, raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if roles:
data['roles'] = roles
return self._patch('/clusterhosts/%s' % clusterhost_id, data=data)
def get_clusterhost_state(self, clusterhost_id):
return self._get('/clusterhosts/%s/state' % clusterhost_id)
def update_cluster_host_state(self, cluster_id, host_id, state=None,
percentage=None, message=None,
raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if state:
data['state'] = state
if percentage:
data['percentage'] = percentage
if message:
data['message'] = message
return self._put('/clusters/%s/hosts/%s/state' % (cluster_id, host_id),
data=data)
def update_clusterhost_state(self, clusterhost_id, state=None,
percentage=None, message=None,
raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if state:
data['state'] = state
if percentage:
data['percentage'] = percentage
if message:
data['message'] = message
return self._put('/clusterhosts/%s/state' % clusterhost_id, data=data)
def list_hosts(self, name=None, os_name=None, owner=None, mac=None):
data = {}
if name:
data['name'] = name
if os_name:
data['os_name'] = os_name
if owner:
data['owner'] = owner
if mac:
data['mac'] = mac
return self._get('/hosts', data=data)
def get_host(self, host_id):
return self._get('/hosts/%s' % host_id)
def list_machines_or_hosts(self, mac=None, tag=None,
location=None, os_name=None,
os_id=None):
data = {}
if mac:
data['mac'] = mac
if tag:
data['tag'] = tag
if location:
data['location'] = location
if os_name:
data['os_name'] = os_name
if os_id:
data['os_id'] = os_id
return self._get('/machines-hosts', data=data)
def get_machine_or_host(self, host_id):
return self._get('/machines-hosts/%s' % host_id)
def update_host(self, host_id, name=None,
reinstall_os=None, raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if name:
data['name'] = name
if reinstall_os:
data['reinstall_os'] = reinstall_os
return self._put('/hosts/%s' % host_id, data=data)
def delete_host(self, host_id):
return self._delete('/hosts/%s' % host_id)
def get_host_clusters(self, host_id):
return self._get('/hosts/%s/clusters' % host_id)
def get_host_config(self, host_id):
return self._get('/hosts/%s/config' % host_id)
def update_host_config(self, host_id, os_config, raw_data=None):
data = {}
data['os_config'] = os_config
if raw_data:
data.update(raw_data)
return self._put('/hosts/%s/config' % host_id, data=data)
def patch_host_config(self, host_id, os_config, raw_data=None):
data = {}
data['os_config'] = os_config
if raw_data:
data.update(raw_data)
return self._patch('/hosts/%s/config' % host_id, data=data)
def delete_host_config(self, host_id):
return self._delete('/hosts/%s/config' % host_id)
def list_host_networks(self, host_id, interface=None, ip=None,
subnet=None, is_mgmt=None, is_promiscuous=None):
data = {}
if interface:
data['interface'] = interface
if ip:
data['ip'] = ip
if subnet:
data['subnet'] = subnet
if is_mgmt:
data['is_mgmt'] = is_mgmt
if is_promiscuous:
data['is_promiscuous'] = is_promiscuous
return self._get('/hosts/%s/networks' % host_id, data=data)
def list_all_host_networks(self, interface=None, ip=None, subnet=None,
is_mgmt=None, is_promiscuous=None):
data = {}
if interface:
data['interface'] = interface
if ip:
data['ip'] = ip
if subnet:
data['subnet'] = subnet
if is_mgmt:
data['is_mgmt'] = is_mgmt
if is_promiscuous:
data['is_promiscuous'] = is_promiscuous
return self._get('/host-networks', data=data)
def get_host_network(self, host_id, host_network_id):
return self._get('/hosts/%s/networks/%s' %
(host_id, host_network_id))
def get_network_for_all_hosts(self, host_network_id):
return self._get('/host-networks/%s' % host_network_id)
def add_host_network(self, host_id, interface, ip, subnet_id,
is_mgmt=None, is_promiscuous=None,
raw_data=None):
data = {}
data['interface'] = interface
data['ip'] = ip
data['subnet_id'] = subnet_id
if raw_data:
data.update(raw_data)
else:
if is_mgmt:
data['is_mgmt'] = is_mgmt
if is_promiscuous:
data['is_promiscuous'] = is_promiscuous
return self._post('/hosts/%s/networks' % host_id, data=data)
def update_host_network(self, host_id, host_network_id,
ip=None, subnet_id=None, subnet=None,
is_mgmt=None, is_promiscuous=None,
raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if ip:
data['ip'] = ip
if subnet_id:
data['subnet_id'] = subnet_id
if subnet:
data['subnet'] = subnet
if is_mgmt:
data['is_mgmt'] = is_mgmt
if is_promiscuous:
data['is_promiscuous'] = is_promiscuous
return self._put('/hosts/%s/networks/%s' %
(host_id, host_network_id), data=data)
def update_hostnetwork(self, host_network_id, ip=None,
subnet_id=None, subnet=None,
is_mgmt=None, is_promiscuous=None,
raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if ip:
data['ip'] = ip
if subnet_id:
data['subnet_id'] = subnet_id
if subnet:
data['subnet'] = subnet
if is_mgmt:
data['is_mgmt'] = is_mgmt
if is_promiscuous:
data['is_promiscuous'] = is_promiscuous
return self._put('/host-networks/%s' % host_network_id,
data=data)
def delete_host_network(self, host_id, host_network_id):
return self._delete('/hosts/%s/networks/%s',
(host_id, host_network_id))
def delete_hostnetwork(self, host_network_id):
return self._delete('/host-networks/%s' % host_network_id)
def get_host_state(self, host_id):
return self._get('/hosts/%s/state' % host_id)
def update_host_state(self, host_id, state=None,
percentage=None, message=None,
raw_data=None):
data = {}
if raw_data:
data = raw_data
else:
if state:
data['state'] = state
if percentage:
data['percentage'] = percentage
if message:
data['message'] = message
return self._put('/hosts/%s/state' % host_id, date=data)
def poweron_host(self, host_id):
data = {}
data['poweron'] = True
return self._post('/hosts/%s/action' % host_id, data=data)
def poweroff_host(self, host_id):
data = {}
data['poweroff'] = True
return self._post('/hosts/%s/action' % host_id, data=data)
def reset_host(self, host_id):
data = {}
data['reset'] = True
return self._post('/hosts/%s/action' % host_id, data=data)
def clusterhost_ready(self, clusterhost_name):
data = {}
data['ready'] = True
return self._post('/clusterhosts/%s/state_internal' %
clusterhost_name, data=data)
+{ + struct nand_chip *chip = mtd->priv; + + return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY); +} + +static struct mtd_partition snappercl15_nand_parts[] = { + { + .name = "Kernel", + .offset = 0, + .size = SZ_2M, + }, + { + .name = "Filesystem", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct platform_nand_data snappercl15_nand_data = { + .chip = { + .nr_chips = 1, + .partitions = snappercl15_nand_parts, + .nr_partitions = ARRAY_SIZE(snappercl15_nand_parts), + .chip_delay = 25, + }, + .ctrl = { + .dev_ready = snappercl15_nand_dev_ready, + .cmd_ctrl = snappercl15_nand_cmd_ctrl, + }, +}; + +static struct resource snappercl15_nand_resource[] = { + { + .start = SNAPPERCL15_NAND_BASE, + .end = SNAPPERCL15_NAND_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device snappercl15_nand_device = { + .name = "gen_nand", + .id = -1, + .dev.platform_data = &snappercl15_nand_data, + .resource = snappercl15_nand_resource, + .num_resources = ARRAY_SIZE(snappercl15_nand_resource), +}; + +static struct ep93xx_eth_data __initdata snappercl15_eth_data = { + .phy_id = 1, +}; + +static struct i2c_gpio_platform_data __initdata snappercl15_i2c_gpio_data = { + .sda_pin = EP93XX_GPIO_LINE_EEDAT, + .sda_is_open_drain = 0, + .scl_pin = EP93XX_GPIO_LINE_EECLK, + .scl_is_open_drain = 0, + .udelay = 0, + .timeout = 0, +}; + +static struct i2c_board_info __initdata snappercl15_i2c_data[] = { + { + /* Audio codec */ + I2C_BOARD_INFO("tlv320aic23", 0x1a), + }, +}; + +static struct ep93xxfb_mach_info __initdata snappercl15_fb_info = { + .num_modes = EP93XXFB_USE_MODEDB, + .bpp = 16, +}; + +static struct platform_device snappercl15_audio_device = { + .name = "snappercl15-audio", + .id = -1, +}; + +static void __init snappercl15_register_audio(void) +{ + ep93xx_register_i2s(); + platform_device_register(&snappercl15_audio_device); +} + +static void __init snappercl15_init_machine(void) +{ + ep93xx_init_devices(); + ep93xx_register_eth(&snappercl15_eth_data, 1); + ep93xx_register_i2c(&snappercl15_i2c_gpio_data, snappercl15_i2c_data, + ARRAY_SIZE(snappercl15_i2c_data)); + ep93xx_register_fb(&snappercl15_fb_info); + snappercl15_register_audio(); + platform_device_register(&snappercl15_nand_device); +} + +MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15") + /* Maintainer: Ryan Mallon */ + .atag_offset = 0x100, + .map_io = ep93xx_map_io, + .init_irq = ep93xx_init_irq, + .init_time = ep93xx_timer_init, + .init_machine = snappercl15_init_machine, + .init_late = ep93xx_init_late, + .restart = ep93xx_restart, +MACHINE_END diff --git a/kernel/arch/arm/mach-ep93xx/soc.h b/kernel/arch/arm/mach-ep93xx/soc.h new file mode 100644 index 000000000..7bf7ff8be --- /dev/null +++ b/kernel/arch/arm/mach-ep93xx/soc.h @@ -0,0 +1,214 @@ +/* + * arch/arm/mach-ep93xx/soc.h + * + * Copyright (C) 2012 Open Kernel Labs <www.ok-labs.com> + * Copyright (C) 2012 Ryan Mallon <rmallon@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or (at + * your option) any later version. + */ + +#ifndef _EP93XX_SOC_H +#define _EP93XX_SOC_H + +#include <mach/ep93xx-regs.h> + +/* + * EP93xx Physical Memory Map: + * + * The ASDO pin is sampled at system reset to select a synchronous or + * asynchronous boot configuration. When ASDO is "1" (i.e. pulled-up) + * the synchronous boot mode is selected. When ASDO is "0" (i.e + * pulled-down) the asynchronous boot mode is selected. + * + * In synchronous boot mode nSDCE3 is decoded starting at physical address + * 0x00000000 and nCS0 is decoded starting at 0xf0000000. For asynchronous + * boot mode they are swapped with nCS0 decoded at 0x00000000 ann nSDCE3 + * decoded at 0xf0000000. + * + * There is known errata for the EP93xx dealing with External Memory + * Configurations. Please refer to "AN273: EP93xx Silicon Rev E Design + * Guidelines" for more information. This document can be found at: + * + * http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf + */ + +#define EP93XX_CS0_PHYS_BASE_ASYNC 0x00000000 /* ASDO Pin = 0 */ +#define EP93XX_SDCE3_PHYS_BASE_SYNC 0x00000000 /* ASDO Pin = 1 */ +#define EP93XX_CS1_PHYS_BASE 0x10000000 +#define EP93XX_CS2_PHYS_BASE 0x20000000 +#define EP93XX_CS3_PHYS_BASE 0x30000000 +#define EP93XX_PCMCIA_PHYS_BASE 0x40000000 +#define EP93XX_CS6_PHYS_BASE 0x60000000 +#define EP93XX_CS7_PHYS_BASE 0x70000000 +#define EP93XX_SDCE0_PHYS_BASE 0xc0000000 +#define EP93XX_SDCE1_PHYS_BASE 0xd0000000 +#define EP93XX_SDCE2_PHYS_BASE 0xe0000000 +#define EP93XX_SDCE3_PHYS_BASE_ASYNC 0xf0000000 /* ASDO Pin = 0 */ +#define EP93XX_CS0_PHYS_BASE_SYNC 0xf0000000 /* ASDO Pin = 1 */ + +/* AHB peripherals */ +#define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000) + +#define EP93XX_ETHERNET_PHYS_BASE EP93XX_AHB_PHYS(0x00010000) +#define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000) + +#define EP93XX_USB_PHYS_BASE EP93XX_AHB_PHYS(0x00020000) +#define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000) + +#define EP93XX_RASTER_PHYS_BASE EP93XX_AHB_PHYS(0x00030000) +#define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000) + +#define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000) + +#define EP93XX_SDRAM_CONTROLLER_BASE EP93XX_AHB_IOMEM(0x00060000) + +#define EP93XX_PCMCIA_CONTROLLER_BASE EP93XX_AHB_IOMEM(0x00080000) + +#define EP93XX_BOOT_ROM_BASE EP93XX_AHB_IOMEM(0x00090000) + +#define EP93XX_IDE_PHYS_BASE EP93XX_AHB_PHYS(0x000a0000) +#define EP93XX_IDE_BASE EP93XX_AHB_IOMEM(0x000a0000) + +#define EP93XX_VIC1_BASE EP93XX_AHB_IOMEM(0x000b0000) + +#define EP93XX_VIC2_BASE EP93XX_AHB_IOMEM(0x000c0000) + +/* APB peripherals */ +#define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000) + +#define EP93XX_I2S_PHYS_BASE EP93XX_APB_PHYS(0x00020000) +#define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000) + +#define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000) + +#define EP93XX_AAC_PHYS_BASE EP93XX_APB_PHYS(0x00080000) +#define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000) + +#define EP93XX_SPI_PHYS_BASE EP93XX_APB_PHYS(0x000a0000) +#define EP93XX_SPI_BASE EP93XX_APB_IOMEM(0x000a0000) + +#define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000) + +#define EP93XX_KEY_MATRIX_PHYS_BASE EP93XX_APB_PHYS(0x000f0000) +#define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000) + +#define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000) +#define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000) + +#define EP93XX_PWM_PHYS_BASE EP93XX_APB_PHYS(0x00110000) +#define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000) + +#define EP93XX_RTC_PHYS_BASE EP93XX_APB_PHYS(0x00120000) +#define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000) + +#define EP93XX_WATCHDOG_PHYS_BASE EP93XX_APB_PHYS(0x00140000) +#define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000) + +/* System controller */ +#define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000) +#define EP93XX_SYSCON_REG(x) (EP93XX_SYSCON_BASE + (x)) +#define EP93XX_SYSCON_POWER_STATE EP93XX_SYSCON_REG(0x00) +#define EP93XX_SYSCON_PWRCNT EP93XX_SYSCON_REG(0x04) +#define EP93XX_SYSCON_PWRCNT_FIR_EN (1<<31) +#define EP93XX_SYSCON_PWRCNT_UARTBAUD (1<<29) +#define EP93XX_SYSCON_PWRCNT_USH_EN (1<<28) +#define EP93XX_SYSCON_PWRCNT_DMA_M2M1 (1<<27) +#define EP93XX_SYSCON_PWRCNT_DMA_M2M0 (1<<26) +#define EP93XX_SYSCON_PWRCNT_DMA_M2P8 (1<<25) +#define EP93XX_SYSCON_PWRCNT_DMA_M2P9 (1<<24) +#define EP93XX_SYSCON_PWRCNT_DMA_M2P6 (1<<23) +#define EP93XX_SYSCON_PWRCNT_DMA_M2P7 (1<<22) +#define EP93XX_SYSCON_PWRCNT_DMA_M2P4 (1<<21) +#define EP93XX_SYSCON_PWRCNT_DMA_M2P5 (1<<20) +#define EP93XX_SYSCON_PWRCNT_DMA_M2P2 (1<<19) +#define EP93XX_SYSCON_PWRCNT_DMA_M2P3 (1<<18) +#define EP93XX_SYSCON_PWRCNT_DMA_M2P0 (1<<17) +#define EP93XX_SYSCON_PWRCNT_DMA_M2P1 (1<<16) +#define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08) +#define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c) +#define EP93XX_SYSCON_CLKSET1 EP93XX_SYSCON_REG(0x20) +#define EP93XX_SYSCON_CLKSET1_NBYP1 (1<<23) +#define EP93XX_SYSCON_CLKSET2 EP93XX_SYSCON_REG(0x24) +#define EP93XX_SYSCON_CLKSET2_NBYP2 (1<<19) +#define EP93XX_SYSCON_CLKSET2_PLL2_EN (1<<18) +#define EP93XX_SYSCON_DEVCFG EP93XX_SYSCON_REG(0x80) +#define EP93XX_SYSCON_DEVCFG_SWRST (1<<31) +#define EP93XX_SYSCON_DEVCFG_D1ONG (1<<30) +#define EP93XX_SYSCON_DEVCFG_D0ONG (1<<29) +#define EP93XX_SYSCON_DEVCFG_IONU2 (1<<28) +#define EP93XX_SYSCON_DEVCFG_GONK (1<<27) +#define EP93XX_SYSCON_DEVCFG_TONG (1<<26) +#define EP93XX_SYSCON_DEVCFG_MONG (1<<25) +#define EP93XX_SYSCON_DEVCFG_U3EN (1<<24) +#define EP93XX_SYSCON_DEVCFG_CPENA (1<<23) +#define EP93XX_SYSCON_DEVCFG_A2ONG (1<<22) +#define EP93XX_SYSCON_DEVCFG_A1ONG (1<<21) +#define EP93XX_SYSCON_DEVCFG_U2EN (1<<20) +#define EP93XX_SYSCON_DEVCFG_EXVC (1<<19) +#define EP93XX_SYSCON_DEVCFG_U1EN (1<<18) +#define EP93XX_SYSCON_DEVCFG_TIN (1<<17) +#define EP93XX_SYSCON_DEVCFG_HC3IN (1<<15) +#define EP93XX_SYSCON_DEVCFG_HC3EN (1<<14) +#define EP93XX_SYSCON_DEVCFG_HC1IN (1<<13) +#define EP93XX_SYSCON_DEVCFG_HC1EN (1<<12) +#define EP93XX_SYSCON_DEVCFG_HONIDE (1<<11) +#define EP93XX_SYSCON_DEVCFG_GONIDE (1<<10) +#define EP93XX_SYSCON_DEVCFG_PONG (1<<9) +#define EP93XX_SYSCON_DEVCFG_EONIDE (1<<8) +#define EP93XX_SYSCON_DEVCFG_I2SONSSP (1<<7) +#define EP93XX_SYSCON_DEVCFG_I2SONAC97 (1<<6) +#define EP93XX_SYSCON_DEVCFG_RASONP3 (1<<4) +#define EP93XX_SYSCON_DEVCFG_RAS (1<<3) +#define EP93XX_SYSCON_DEVCFG_ADCPD (1<<2) +#define EP93XX_SYSCON_DEVCFG_KEYS (1<<1) +#define EP93XX_SYSCON_DEVCFG_SHENA (1<<0) +#define EP93XX_SYSCON_VIDCLKDIV EP93XX_SYSCON_REG(0x84) +#define EP93XX_SYSCON_CLKDIV_ENABLE (1<<15) +#define EP93XX_SYSCON_CLKDIV_ESEL (1<<14) +#define EP93XX_SYSCON_CLKDIV_PSEL (1<<13) +#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8 +#define EP93XX_SYSCON_I2SCLKDIV EP93XX_SYSCON_REG(0x8c) +#define EP93XX_SYSCON_I2SCLKDIV_SENA (1<<31) +#define EP93XX_SYSCON_I2SCLKDIV_ORIDE (1<<29) +#define EP93XX_SYSCON_I2SCLKDIV_SPOL (1<<19) +#define EP93XX_I2SCLKDIV_SDIV (1 << 16) +#define EP93XX_I2SCLKDIV_LRDIV32 (0 << 17) +#define EP93XX_I2SCLKDIV_LRDIV64 (1 << 17) +#define EP93XX_I2SCLKDIV_LRDIV128 (2 << 17) +#define EP93XX_I2SCLKDIV_LRDIV_MASK (3 << 17) +#define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90) +#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31) +#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16) +#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15) +#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0) +#define EP93XX_SYSCON_SYSCFG EP93XX_SYSCON_REG(0x9c) +#define EP93XX_SYSCON_SYSCFG_REV_MASK (0xf0000000) +#define EP93XX_SYSCON_SYSCFG_REV_SHIFT (28) +#define EP93XX_SYSCON_SYSCFG_SBOOT (1<<8) +#define EP93XX_SYSCON_SYSCFG_LCSN7 (1<<7) +#define EP93XX_SYSCON_SYSCFG_LCSN6 (1<<6) +#define EP93XX_SYSCON_SYSCFG_LASDO (1<<5) +#define EP93XX_SYSCON_SYSCFG_LEEDA (1<<4) +#define EP93XX_SYSCON_SYSCFG_LEECLK (1<<3) +#define EP93XX_SYSCON_SYSCFG_LCSN2 (1<<1) +#define EP93XX_SYSCON_SYSCFG_LCSN1 (1<<0) +#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) + +/* EP93xx System Controller software locked register write */ +void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg); +void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits); + +static inline void ep93xx_devcfg_set_bits(unsigned int bits) +{ + ep93xx_devcfg_set_clear(bits, 0x00); +} + +static inline void ep93xx_devcfg_clear_bits(unsigned int bits) +{ + ep93xx_devcfg_set_clear(0x00, bits); +} + +#endif /* _EP93XX_SOC_H */ diff --git a/kernel/arch/arm/mach-ep93xx/ts72xx.c b/kernel/arch/arm/mach-ep93xx/ts72xx.c new file mode 100644 index 000000000..61f4b5dc4 --- /dev/null +++ b/kernel/arch/arm/mach-ep93xx/ts72xx.c @@ -0,0 +1,252 @@ +/* + * arch/arm/mach-ep93xx/ts72xx.c + * Technologic Systems TS72xx SBC support. + * + * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or (at + * your option) any later version. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/io.h> +#include <linux/m48t86.h> +#include <linux/mtd/nand.h> +#include <linux/mtd/partitions.h> + +#include <mach/hardware.h> + +#include <asm/mach-types.h> +#include <asm/mach/map.h> +#include <asm/mach/arch.h> + +#include "soc.h" +#include "ts72xx.h" + +static struct map_desc ts72xx_io_desc[] __initdata = { + { + .virtual = (unsigned long)TS72XX_MODEL_VIRT_BASE, + .pfn = __phys_to_pfn(TS72XX_MODEL_PHYS_BASE), + .length = TS72XX_MODEL_SIZE, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)TS72XX_OPTIONS_VIRT_BASE, + .pfn = __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE), + .length = TS72XX_OPTIONS_SIZE, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)TS72XX_OPTIONS2_VIRT_BASE, + .pfn = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE), + .length = TS72XX_OPTIONS2_SIZE, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)TS72XX_RTC_INDEX_VIRT_BASE, + .pfn = __phys_to_pfn(TS72XX_RTC_INDEX_PHYS_BASE), + .length = TS72XX_RTC_INDEX_SIZE, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)TS72XX_RTC_DATA_VIRT_BASE, + .pfn = __phys_to_pfn(TS72XX_RTC_DATA_PHYS_BASE), + .length = TS72XX_RTC_DATA_SIZE, + .type = MT_DEVICE, + } +}; + +static void __init ts72xx_map_io(void) +{ + ep93xx_map_io(); + iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc)); +} + + +/************************************************************************* + * NAND flash + *************************************************************************/ +#define TS72XX_NAND_CONTROL_ADDR_LINE 22 /* 0xN0400000 */ +#define TS72XX_NAND_BUSY_ADDR_LINE 23 /* 0xN0800000 */ + +static void ts72xx_nand_hwcontrol(struct mtd_info *mtd, + int cmd, unsigned int ctrl) +{ + struct nand_chip *chip = mtd->priv; + + if (ctrl & NAND_CTRL_CHANGE) { + void __iomem *addr = chip->IO_ADDR_R; + unsigned char bits; + + addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE); + + bits = __raw_readb(addr) & ~0x07; + bits |= (ctrl & NAND_NCE) << 2; /* bit 0 -> bit 2 */ + bits |= (ctrl & NAND_CLE); /* bit 1 -> bit 1 */ + bits |= (ctrl & NAND_ALE) >> 2; /* bit 2 -> bit 0 */ + + __raw_writeb(bits, addr); + } + + if (cmd != NAND_CMD_NONE) + __raw_writeb(cmd, chip->IO_ADDR_W); +} + +static int ts72xx_nand_device_ready(struct mtd_info *mtd) +{ + struct nand_chip *chip = mtd->priv; + void __iomem *addr = chip->IO_ADDR_R; + + addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE); + + return !!(__raw_readb(addr) & 0x20); +} + +#define TS72XX_BOOTROM_PART_SIZE (SZ_16K) +#define TS72XX_REDBOOT_PART_SIZE (SZ_2M + SZ_1M) + +static struct mtd_partition ts72xx_nand_parts[] = { + { + .name = "TS-BOOTROM", + .offset = 0, + .size = TS72XX_BOOTROM_PART_SIZE, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, { + .name = "Linux", + .offset = MTDPART_OFS_RETAIN, + .size = TS72XX_REDBOOT_PART_SIZE, + /* leave so much for last partition */ + }, { + .name = "RedBoot", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, +}; + +static struct platform_nand_data ts72xx_nand_data = { + .chip = { + .nr_chips = 1, + .chip_offset = 0, + .chip_delay = 15, + .partitions = ts72xx_nand_parts, + .nr_partitions = ARRAY_SIZE(ts72xx_nand_parts), + }, + .ctrl = { + .cmd_ctrl = ts72xx_nand_hwcontrol, + .dev_ready = ts72xx_nand_device_ready, + }, +}; + +static struct resource ts72xx_nand_resource[] = { + { + .start = 0, /* filled in later */ + .end = 0, /* filled in later */ + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device ts72xx_nand_flash = { + .name = "gen_nand", + .id = -1, + .dev.platform_data = &ts72xx_nand_data, + .resource = ts72xx_nand_resource, + .num_resources = ARRAY_SIZE(ts72xx_nand_resource), +}; + + +static void __init ts72xx_register_flash(void) +{ + /* + * TS7200 has NOR flash all other TS72xx board have NAND flash. + */ + if (board_is_ts7200()) { + ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M); + } else { + resource_size_t start; + + if (is_ts9420_installed()) + start = EP93XX_CS7_PHYS_BASE; + else + start = EP93XX_CS6_PHYS_BASE; + + ts72xx_nand_resource[0].start = start; + ts72xx_nand_resource[0].end = start + SZ_16M - 1; + + platform_device_register(&ts72xx_nand_flash); + } +} + + +static unsigned char ts72xx_rtc_readbyte(unsigned long addr) +{ + __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE); + return __raw_readb(TS72XX_RTC_DATA_VIRT_BASE); +} + +static void ts72xx_rtc_writebyte(unsigned char value, unsigned long addr) +{ + __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE); + __raw_writeb(value, TS72XX_RTC_DATA_VIRT_BASE); +} + +static struct m48t86_ops ts72xx_rtc_ops = { + .readbyte = ts72xx_rtc_readbyte, + .writebyte = ts72xx_rtc_writebyte, +}; + +static struct platform_device ts72xx_rtc_device = { + .name = "rtc-m48t86", + .id = -1, + .dev = { + .platform_data = &ts72xx_rtc_ops, + }, + .num_resources = 0, +}; + +static struct resource ts72xx_wdt_resources[] = { + { + .start = TS72XX_WDT_CONTROL_PHYS_BASE, + .end = TS72XX_WDT_CONTROL_PHYS_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = TS72XX_WDT_FEED_PHYS_BASE, + .end = TS72XX_WDT_FEED_PHYS_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device ts72xx_wdt_device = { + .name = "ts72xx-wdt", + .id = -1, + .num_resources = ARRAY_SIZE(ts72xx_wdt_resources), + .resource = ts72xx_wdt_resources, +}; + +static struct ep93xx_eth_data __initdata ts72xx_eth_data = { + .phy_id = 1, +}; + +static void __init ts72xx_init_machine(void) +{ + ep93xx_init_devices(); + ts72xx_register_flash(); + platform_device_register(&ts72xx_rtc_device); + platform_device_register(&ts72xx_wdt_device); + + ep93xx_register_eth(&ts72xx_eth_data, 1); +} + +MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC") + /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ + .atag_offset = 0x100, + .map_io = ts72xx_map_io, + .init_irq = ep93xx_init_irq, + .init_time = ep93xx_timer_init, + .init_machine = ts72xx_init_machine, + .init_late = ep93xx_init_late, + .restart = ep93xx_restart, +MACHINE_END diff --git a/kernel/arch/arm/mach-ep93xx/ts72xx.h b/kernel/arch/arm/mach-ep93xx/ts72xx.h new file mode 100644 index 000000000..071feaa30 --- /dev/null +++ b/kernel/arch/arm/mach-ep93xx/ts72xx.h @@ -0,0 +1,98 @@ +/* + * arch/arm/mach-ep93xx/include/mach/ts72xx.h + */ + +/* + * TS72xx memory map: + * + * virt phys size + * febff000 22000000 4K model number register (bits 0-2) + * febfe000 22400000 4K options register + * febfd000 22800000 4K options register #2 + * febf9000 10800000 4K TS-5620 RTC index register + * febf8000 11700000 4K TS-5620 RTC data register + */ + +#define TS72XX_MODEL_PHYS_BASE 0x22000000 +#define TS72XX_MODEL_VIRT_BASE IOMEM(0xfebff000) +#define TS72XX_MODEL_SIZE 0x00001000 + +#define TS72XX_MODEL_TS7200 0x00 +#define TS72XX_MODEL_TS7250 0x01 +#define TS72XX_MODEL_TS7260 0x02 +#define TS72XX_MODEL_TS7300 0x03 +#define TS72XX_MODEL_TS7400 0x04 +#define TS72XX_MODEL_MASK 0x07 + + +#define TS72XX_OPTIONS_PHYS_BASE 0x22400000 +#define TS72XX_OPTIONS_VIRT_BASE IOMEM(0xfebfe000) +#define TS72XX_OPTIONS_SIZE 0x00001000 + +#define TS72XX_OPTIONS_COM2_RS485 0x02 +#define TS72XX_OPTIONS_MAX197 0x01 + + +#define TS72XX_OPTIONS2_PHYS_BASE 0x22800000 +#define TS72XX_OPTIONS2_VIRT_BASE IOMEM(0xfebfd000) +#define TS72XX_OPTIONS2_SIZE 0x00001000 + +#define TS72XX_OPTIONS2_TS9420 0x04 +#define TS72XX_OPTIONS2_TS9420_BOOT 0x02 + + +#define TS72XX_RTC_INDEX_VIRT_BASE IOMEM(0xfebf9000) +#define TS72XX_RTC_INDEX_PHYS_BASE 0x10800000 +#define TS72XX_RTC_INDEX_SIZE 0x00001000 + +#define TS72XX_RTC_DATA_VIRT_BASE IOMEM(0xfebf8000) +#define TS72XX_RTC_DATA_PHYS_BASE 0x11700000 +#define TS72XX_RTC_DATA_SIZE 0x00001000 + +#define TS72XX_WDT_CONTROL_PHYS_BASE 0x23800000 +#define TS72XX_WDT_FEED_PHYS_BASE 0x23c00000 + +#ifndef __ASSEMBLY__ + +static inline int ts72xx_model(void) +{ + return __raw_readb(TS72XX_MODEL_VIRT_BASE) & TS72XX_MODEL_MASK; +} + +static inline int board_is_ts7200(void) +{ + return ts72xx_model() == TS72XX_MODEL_TS7200; +} + +static inline int board_is_ts7250(void) +{ + return ts72xx_model() == TS72XX_MODEL_TS7250; +} + +static inline int board_is_ts7260(void) +{ + return ts72xx_model() == TS72XX_MODEL_TS7260; +} + +static inline int board_is_ts7300(void) +{ + return ts72xx_model() == TS72XX_MODEL_TS7300; +} + +static inline int board_is_ts7400(void) +{ + return ts72xx_model() == TS72XX_MODEL_TS7400; +} + +static inline int is_max197_installed(void) +{ + return !!(__raw_readb(TS72XX_OPTIONS_VIRT_BASE) & + TS72XX_OPTIONS_MAX197); +} + +static inline int is_ts9420_installed(void) +{ + return !!(__raw_readb(TS72XX_OPTIONS2_VIRT_BASE) & + TS72XX_OPTIONS2_TS9420); +} +#endif diff --git a/kernel/arch/arm/mach-ep93xx/vision_ep9307.c b/kernel/arch/arm/mach-ep93xx/vision_ep9307.c new file mode 100644 index 000000000..6bc1c1815 --- /dev/null +++ b/kernel/arch/arm/mach-ep93xx/vision_ep9307.c @@ -0,0 +1,323 @@ +/* + * arch/arm/mach-ep93xx/vision_ep9307.c + * Vision Engraving Systems EP9307 SoM support. + * + * Copyright (C) 2008-2011 Vision Engraving Systems + * H Hartley Sweeten <hsweeten@visionengravers.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or (at + * your option) any later version. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/irq.h> +#include <linux/gpio.h> +#include <linux/fb.h> +#include <linux/io.h> +#include <linux/mtd/partitions.h> +#include <linux/i2c.h> +#include <linux/i2c-gpio.h> +#include <linux/platform_data/pca953x.h> +#include <linux/spi/spi.h> +#include <linux/spi/flash.h> +#include <linux/spi/mmc_spi.h> +#include <linux/mmc/host.h> + +#include <mach/hardware.h> +#include <linux/platform_data/video-ep93xx.h> +#include <linux/platform_data/spi-ep93xx.h> +#include <mach/gpio-ep93xx.h> + +#include <asm/mach-types.h> +#include <asm/mach/map.h> +#include <asm/mach/arch.h> + +#include "soc.h" + +/************************************************************************* + * Static I/O mappings for the FPGA + *************************************************************************/ +#define VISION_PHYS_BASE EP93XX_CS7_PHYS_BASE +#define VISION_VIRT_BASE 0xfebff000 + +static struct map_desc vision_io_desc[] __initdata = { + { + .virtual = VISION_VIRT_BASE, + .pfn = __phys_to_pfn(VISION_PHYS_BASE), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + +static void __init vision_map_io(void) +{ + ep93xx_map_io(); + + iotable_init(vision_io_desc, ARRAY_SIZE(vision_io_desc)); +} + +/************************************************************************* + * Ethernet + *************************************************************************/ +static struct ep93xx_eth_data vision_eth_data __initdata = { + .phy_id = 1, +}; + +/************************************************************************* + * Framebuffer + *************************************************************************/ +#define VISION_LCD_ENABLE EP93XX_GPIO_LINE_EGPIO1 + +static int vision_lcd_setup(struct platform_device *pdev) +{ + int err; + + err = gpio_request_one(VISION_LCD_ENABLE, GPIOF_INIT_HIGH, + dev_name(&pdev->dev)); + if (err) + return err; + + ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_RAS | + EP93XX_SYSCON_DEVCFG_RASONP3 | + EP93XX_SYSCON_DEVCFG_EXVC); + + return 0; +} + +static void vision_lcd_teardown(struct platform_device *pdev) +{ + gpio_free(VISION_LCD_ENABLE); +} + +static void vision_lcd_blank(int blank_mode, struct fb_info *info) +{ + if (blank_mode) + gpio_set_value(VISION_LCD_ENABLE, 0); + else + gpio_set_value(VISION_LCD_ENABLE, 1); +} + +static struct ep93xxfb_mach_info ep93xxfb_info __initdata = { + .num_modes = EP93XXFB_USE_MODEDB, + .bpp = 16, + .flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING, + .setup = vision_lcd_setup, + .teardown = vision_lcd_teardown, + .blank = vision_lcd_blank, +}; + + +/************************************************************************* + * GPIO Expanders + *************************************************************************/ +#define PCA9539_74_GPIO_BASE (EP93XX_GPIO_LINE_MAX + 1) +#define PCA9539_75_GPIO_BASE (PCA9539_74_GPIO_BASE + 16) +#define PCA9539_76_GPIO_BASE (PCA9539_75_GPIO_BASE + 16) +#define PCA9539_77_GPIO_BASE (PCA9539_76_GPIO_BASE + 16) + +static struct pca953x_platform_data pca953x_74_gpio_data = { + .gpio_base = PCA9539_74_GPIO_BASE, + .irq_base = EP93XX_BOARD_IRQ(0), +}; + +static struct pca953x_platform_data pca953x_75_gpio_data = { + .gpio_base = PCA9539_75_GPIO_BASE, + .irq_base = -1, +}; + +static struct pca953x_platform_data pca953x_76_gpio_data = { + .gpio_base = PCA9539_76_GPIO_BASE, + .irq_base = -1, +}; + +static struct pca953x_platform_data pca953x_77_gpio_data = { + .gpio_base = PCA9539_77_GPIO_BASE, + .irq_base = -1, +}; + +/************************************************************************* + * I2C Bus + *************************************************************************/ +static struct i2c_gpio_platform_data vision_i2c_gpio_data __initdata = { + .sda_pin = EP93XX_GPIO_LINE_EEDAT, + .scl_pin = EP93XX_GPIO_LINE_EECLK, +}; + +static struct i2c_board_info vision_i2c_info[] __initdata = { + { + I2C_BOARD_INFO("isl1208", 0x6f), + .irq = IRQ_EP93XX_EXT1, + }, { + I2C_BOARD_INFO("pca9539", 0x74), + .platform_data = &pca953x_74_gpio_data, + }, { + I2C_BOARD_INFO("pca9539", 0x75), + .platform_data = &pca953x_75_gpio_data, + }, { + I2C_BOARD_INFO("pca9539", 0x76), + .platform_data = &pca953x_76_gpio_data, + }, { + I2C_BOARD_INFO("pca9539", 0x77), + .platform_data = &pca953x_77_gpio_data, + }, +}; + +/************************************************************************* + * SPI Flash + *************************************************************************/ +#define VISION_SPI_FLASH_CS EP93XX_GPIO_LINE_EGPIO7 + +static struct mtd_partition vision_spi_flash_partitions[] = { + { + .name = "SPI bootstrap", + .offset = 0, + .size = SZ_4K, + }, { + .name = "Bootstrap config", + .offset = MTDPART_OFS_APPEND, + .size = SZ_4K, + }, { + .name = "System config", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct flash_platform_data vision_spi_flash_data = { + .name = "SPI Flash", + .parts = vision_spi_flash_partitions, + .nr_parts = ARRAY_SIZE(vision_spi_flash_partitions), +}; + +static int vision_spi_flash_hw_setup(struct spi_device *spi) +{ + return gpio_request_one(VISION_SPI_FLASH_CS, GPIOF_INIT_HIGH, + spi->modalias); +} + +static void vision_spi_flash_hw_cleanup(struct spi_device *spi) +{ + gpio_free(VISION_SPI_FLASH_CS); +} + +static void vision_spi_flash_hw_cs_control(struct spi_device *spi, int value) +{ + gpio_set_value(VISION_SPI_FLASH_CS, value); +} + +static struct ep93xx_spi_chip_ops vision_spi_flash_hw = { + .setup = vision_spi_flash_hw_setup, + .cleanup = vision_spi_flash_hw_cleanup, + .cs_control = vision_spi_flash_hw_cs_control, +}; + +/************************************************************************* + * SPI SD/MMC host + *************************************************************************/ +#define VISION_SPI_MMC_CS EP93XX_GPIO_LINE_G(2) +#define VISION_SPI_MMC_WP EP93XX_GPIO_LINE_F(0) +#define VISION_SPI_MMC_CD EP93XX_GPIO_LINE_EGPIO15 + +static struct mmc_spi_platform_data vision_spi_mmc_data = { + .detect_delay = 100, + .powerup_msecs = 100, + .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, + .flags = MMC_SPI_USE_CD_GPIO | MMC_SPI_USE_RO_GPIO, + .cd_gpio = VISION_SPI_MMC_CD, + .cd_debounce = 1, + .ro_gpio = VISION_SPI_MMC_WP, + .caps2 = MMC_CAP2_RO_ACTIVE_HIGH, +}; + +static int vision_spi_mmc_hw_setup(struct spi_device *spi) +{ + return gpio_request_one(VISION_SPI_MMC_CS, GPIOF_INIT_HIGH, + spi->modalias); +} + +static void vision_spi_mmc_hw_cleanup(struct spi_device *spi) +{ + gpio_free(VISION_SPI_MMC_CS); +} + +static void vision_spi_mmc_hw_cs_control(struct spi_device *spi, int value) +{ + gpio_set_value(VISION_SPI_MMC_CS, value); +} + +static struct ep93xx_spi_chip_ops vision_spi_mmc_hw = { + .setup = vision_spi_mmc_hw_setup, + .cleanup = vision_spi_mmc_hw_cleanup, + .cs_control = vision_spi_mmc_hw_cs_control, +}; + +/************************************************************************* + * SPI Bus + *************************************************************************/ +static struct spi_board_info vision_spi_board_info[] __initdata = { + { + .modalias = "sst25l", + .platform_data = &vision_spi_flash_data, + .controller_data = &vision_spi_flash_hw, + .max_speed_hz = 20000000, + .bus_num = 0, + .chip_select = 0, + .mode = SPI_MODE_3, + }, { + .modalias = "mmc_spi", + .platform_data = &vision_spi_mmc_data, + .controller_data = &vision_spi_mmc_hw, + .max_speed_hz = 20000000, + .bus_num = 0, + .chip_select = 1, + .mode = SPI_MODE_3, + }, +}; + +static struct ep93xx_spi_info vision_spi_master __initdata = { + .num_chipselect = ARRAY_SIZE(vision_spi_board_info), +}; + +/************************************************************************* + * Machine Initialization + *************************************************************************/ +static void __init vision_init_machine(void) +{ + ep93xx_init_devices(); + ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_64M); + ep93xx_register_eth(&vision_eth_data, 1); + ep93xx_register_fb(&ep93xxfb_info); + ep93xx_register_pwm(1, 0); + + /* + * Request the gpio expander's interrupt gpio line now to prevent + * the kernel from doing a WARN in gpiolib:gpio_ensure_requested(). + */ + if (gpio_request_one(EP93XX_GPIO_LINE_F(7), GPIOF_DIR_IN, + "pca9539:74")) + pr_warn("cannot request interrupt gpio for pca9539:74\n"); + + vision_i2c_info[1].irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7)); + + ep93xx_register_i2c(&vision_i2c_gpio_data, vision_i2c_info, + ARRAY_SIZE(vision_i2c_info)); + ep93xx_register_spi(&vision_spi_master, vision_spi_board_info, + ARRAY_SIZE(vision_spi_board_info)); +} + +MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307") + /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */ + .atag_offset = 0x100, + .map_io = vision_map_io, + .init_irq = ep93xx_init_irq, + .init_time = ep93xx_timer_init, + .init_machine = vision_init_machine, + .init_late = ep93xx_init_late, + .restart = ep93xx_restart, +MACHINE_END |