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Diffstat (limited to 'kernel/arch/arm/boot/dts/zynq-7000.dtsi')
-rw-r--r--kernel/arch/arm/boot/dts/zynq-7000.dtsi19
1 files changed, 16 insertions, 3 deletions
diff --git a/kernel/arch/arm/boot/dts/zynq-7000.dtsi b/kernel/arch/arm/boot/dts/zynq-7000.dtsi
index 9ea54b3db..1a5220e05 100644
--- a/kernel/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/kernel/arch/arm/boot/dts/zynq-7000.dtsi
@@ -57,7 +57,7 @@
regulator-always-on;
};
- amba {
+ amba: amba {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@@ -139,6 +139,7 @@
L2: cache-controller@f8f02000 {
compatible = "arm,pl310-cache";
reg = <0xF8F02000 0x1000>;
+ interrupts = <0 2 4>;
arm,data-latency = <3 2 2>;
arm,tag-latency = <2 2 2>;
cache-unified;
@@ -193,7 +194,7 @@
};
gem0: ethernet@e000b000 {
- compatible = "cdns,zynq-gem";
+ compatible = "cdns,zynq-gem", "cdns,gem";
reg = <0xe000b000 0x1000>;
status = "disabled";
interrupts = <0 22 4>;
@@ -204,7 +205,7 @@
};
gem1: ethernet@e000c000 {
- compatible = "cdns,zynq-gem";
+ compatible = "cdns,zynq-gem", "cdns,gem";
reg = <0xe000c000 0x1000>;
status = "disabled";
interrupts = <0 45 4>;
@@ -258,6 +259,13 @@
reg = <0x100 0x100>;
};
+ rstc: rstc@200 {
+ compatible = "xlnx,zynq-reset";
+ reg = <0x200 0x48>;
+ #reset-cells = <1>;
+ syscon = <&slcr>;
+ };
+
pinctrl0: pinctrl@700 {
compatible = "xlnx,pinctrl-zynq";
reg = <0x700 0x200>;
@@ -286,6 +294,11 @@
devcfg: devcfg@f8007000 {
compatible = "xlnx,zynq-devcfg-1.0";
reg = <0xf8007000 0x100>;
+ interrupt-parent = <&intc>;
+ interrupts = <0 8 4>;
+ clocks = <&clkc 12>;
+ clock-names = "ref_clk";
+ syscon = <&slcr>;
};
global_timer: timer@f8f00200 {