diff options
Diffstat (limited to 'kernel/Documentation/devicetree/bindings/rng')
3 files changed, 47 insertions, 0 deletions
diff --git a/kernel/Documentation/devicetree/bindings/rng/apm,rng.txt b/kernel/Documentation/devicetree/bindings/rng/apm,rng.txt new file mode 100644 index 000000000..4dde4b06c --- /dev/null +++ b/kernel/Documentation/devicetree/bindings/rng/apm,rng.txt @@ -0,0 +1,17 @@ +APM X-Gene SoC random number generator. + +Required properties: + +- compatible : should be "apm,xgene-rng" +- reg : specifies base physical address and size of the registers map +- clocks : phandle to clock-controller plus clock-specifier pair +- interrupts : specify the fault interrupt for the RNG device + +Example: + + rng: rng@10520000 { + compatible = "apm,xgene-rng"; + reg = <0x0 0x10520000 0x0 0x100>; + interrupts = <0x0 0x41 0x4>; + clocks = <&rngpkaclk 0>; + }; diff --git a/kernel/Documentation/devicetree/bindings/rng/brcm,bcm2835.txt b/kernel/Documentation/devicetree/bindings/rng/brcm,bcm2835.txt new file mode 100644 index 000000000..07ccdaa68 --- /dev/null +++ b/kernel/Documentation/devicetree/bindings/rng/brcm,bcm2835.txt @@ -0,0 +1,13 @@ +BCM2835 Random number generator + +Required properties: + +- compatible : should be "brcm,bcm2835-rng" +- reg : Specifies base physical address and size of the registers. + +Example: + +rng { + compatible = "brcm,bcm2835-rng"; + reg = <0x7e104000 0x10>; +}; diff --git a/kernel/Documentation/devicetree/bindings/rng/qcom,prng.txt b/kernel/Documentation/devicetree/bindings/rng/qcom,prng.txt new file mode 100644 index 000000000..8e5853c28 --- /dev/null +++ b/kernel/Documentation/devicetree/bindings/rng/qcom,prng.txt @@ -0,0 +1,17 @@ +Qualcomm MSM pseudo random number generator. + +Required properties: + +- compatible : should be "qcom,prng" +- reg : specifies base physical address and size of the registers map +- clocks : phandle to clock-controller plus clock-specifier pair +- clock-names : "core" clocks all registers, FIFO and circuits in PRNG IP block + +Example: + + rng@f9bff000 { + compatible = "qcom,prng"; + reg = <0xf9bff000 0x200>; + clocks = <&clock GCC_PRNG_AHB_CLK>; + clock-names = "core"; + }; |