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-rw-r--r--kernel/Documentation/devicetree/bindings/pci/layerscape-pci.txt14
1 files changed, 12 insertions, 2 deletions
diff --git a/kernel/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/kernel/Documentation/devicetree/bindings/pci/layerscape-pci.txt
index 6286f049b..e3767857d 100644
--- a/kernel/Documentation/devicetree/bindings/pci/layerscape-pci.txt
+++ b/kernel/Documentation/devicetree/bindings/pci/layerscape-pci.txt
@@ -1,10 +1,20 @@
Freescale Layerscape PCIe controller
-This PCIe host controller is based on the Synopsis Designware PCIe IP
+This PCIe host controller is based on the Synopsys DesignWare PCIe IP
and thus inherits all the common properties defined in designware-pcie.txt.
+This controller derives its clocks from the Reset Configuration Word (RCW)
+which is used to describe the PLL settings at the time of chip-reset.
+
+Also as per the available Reference Manuals, there is no specific 'version'
+register available in the Freescale PCIe controller register set,
+which can allow determining the underlying DesignWare PCIe controller version
+information.
+
Required properties:
-- compatible: should contain the platform identifier such as "fsl,ls1021a-pcie"
+- compatible: should contain the platform identifier such as:
+ "fsl,ls1021a-pcie", "snps,dw-pcie"
+ "fsl,ls2080a-pcie", "snps,dw-pcie"
- reg: base addresses and lengths of the PCIe controller
- interrupts: A list of interrupt outputs of the controller. Must contain an
entry for each entry in the interrupt-names property.