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| author |   Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
|---|---|---|
| committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
| commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
| tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/tests/tcg/cris/check_movprv32.s | |
| parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) | |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/tests/tcg/cris/check_movprv32.s')
| -rw-r--r-- | qemu/tests/tcg/cris/check_movprv32.s | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/qemu/tests/tcg/cris/check_movprv32.s b/qemu/tests/tcg/cris/check_movprv32.s new file mode 100644 index 000000000..d0d90e124 --- /dev/null +++ b/qemu/tests/tcg/cris/check_movprv32.s @@ -0,0 +1,21 @@ +# mach: crisv32 +# output: ffffff20\nbb113344\n + +# Test v32-specific special registers. FIXME: more registers. + + .include "testutils.inc" + start + moveq -1,r3 + setf zcvn + move vr,r3 + test_cc 1 1 1 1 + checkr3 ffffff20 + + moveq -1,r3 + move.d 0xbb113344,r4 + clearf cvnz + move r4,mof + test_cc 0 0 0 0 + move mof,r3 + checkr3 bb113344 + quit |