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| author |   Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
|---|---|---|
| committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
| commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
| tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/tests/tcg/cris/check_movei.s | |
| parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) | |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/tests/tcg/cris/check_movei.s')
| -rw-r--r-- | qemu/tests/tcg/cris/check_movei.s | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/qemu/tests/tcg/cris/check_movei.s b/qemu/tests/tcg/cris/check_movei.s new file mode 100644 index 000000000..bbfa63337 --- /dev/null +++ b/qemu/tests/tcg/cris/check_movei.s @@ -0,0 +1,50 @@ +# mach: crisv32 +# output: fffffffe\n +# output: fffffffe\n + +; Check basic integral-write semantics regarding flags. + + .include "testutils.inc" + start + + move.d 0, $r3 +; A write that works. Check that flags are set correspondingly. + move.d d,r4 + ;; store to bring it into the tlb with the right prot bits + move.d r3,[r4] + moveq -2,r5 + setf c + clearf p + move.d [r4],r3 + ax + move.d r5,[r4] + move.d [r4],r3 + + bcc 0f + nop + fail + +0: + checkr3 fffffffe + +; A write that fails; check flags too. + move.d d,r4 + moveq 23,r5 + setf p + clearf c + move.d [r4],r3 + ax + move.d r5,[r4] + move.d [r4],r3 + + bcs 0f + nop + fail + +0: + checkr3 fffffffe + quit + + .data +d: + .dword 42424242 |