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| author |   Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
|---|---|---|
| committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
| commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
| tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/tests/tcg/cris/check_movecr.s | |
| parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) | |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/tests/tcg/cris/check_movecr.s')
| -rw-r--r-- | qemu/tests/tcg/cris/check_movecr.s | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/qemu/tests/tcg/cris/check_movecr.s b/qemu/tests/tcg/cris/check_movecr.s new file mode 100644 index 000000000..da8ec2628 --- /dev/null +++ b/qemu/tests/tcg/cris/check_movecr.s @@ -0,0 +1,37 @@ +# mach: crisv3 crisv8 crisv10 crisv32 +# output: ffffff42\n94\nffff4321\n9234\n76543210\n76540000\n + +; Move constant byte, word, dword to register. Check that no extension is +; performed, that only part of the register is set. + + .include "testutils.inc" + startnostack + moveq -1,r3 + move.b 0x42,r3 + test_move_cc 0 0 0 0 + checkr3 ffffff42 + + moveq 0,r3 + move.b 0x94,r3 + test_move_cc 1 0 0 0 + checkr3 94 + + moveq -1,r3 + move.w 0x4321,r3 + test_move_cc 0 0 0 0 + checkr3 ffff4321 + + moveq 0,r3 + move.w 0x9234,r3 + test_move_cc 1 0 0 0 + checkr3 9234 + + move.d 0x76543210,r3 + test_move_cc 0 0 0 0 + checkr3 76543210 + + move.w 0,r3 + test_move_cc 0 1 0 0 + checkr3 76540000 + + quit |