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| author |   Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
|---|---|---|
| committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
| commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
| tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/tests/tcg/cris/check_addq.s | |
| parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) | |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/tests/tcg/cris/check_addq.s')
| -rw-r--r-- | qemu/tests/tcg/cris/check_addq.s | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/qemu/tests/tcg/cris/check_addq.s b/qemu/tests/tcg/cris/check_addq.s new file mode 100644 index 000000000..e6f874f9b --- /dev/null +++ b/qemu/tests/tcg/cris/check_addq.s @@ -0,0 +1,47 @@ +# mach: crisv3 crisv8 crisv10 crisv32 +# output: ffffffff\n0\n1\n100\n10000\n47\n67\na6\n80000001\n + + .include "testutils.inc" + start + moveq -2,r3 + addq 1,r3 + test_cc 1 0 0 0 + checkr3 ffffffff + + addq 1,r3 + test_cc 0 1 0 1 + checkr3 0 + + addq 1,r3 + test_cc 0 0 0 0 + checkr3 1 + + move.d 0xff,r3 + addq 1,r3 + test_cc 0 0 0 0 + checkr3 100 + + move.d 0xffff,r3 + addq 1,r3 + test_cc 0 0 0 0 + checkr3 10000 + + move.d 0x42,r3 + addq 5,r3 + test_cc 0 0 0 0 + checkr3 47 + + addq 32,r3 + test_cc 0 0 0 0 + checkr3 67 + + addq 63,r3 + test_cc 0 0 0 0 + checkr3 a6 + + move.d 0x7ffffffe,r3 + addq 3,r3 + test_cc 1 0 1 0 + checkr3 80000001 + + quit |