Add qemu 2.4.0

Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>

5 files changed, 182 insertions, 0 deletions

diff --git a/qemu/tests/tcg/alpha/Makefile b/qemu/tests/tcg/alpha/Makefile
new file mode 100644
index 000000000..2b1f03d04
--- /dev/null
+++ b/qemu/tests/tcg/alpha/Makefile
@@ -0,0 +1,35 @@
+CROSS=alpha-linux-gnu-
+CC=$(CROSS)gcc
+AS=$(CROSS)as
+
+SIM=../../alpha-linux-user/qemu-alpha
+
+CFLAGS=-O
+LINK=$(CC) -o $@ crt.o $< -nostdlib
+
+TESTS=test-cond test-cmov
+
+all: hello-alpha $(TESTS)
+
+hello-alpha: hello-alpha.o crt.o
+	$(LINK)
+
+test-cond: test-cond.o crt.o
+	$(LINK)
+
+test-cmov.o: test-cond.c
+	$(CC) -c $(CFLAGS) -DTEST_CMOV -o $@ $<
+
+test-cmov: test-cmov.o crt.o
+	$(LINK)
+
+test-ovf: test-ovf.o crt.o
+	$(LINK)
+
+check: $(TESTS)
+	for f in $(TESTS); do $(SIM) $$f || exit 1; done
+
+clean:
+	$(RM) *.o *~ hello-alpha $(TESTS)
+
+.PHONY: clean all check
diff --git a/qemu/tests/tcg/alpha/crt.s b/qemu/tests/tcg/alpha/crt.s
new file mode 100644
index 000000000..31af8825b
--- /dev/null
+++ b/qemu/tests/tcg/alpha/crt.s
@@ -0,0 +1,26 @@
+	.text
+
+	.globl _start
+	.ent _start,0
+_start:
+	.frame $15,0,$15
+	br $29,1f
+1:	ldgp $29, 0($29)
+	.prologue 0
+	ldq $27,main($29) !literal!1
+	jsr $26,($27)
+	or $0,$0,$16
+	.end _start
+
+	.globl _exit
+_exit:
+	lda $0,1
+	callsys
+
+	call_pal 0
+
+	.globl write
+write:
+	lda $0,4
+	callsys
+	ret
diff --git a/qemu/tests/tcg/alpha/hello-alpha.c b/qemu/tests/tcg/alpha/hello-alpha.c
new file mode 100644
index 000000000..79892e652
--- /dev/null
+++ b/qemu/tests/tcg/alpha/hello-alpha.c
@@ -0,0 +1,5 @@
+int main (void)
+{
+  write (1, "hello\n", 6);
+  return 0;
+}
diff --git a/qemu/tests/tcg/alpha/test-cond.c b/qemu/tests/tcg/alpha/test-cond.c
new file mode 100644
index 000000000..74adffaa6
--- /dev/null
+++ b/qemu/tests/tcg/alpha/test-cond.c
@@ -0,0 +1,87 @@
+
+#ifdef TEST_CMOV
+
+#define TEST_COND(N) 				\
+int test_##N (long a)				\
+{						\
+  int res = 1;					\
+						\
+  asm ("cmov"#N" %1,$31,%0"			\
+       : "+r" (res) : "r" (a));			\
+  return !res;					\
+}
+
+#else
+
+#define TEST_COND(N) 				\
+int test_##N (long a)				\
+{						\
+  int res = 1;					\
+						\
+  asm ("b"#N" %1,1f\n\t"			\
+       "addq $31,$31,%0\n\t"			\
+       "1: unop\n"				\
+       : "+r" (res) : "r" (a));			\
+  return res;					\
+}
+
+#endif
+
+TEST_COND(eq)
+TEST_COND(ne)
+TEST_COND(ge)
+TEST_COND(gt)
+TEST_COND(lbc)
+TEST_COND(lbs)
+TEST_COND(le)
+TEST_COND(lt)
+
+static struct {
+  int (*func)(long);
+  long v;
+  int r;
+} vectors[] =
+  {
+    {test_eq, 0, 1},
+    {test_eq, 1, 0},
+
+    {test_ne, 0, 0},
+    {test_ne, 1, 1},
+
+    {test_ge, 0, 1},
+    {test_ge, 1, 1},
+    {test_ge, -1, 0},
+
+    {test_gt, 0, 0},
+    {test_gt, 1, 1},
+    {test_gt, -1, 0},
+
+    {test_lbc, 0, 1},
+    {test_lbc, 1, 0},
+    {test_lbc, -1, 0},
+
+    {test_lbs, 0, 0},
+    {test_lbs, 1, 1},
+    {test_lbs, -1, 1},
+
+    {test_le, 0, 1},
+    {test_le, 1, 0},
+    {test_le, -1, 1},
+
+    {test_lt, 0, 0},
+    {test_lt, 1, 0},
+    {test_lt, -1, 1},
+  };
+
+int main (void)
+{
+  int i;
+
+  for (i = 0; i < sizeof (vectors)/sizeof(vectors[0]); i++)
+    if ((*vectors[i].func)(vectors[i].v) != vectors[i].r) {
+      write(1, "Failed\n", 7);
+      return 1;
+    }
+  write(1, "OK\n", 3);
+  return 0;
+}
diff --git a/qemu/tests/tcg/alpha/test-ovf.c b/qemu/tests/tcg/alpha/test-ovf.c
new file mode 100644
index 000000000..01c80e752
--- /dev/null
+++ b/qemu/tests/tcg/alpha/test-ovf.c
@@ -0,0 +1,29 @@
+static long test_subqv (long a, long b)
+{
+  long res;
+
+  asm ("subq/v %1,%2,%0"
+       : "=r" (res) : "r" (a), "r" (b));
+  return res;
+}
+static struct {
+  long (*func)(long, long);
+  long a;
+  long b;
+  long r;
+} vectors[] =
+  {
+    {test_subqv, 0, 0x7d54000, 0xfffffffff82ac000L}
+  };
+
+int main (void)
+{
+  int i;
+
+  for (i = 0; i < sizeof (vectors)/sizeof(vectors[0]); i++)
+    if ((*vectors[i].func)(vectors[i].a, vectors[i].b) != vectors[i].r) {
+      write(1, "Failed\n", 7);
+    }
+  write(1, "OK\n", 3);
+  return 0;
+}