diff options
| author |   Don Dugger <n0ano@n0ano.com> | 2016-06-03 03:33:22 +0000 |
|---|---|---|
| committer |   Gerrit Code Review <gerrit@172.30.200.206> | 2016-06-03 03:33:23 +0000 |
| commit | da27230f80795d0028333713f036d44c53cb0e68 (patch) | |
| tree | b3d379eaf000adf72b36cb01cdf4d79c3e3f064c /qemu/tcg/mips/tcg-target.h | |
| parent | 0e68cb048bb8aadb14675f5d4286d8ab2fc35449 (diff) | |
| parent | 437fd90c0250dee670290f9b714253671a990160 (diff) | |
Merge "These changes are the raw update to qemu-2.6."
Diffstat (limited to 'qemu/tcg/mips/tcg-target.h')
| -rw-r--r-- | qemu/tcg/mips/tcg-target.h | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/qemu/tcg/mips/tcg-target.h b/qemu/tcg/mips/tcg-target.h index f5ba52cac..b1cda37b6 100644 --- a/qemu/tcg/mips/tcg-target.h +++ b/qemu/tcg/mips/tcg-target.h @@ -96,6 +96,13 @@ extern bool use_mips32_instructions; extern bool use_mips32r2_instructions; #endif +/* MIPS32R6 instruction set detection */ +#if defined(__mips_isa_rev) && (__mips_isa_rev >= 6) +#define use_mips32r6_instructions 1 +#else +#define use_mips32r6_instructions 0 +#endif + /* optional instructions */ #define TCG_TARGET_HAS_div_i32 1 #define TCG_TARGET_HAS_rem_i32 1 @@ -105,8 +112,8 @@ extern bool use_mips32r2_instructions; #define TCG_TARGET_HAS_orc_i32 0 #define TCG_TARGET_HAS_eqv_i32 0 #define TCG_TARGET_HAS_nand_i32 0 -#define TCG_TARGET_HAS_mulu2_i32 1 -#define TCG_TARGET_HAS_muls2_i32 1 +#define TCG_TARGET_HAS_mulu2_i32 (!use_mips32r6_instructions) +#define TCG_TARGET_HAS_muls2_i32 (!use_mips32r6_instructions) #define TCG_TARGET_HAS_muluh_i32 1 #define TCG_TARGET_HAS_mulsh_i32 1 |