diff options
| author |   Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
|---|---|---|
| committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
| commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
| tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/nand_spl | |
| parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) | |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/nand_spl')
17 files changed, 1484 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8315erdb/Makefile b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8315erdb/Makefile new file mode 100644 index 000000000..f4e7854d5 --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8315erdb/Makefile @@ -0,0 +1,71 @@ +# +# (C) Copyright 2007 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# (C) Copyright 2008 Freescale Semiconductor +# +# SPDX-License-Identifier: GPL-2.0+ +# + +PAD_TO := 0xfff04000 + +nandobj := $(objtree)/nand_spl/ + +LDSCRIPT= $(srctree)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \ + $(LDFLAGS) $(LDFLAGS_FINAL) +asflags-y += -DCONFIG_NAND_SPL +ccflags-y += -DCONFIG_NAND_SPL + +SOBJS = start.o ticks.o +COBJS = nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o spl_minimal.o \ + time.o cache.o + +OBJS := $(addprefix $(obj)/,$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(nandobj)board/$(BOARDDIR) + +targets += $(__OBJS) + +all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \ + -Map $(nandobj)u-boot-spl.map -o $@ + +$(nandobj)u-boot.lds: $(LDSCRIPT) + $(CPP) $(cpp_flags) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@ + +# create symbolic links for common files + +$(obj)/start.S: + ln -sf $(srctree)/arch/powerpc/cpu/mpc83xx/start.S $@ + +$(obj)/nand_boot_fsl_elbc.c: + ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@ + +$(obj)/sdram.c: + ln -sf $(srctree)/board/$(BOARDDIR)/sdram.c $@ + +$(obj)/$(BOARD).c: + ln -sf $(srctree)/board/$(BOARDDIR)/$(BOARD).c $@ + +$(obj)/ns16550.c: + ln -sf $(srctree)/drivers/serial/ns16550.c $@ + +$(obj)/spl_minimal.c: + ln -sf $(srctree)/arch/powerpc/cpu/mpc83xx/spl_minimal.c $@ + +$(obj)/cache.c: + ln -sf $(srctree)/arch/powerpc/lib/cache.c $@ + +$(obj)/time.c: + ln -sf $(srctree)/arch/powerpc/lib/time.c $@ + +$(obj)/ticks.S: + ln -sf $(srctree)/arch/powerpc/lib/ticks.S $@ diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8315erdb/u-boot.lds b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8315erdb/u-boot.lds new file mode 100644 index 000000000..774772bea --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8315erdb/u-boot.lds @@ -0,0 +1,39 @@ +/* + * (C) Copyright 2006 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * Copyright 2008 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OUTPUT_ARCH(powerpc) +SECTIONS +{ + . = 0xfff00000; + .text : { + *(.text*) + . = ALIGN(16); + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + + . = ALIGN(8); + .data : { + *(.data*) + *(.sdata*) + _GOT2_TABLE_ = .; + KEEP(*(.got2)) + KEEP(*(.got)) + PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); + } + __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; + + . = ALIGN(8); + __bss_start = .; + .bss (NOLOAD) : { + *(.*bss) + } + __bss_end = .; +} +ENTRY(_start) +ASSERT(__bss_end <= 0xfff01000, "NAND bootstrap too big"); diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/Makefile b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/Makefile new file mode 100644 index 000000000..9f338024e --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/Makefile @@ -0,0 +1,91 @@ +# +# (C) Copyright 2007 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# +# Copyright 2009-2011 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +CONFIG_SYS_TEXT_BASE_SPL := 0xfff00000 +PAD_TO := 0xfff01000 + +nandobj := $(objtree)/nand_spl/ + +LDSCRIPT= $(srctree)/$(CPUDIR)/u-boot-nand_spl.lds +LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \ + $(LDFLAGS) $(LDFLAGS_FINAL) +asflags-y += -DCONFIG_NAND_SPL +ccflags-y += -DCONFIG_NAND_SPL + +SOBJS = start.o resetvec.o +COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \ + nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o + +OBJS := $(addprefix $(obj)/,$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(nandobj)board/$(BOARDDIR) + +targets += $(__OBJS) + +all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \ + -Map $(nandobj)u-boot-spl.map -o $@ + +$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) + $(CPP) $(cpp_flags) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \ + -ansi -D__ASSEMBLY__ -P - <$< >$@ + +# create symbolic links for common files + +$(obj)/cache.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/lib/cache.c $@ + +$(obj)/cpu_init_early.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $@ + +$(obj)/spl_minimal.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $@ + +$(obj)/fsl_law.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc8xxx/law.c $@ + +$(obj)/law.c: + @rm -f $@ + ln -sf $(srctree)/board/$(BOARDDIR)/law.c $@ + +$(obj)/nand_boot_fsl_elbc.c: + @rm -f $@ + ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@ + +$(obj)/ns16550.c: + @rm -f $@ + ln -sf $(srctree)/drivers/serial/ns16550.c $@ + +$(obj)/resetvec.S: + @rm -f $@ + ln -s $(srctree)/$(CPUDIR)/resetvec.S $@ + +$(obj)/start.S: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/start.S $@ + +$(obj)/tlb.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/tlb.c $@ + +$(obj)/tlb_table.c: + @rm -f $@ + ln -sf $(srctree)/board/$(BOARDDIR)/tlb.c $@ diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/nand_boot.c b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/nand_boot.c new file mode 100644 index 000000000..71178e4b9 --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/nand_boot.c @@ -0,0 +1,67 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <ns16550.h> +#include <asm/io.h> +#include <nand.h> + +u32 sysclk_tbl[] = { + 33333000, 39999600, 49999500, 66666000, + 83332500, 99999000, 133332000, 166665000 +}; + +void board_init_f(ulong bootflag) +{ + int px_spd; + u32 plat_ratio, bus_clk, sys_clk; + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + +#if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM) + /* for FPGA */ + set_lbc_br(3, CONFIG_SYS_BR3_PRELIM); + set_lbc_or(3, CONFIG_SYS_OR3_PRELIM); +#else +#error CONFIG_SYS_BR3_PRELIM, CONFIG_SYS_OR3_PRELIM must be defined +#endif + + /* initialize selected port with appropriate baud rate */ + px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); + sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK]; + plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; + bus_clk = sys_clk * plat_ratio / 2; + + NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, + bus_clk / 16 / CONFIG_BAUDRATE); + + puts("\nNAND boot... "); + + /* copy code to RAM and jump to it - this should not return */ + /* NOTE - code has to be copied out of NAND buffer before + * other blocks can be read. + */ + relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, + CONFIG_SYS_NAND_U_BOOT_RELOC); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + nand_boot(); +} + +void putc(char c) +{ + if (c == '\n') + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); + + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); +} + +void puts(const char *str) +{ + while (*str) + putc(*str++); +} diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8569mds/Makefile b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8569mds/Makefile new file mode 100644 index 000000000..9f338024e --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8569mds/Makefile @@ -0,0 +1,91 @@ +# +# (C) Copyright 2007 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# +# Copyright 2009-2011 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +CONFIG_SYS_TEXT_BASE_SPL := 0xfff00000 +PAD_TO := 0xfff01000 + +nandobj := $(objtree)/nand_spl/ + +LDSCRIPT= $(srctree)/$(CPUDIR)/u-boot-nand_spl.lds +LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \ + $(LDFLAGS) $(LDFLAGS_FINAL) +asflags-y += -DCONFIG_NAND_SPL +ccflags-y += -DCONFIG_NAND_SPL + +SOBJS = start.o resetvec.o +COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \ + nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o + +OBJS := $(addprefix $(obj)/,$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(nandobj)board/$(BOARDDIR) + +targets += $(__OBJS) + +all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \ + -Map $(nandobj)u-boot-spl.map -o $@ + +$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) + $(CPP) $(cpp_flags) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \ + -ansi -D__ASSEMBLY__ -P - <$< >$@ + +# create symbolic links for common files + +$(obj)/cache.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/lib/cache.c $@ + +$(obj)/cpu_init_early.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $@ + +$(obj)/spl_minimal.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $@ + +$(obj)/fsl_law.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc8xxx/law.c $@ + +$(obj)/law.c: + @rm -f $@ + ln -sf $(srctree)/board/$(BOARDDIR)/law.c $@ + +$(obj)/nand_boot_fsl_elbc.c: + @rm -f $@ + ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@ + +$(obj)/ns16550.c: + @rm -f $@ + ln -sf $(srctree)/drivers/serial/ns16550.c $@ + +$(obj)/resetvec.S: + @rm -f $@ + ln -s $(srctree)/$(CPUDIR)/resetvec.S $@ + +$(obj)/start.S: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/start.S $@ + +$(obj)/tlb.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/tlb.c $@ + +$(obj)/tlb_table.c: + @rm -f $@ + ln -sf $(srctree)/board/$(BOARDDIR)/tlb.c $@ diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8569mds/nand_boot.c b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8569mds/nand_boot.c new file mode 100644 index 000000000..ce7f6191c --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8569mds/nand_boot.c @@ -0,0 +1,60 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <mpc85xx.h> +#include <asm/io.h> +#include <ns16550.h> +#include <nand.h> +#include <asm/mmu.h> +#include <asm/immap_85xx.h> +#include <fsl_ddr_sdram.h> +#include <asm/fsl_law.h> + +#define SYSCLK_66 66666666 + +DECLARE_GLOBAL_DATA_PTR; + +void board_init_f(ulong bootflag) +{ + uint plat_ratio, bus_clk, sys_clk; + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + + sys_clk = SYSCLK_66; + + plat_ratio = gur->porpllsr & 0x0000003e; + plat_ratio >>= 1; + bus_clk = plat_ratio * sys_clk; + NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, + bus_clk / 16 / CONFIG_BAUDRATE); + + puts("\nNAND boot... "); + + /* copy code to DDR and jump to it - this should not return */ + /* NOTE - code has to be copied out of NAND buffer before + * other blocks can be read. + */ + relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, + CONFIG_SYS_NAND_U_BOOT_RELOC); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + nand_boot(); +} + +void putc(char c) +{ + if (c == '\n') + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); + + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); +} + +void puts(const char *str) +{ + while (*str) + putc(*str++); +} diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8572ds/Makefile b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8572ds/Makefile new file mode 100644 index 000000000..9f338024e --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8572ds/Makefile @@ -0,0 +1,91 @@ +# +# (C) Copyright 2007 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# +# Copyright 2009-2011 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +CONFIG_SYS_TEXT_BASE_SPL := 0xfff00000 +PAD_TO := 0xfff01000 + +nandobj := $(objtree)/nand_spl/ + +LDSCRIPT= $(srctree)/$(CPUDIR)/u-boot-nand_spl.lds +LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \ + $(LDFLAGS) $(LDFLAGS_FINAL) +asflags-y += -DCONFIG_NAND_SPL +ccflags-y += -DCONFIG_NAND_SPL + +SOBJS = start.o resetvec.o +COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \ + nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o + +OBJS := $(addprefix $(obj)/,$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(nandobj)board/$(BOARDDIR) + +targets += $(__OBJS) + +all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \ + -Map $(nandobj)u-boot-spl.map -o $@ + +$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) + $(CPP) $(cpp_flags) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \ + -ansi -D__ASSEMBLY__ -P - <$< >$@ + +# create symbolic links for common files + +$(obj)/cache.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/lib/cache.c $@ + +$(obj)/cpu_init_early.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $@ + +$(obj)/spl_minimal.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $@ + +$(obj)/fsl_law.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc8xxx/law.c $@ + +$(obj)/law.c: + @rm -f $@ + ln -sf $(srctree)/board/$(BOARDDIR)/law.c $@ + +$(obj)/nand_boot_fsl_elbc.c: + @rm -f $@ + ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@ + +$(obj)/ns16550.c: + @rm -f $@ + ln -sf $(srctree)/drivers/serial/ns16550.c $@ + +$(obj)/resetvec.S: + @rm -f $@ + ln -s $(srctree)/$(CPUDIR)/resetvec.S $@ + +$(obj)/start.S: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/start.S $@ + +$(obj)/tlb.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/tlb.c $@ + +$(obj)/tlb_table.c: + @rm -f $@ + ln -sf $(srctree)/board/$(BOARDDIR)/tlb.c $@ diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8572ds/nand_boot.c b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8572ds/nand_boot.c new file mode 100644 index 000000000..3bc092734 --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8572ds/nand_boot.c @@ -0,0 +1,67 @@ +/* + * Copyright 2009-2010 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <ns16550.h> +#include <asm/io.h> +#include <nand.h> + +u32 sysclk_tbl[] = { + 33333000, 39999600, 49999500, 66666000, + 83332500, 99999000, 133332000, 166665000 +}; + +void board_init_f(ulong bootflag) +{ + int px_spd; + u32 plat_ratio, bus_clk, sys_clk; + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + +#if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM) + /* for FPGA */ + set_lbc_br(3, CONFIG_SYS_BR3_PRELIM); + set_lbc_or(3, CONFIG_SYS_OR3_PRELIM); +#else +#error CONFIG_SYS_BR3_PRELIM, CONFIG_SYS_OR3_PRELIM must be defined +#endif + + /* initialize selected port with appropriate baud rate */ + px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); + sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK_MASK]; + plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; + bus_clk = sys_clk * plat_ratio / 2; + + NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, + bus_clk / 16 / CONFIG_BAUDRATE); + + puts("\nNAND boot... "); + + /* copy code to RAM and jump to it - this should not return */ + /* NOTE - code has to be copied out of NAND buffer before + * other blocks can be read. + */ + relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, + CONFIG_SYS_NAND_U_BOOT_RELOC); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + nand_boot(); +} + +void putc(char c) +{ + if (c == '\n') + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); + + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); +} + +void puts(const char *str) +{ + while (*str) + putc(*str++); +} diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/p1023rds/Makefile b/qemu/roms/u-boot/nand_spl/board/freescale/p1023rds/Makefile new file mode 100644 index 000000000..fba9f9350 --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/freescale/p1023rds/Makefile @@ -0,0 +1,87 @@ +# +# Copyright 2010-2011 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +PAD_TO := 0xfff01000 + +nandobj := $(objtree)/nand_spl/ + +LDSCRIPT= $(srctree)/$(CPUDIR)/u-boot-nand_spl.lds +LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \ + $(LDFLAGS) $(LDFLAGS_FINAL) +asflags-y += -DCONFIG_NAND_SPL +ccflags-y += -DCONFIG_NAND_SPL + +SOBJS = start.o resetvec.o +COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \ + nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o + +OBJS := $(addprefix $(obj)/,$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(nandobj)board/$(BOARDDIR) + +targets += $(__OBJS) + +all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \ + -Map $(nandobj)u-boot-spl.map -o $@ + +$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) + $(CPP) $(cpp_flags) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \ + -ansi -D__ASSEMBLY__ -P - <$< >$@ + +# create symbolic links for common files + +$(obj)/cache.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/lib/cache.c $@ + +$(obj)/cpu_init_early.c: + @rm -f $@ + ln -sf $(srctree)/$(CPUDIR)/cpu_init_early.c $@ + +$(obj)/spl_minimal.c: + @rm -f $@ + ln -sf $(srctree)/$(CPUDIR)/spl_minimal.c $@ + +$(obj)/fsl_law.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc8xxx/law.c $@ + +$(obj)/law.c: + @rm -f $@ + ln -sf $(srctree)/board/$(BOARDDIR)/law.c $@ + +$(obj)/nand_boot_fsl_elbc.c: + @rm -f $@ + ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@ + +$(obj)/ns16550.c: + @rm -f $@ + ln -sf $(srctree)/drivers/serial/ns16550.c $@ + +$(obj)/resetvec.S: + @rm -f $@ + ln -s $(srctree)/$(CPUDIR)/resetvec.S $@ + +$(obj)/start.S: + @rm -f $@ + ln -sf $(srctree)/$(CPUDIR)/start.S $@ + +$(obj)/tlb.c: + @rm -f $@ + ln -sf $(srctree)/$(CPUDIR)/tlb.c $@ + +$(obj)/tlb_table.c: + @rm -f $@ + ln -sf $(srctree)/board/$(BOARDDIR)/tlb.c $@ diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/p1023rds/nand_boot.c b/qemu/roms/u-boot/nand_spl/board/freescale/p1023rds/nand_boot.c new file mode 100644 index 000000000..d9afa6d02 --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/freescale/p1023rds/nand_boot.c @@ -0,0 +1,96 @@ +/* + * Copyright 2010-2011 Freescale Semiconductor, Inc. + * Author: Roy Zang <tie-fei.zang@freescale.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <ns16550.h> +#include <asm/io.h> +#include <nand.h> +#include <asm/fsl_law.h> +#include <fsl_ddr_sdram.h> +#include <asm/global_data.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* Fixed sdram init -- doesn't use serial presence detect. */ +void sdram_init(void) +{ + struct ccsr_ddr __iomem *ddr = + (struct ccsr_ddr __iomem *)CONFIG_SYS_FSL_DDR_ADDR; + + set_next_law(0, LAW_SIZE_2G, LAW_TRGT_IF_DDR_1); + + __raw_writel(CONFIG_SYS_DDR_CS0_BNDS, &ddr->cs0_bnds); + __raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, &ddr->cs0_config); + __raw_writel(CONFIG_SYS_DDR_CS1_BNDS, &ddr->cs1_bnds); + __raw_writel(CONFIG_SYS_DDR_CS1_CONFIG, &ddr->cs1_config); + __raw_writel(CONFIG_SYS_DDR_TIMING_3, &ddr->timing_cfg_3); + __raw_writel(CONFIG_SYS_DDR_TIMING_0, &ddr->timing_cfg_0); + __raw_writel(CONFIG_SYS_DDR_TIMING_1, &ddr->timing_cfg_1); + __raw_writel(CONFIG_SYS_DDR_TIMING_2, &ddr->timing_cfg_2); + __raw_writel(CONFIG_SYS_DDR_CONTROL2, &ddr->sdram_cfg_2); + __raw_writel(CONFIG_SYS_DDR_MODE_1, &ddr->sdram_mode); + __raw_writel(CONFIG_SYS_DDR_MODE_2, &ddr->sdram_mode_2); + __raw_writel(CONFIG_SYS_DDR_INTERVAL, &ddr->sdram_interval); + __raw_writel(CONFIG_SYS_DDR_DATA_INIT, &ddr->sdram_data_init); + __raw_writel(CONFIG_SYS_DDR_CLK_CTRL, &ddr->sdram_clk_cntl); + __raw_writel(CONFIG_SYS_DDR_TIMING_4, &ddr->timing_cfg_4); + __raw_writel(CONFIG_SYS_DDR_TIMING_5, &ddr->timing_cfg_5); + __raw_writel(CONFIG_SYS_DDR_ZQ_CNTL, &ddr->ddr_zq_cntl); + __raw_writel(CONFIG_SYS_DDR_WRLVL_CNTL, &ddr->ddr_wrlvl_cntl); + __raw_writel(CONFIG_SYS_DDR_CDR_1, &ddr->ddr_cdr1); + __raw_writel(CONFIG_SYS_DDR_CDR_2, &ddr->ddr_cdr2); + /* Set, but do not enable the memory */ + __raw_writel(CONFIG_SYS_DDR_CONTROL & ~SDRAM_CFG_MEM_EN, &ddr->sdram_cfg); + + asm volatile("sync;isync"); + udelay(500); + + /* Let the controller go */ + out_be32(&ddr->sdram_cfg, in_be32(&ddr->sdram_cfg) | SDRAM_CFG_MEM_EN); +} + +void board_init_f(ulong bootflag) +{ + u32 plat_ratio; + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + + /* initialize selected port with appropriate baud rate */ + plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; + plat_ratio >>= 1; + gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; + NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, + gd->bus_clk / 16 / CONFIG_BAUDRATE); + + puts("\nNAND boot... "); + /* Initialize the DDR3 */ + sdram_init(); + /* copy code to RAM and jump to it - this should not return */ + /* NOTE - code has to be copied out of NAND buffer before + * other blocks can be read. + */ + relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, + CONFIG_SYS_NAND_U_BOOT_RELOC); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + nand_boot(); +} + +void putc(char c) +{ + if (c == '\n') + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); + + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); +} + +void puts(const char *str) +{ + while (*str) + putc(*str++); +} diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/p1_p2_rdb/Makefile b/qemu/roms/u-boot/nand_spl/board/freescale/p1_p2_rdb/Makefile new file mode 100644 index 000000000..9f338024e --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/freescale/p1_p2_rdb/Makefile @@ -0,0 +1,91 @@ +# +# (C) Copyright 2007 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# +# Copyright 2009-2011 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +CONFIG_SYS_TEXT_BASE_SPL := 0xfff00000 +PAD_TO := 0xfff01000 + +nandobj := $(objtree)/nand_spl/ + +LDSCRIPT= $(srctree)/$(CPUDIR)/u-boot-nand_spl.lds +LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \ + $(LDFLAGS) $(LDFLAGS_FINAL) +asflags-y += -DCONFIG_NAND_SPL +ccflags-y += -DCONFIG_NAND_SPL + +SOBJS = start.o resetvec.o +COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \ + nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o + +OBJS := $(addprefix $(obj)/,$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(nandobj)board/$(BOARDDIR) + +targets += $(__OBJS) + +all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot-nand_spl.lds + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \ + -Map $(nandobj)u-boot-spl.map -o $@ + +$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT) + $(CPP) $(cpp_flags) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \ + -ansi -D__ASSEMBLY__ -P - <$< >$@ + +# create symbolic links for common files + +$(obj)/cache.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/lib/cache.c $@ + +$(obj)/cpu_init_early.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $@ + +$(obj)/spl_minimal.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $@ + +$(obj)/fsl_law.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc8xxx/law.c $@ + +$(obj)/law.c: + @rm -f $@ + ln -sf $(srctree)/board/$(BOARDDIR)/law.c $@ + +$(obj)/nand_boot_fsl_elbc.c: + @rm -f $@ + ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@ + +$(obj)/ns16550.c: + @rm -f $@ + ln -sf $(srctree)/drivers/serial/ns16550.c $@ + +$(obj)/resetvec.S: + @rm -f $@ + ln -s $(srctree)/$(CPUDIR)/resetvec.S $@ + +$(obj)/start.S: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/start.S $@ + +$(obj)/tlb.c: + @rm -f $@ + ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/tlb.c $@ + +$(obj)/tlb_table.c: + @rm -f $@ + ln -sf $(srctree)/board/$(BOARDDIR)/tlb.c $@ diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c b/qemu/roms/u-boot/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c new file mode 100644 index 000000000..f7e843843 --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c @@ -0,0 +1,82 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <mpc85xx.h> +#include <asm/io.h> +#include <ns16550.h> +#include <nand.h> +#include <asm/mmu.h> +#include <asm/immap_85xx.h> +#include <fsl_ddr_sdram.h> +#include <asm/fsl_law.h> + +#define SYSCLK_MASK 0x00200000 +#define BOARDREV_MASK 0x10100000 +#define BOARDREV_B 0x10100000 +#define BOARDREV_C 0x00100000 + +#define SYSCLK_66 66666666 +#define SYSCLK_50 50000000 +#define SYSCLK_100 100000000 + +DECLARE_GLOBAL_DATA_PTR; + +void board_init_f(ulong bootflag) +{ + uint plat_ratio, bus_clk, sys_clk = 0; + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); + uint val, temp, sysclk_mask; + + val = pgpio->gpdat; + sysclk_mask = val & SYSCLK_MASK; + temp = val & BOARDREV_MASK; + if (temp == BOARDREV_C) { + if(sysclk_mask == 0) + sys_clk = SYSCLK_66; + else + sys_clk = SYSCLK_100; + } else if (temp == BOARDREV_B) { + if(sysclk_mask == 0) + sys_clk = SYSCLK_66; + else + sys_clk = SYSCLK_50; + } + + plat_ratio = gur->porpllsr & 0x0000003e; + plat_ratio >>= 1; + bus_clk = plat_ratio * sys_clk; + NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, + bus_clk / 16 / CONFIG_BAUDRATE); + + puts("\nNAND boot... "); + + /* copy code to DDR and jump to it - this should not return */ + /* NOTE - code has to be copied out of NAND buffer before + * other blocks can be read. + */ + relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, + CONFIG_SYS_NAND_U_BOOT_RELOC); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + nand_boot(); +} + +void putc(char c) +{ + if (c == '\n') + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); + + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); +} + +void puts(const char *str) +{ + while (*str) + putc(*str++); +} diff --git a/qemu/roms/u-boot/nand_spl/board/sheldon/simpc8313/Makefile b/qemu/roms/u-boot/nand_spl/board/sheldon/simpc8313/Makefile new file mode 100644 index 000000000..657f65fd2 --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/sheldon/simpc8313/Makefile @@ -0,0 +1,81 @@ +# +# (C) Copyright 2007 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# (C) Copyright 2008 Freescale Semiconductor +# (C) Copyright Sheldon Instruments, Inc. 2008 +# +# SPDX-License-Identifier: GPL-2.0+ +# + +include $(srctree)/$(src)/config.mk + +nandobj := $(objtree)/nand_spl/ + +LDSCRIPT= $(srctree)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \ + $(LDFLAGS) $(LDFLAGS_FINAL) +asflags-y += -DCONFIG_NAND_SPL +ccflags-y += -DCONFIG_NAND_SPL + +SOBJS = start.o ticks.o +COBJS = nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o spl_minimal.o \ + time.o cache.o + +OBJS := $(addprefix $(obj)/,$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(nandobj)board/$(BOARDDIR) + +targets += $(__OBJS) + +all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \ + -Map $(nandobj)u-boot-spl.map -o $@ + +$(nandobj)u-boot.lds: $(LDSCRIPT) + $(CPP) $(cpp_flags) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@ + +# create symbolic links for common files + +$(obj)/start.S: + @rm -f $@ + ln -s $(srctree)/arch/powerpc/cpu/mpc83xx/start.S $@ + +$(obj)/nand_boot_fsl_elbc.c: + @rm -f $@ + ln -s $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@ + +$(obj)/sdram.c: + @rm -f $@ + ln -s $(srctree)/board/$(BOARDDIR)/sdram.c $@ + +$(obj)/$(BOARD).c: + @rm -f $@ + ln -s $(srctree)/board/$(BOARDDIR)/$(BOARD).c $@ + +$(obj)/ns16550.c: + @rm -f $@ + ln -s $(srctree)/drivers/serial/ns16550.c $@ + +$(obj)/spl_minimal.c: + @rm -f $@ + ln -s $(srctree)/arch/powerpc/cpu/mpc83xx/spl_minimal.c $@ + +$(obj)/cache.c: + @rm -f $@ + ln -s $(srctree)/arch/powerpc/lib/cache.c $@ + +$(obj)/time.c: + @rm -f $@ + ln -s $(srctree)/arch/powerpc/lib/time.c $@ + +$(obj)/ticks.S: + @rm -f $@ + ln -s $(srctree)/arch/powerpc/lib/ticks.S $@ diff --git a/qemu/roms/u-boot/nand_spl/board/sheldon/simpc8313/config.mk b/qemu/roms/u-boot/nand_spl/board/sheldon/simpc8313/config.mk new file mode 100644 index 000000000..d1b4e2eeb --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/sheldon/simpc8313/config.mk @@ -0,0 +1,5 @@ +ifdef CONFIG_NAND_LP +PAD_TO = 0xFFF20000 +else +PAD_TO = 0xFFF04000 +endif diff --git a/qemu/roms/u-boot/nand_spl/board/sheldon/simpc8313/u-boot.lds b/qemu/roms/u-boot/nand_spl/board/sheldon/simpc8313/u-boot.lds new file mode 100644 index 000000000..4e4d511f9 --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/board/sheldon/simpc8313/u-boot.lds @@ -0,0 +1,38 @@ +/* + * (C) Copyright 2006 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * Copyright 2008 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OUTPUT_ARCH(powerpc) +SECTIONS +{ + . = 0xfff00000; + .text : { + *(.text*) + . = ALIGN(16); + *(.eh_frame) + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + + . = ALIGN(8); + .data : { + *(.data*) + *(.sdata*) + _GOT2_TABLE_ = .; + *(.got2) + KEEP(*(.got)) + PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); + } + __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; + + . = ALIGN(8); + __bss_start = .; + .bss (NOLOAD) : { *(.*bss) } + __bss_end = .; +} +ENTRY(_start) +ASSERT(__bss_end <= 0xfff01000, "NAND bootstrap too big"); diff --git a/qemu/roms/u-boot/nand_spl/nand_boot.c b/qemu/roms/u-boot/nand_spl/nand_boot.c new file mode 100644 index 000000000..125e7f371 --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/nand_boot.c @@ -0,0 +1,285 @@ +/* + * (C) Copyright 2006-2008 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <nand.h> +#include <asm/io.h> + +static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS; + +#define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ + CONFIG_SYS_NAND_ECCSIZE) +#define ECCTOTAL (ECCSTEPS * CONFIG_SYS_NAND_ECCBYTES) + + +#if (CONFIG_SYS_NAND_PAGE_SIZE <= 512) +/* + * NAND command for small page NAND devices (512) + */ +static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd) +{ + struct nand_chip *this = mtd->priv; + int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT; + + while (!this->dev_ready(mtd)) + ; + + /* Begin command latch cycle */ + this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); + /* Set ALE and clear CLE to start address cycle */ + /* Column address */ + this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE); + this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */ + this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff, + NAND_CTRL_ALE); /* A[24:17] */ +#ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE + /* One more address cycle for devices > 32MiB */ + this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, + NAND_CTRL_ALE); /* A[28:25] */ +#endif + /* Latch in address */ + this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + + /* + * Wait a while for the data to be ready + */ + while (!this->dev_ready(mtd)) + ; + + return 0; +} +#else +/* + * NAND command for large page NAND devices (2k) + */ +static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd) +{ + struct nand_chip *this = mtd->priv; + int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT; + void (*hwctrl)(struct mtd_info *mtd, int cmd, + unsigned int ctrl) = this->cmd_ctrl; + + while (!this->dev_ready(mtd)) + ; + + /* Emulate NAND_CMD_READOOB */ + if (cmd == NAND_CMD_READOOB) { + offs += CONFIG_SYS_NAND_PAGE_SIZE; + cmd = NAND_CMD_READ0; + } + + /* Shift the offset from byte addressing to word addressing. */ + if (this->options & NAND_BUSWIDTH_16) + offs >>= 1; + + /* Begin command latch cycle */ + hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); + /* Set ALE and clear CLE to start address cycle */ + /* Column address */ + hwctrl(mtd, offs & 0xff, + NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */ + hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */ + /* Row address */ + hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */ + hwctrl(mtd, ((page_addr >> 8) & 0xff), + NAND_CTRL_ALE); /* A[27:20] */ +#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE + /* One more address cycle for devices > 128MiB */ + hwctrl(mtd, (page_addr >> 16) & 0x0f, + NAND_CTRL_ALE); /* A[31:28] */ +#endif + /* Latch in address */ + hwctrl(mtd, NAND_CMD_READSTART, + NAND_CTRL_CLE | NAND_CTRL_CHANGE); + hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + + /* + * Wait a while for the data to be ready + */ + while (!this->dev_ready(mtd)) + ; + + return 0; +} +#endif + +static int nand_is_bad_block(struct mtd_info *mtd, int block) +{ + struct nand_chip *this = mtd->priv; + + nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB); + + /* + * Read one byte (or two if it's a 16 bit chip). + */ + if (this->options & NAND_BUSWIDTH_16) { + if (readw(this->IO_ADDR_R) != 0xffff) + return 1; + } else { + if (readb(this->IO_ADDR_R) != 0xff) + return 1; + } + + return 0; +} + +#if defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST) +static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst) +{ + struct nand_chip *this = mtd->priv; + u_char ecc_calc[ECCTOTAL]; + u_char ecc_code[ECCTOTAL]; + u_char oob_data[CONFIG_SYS_NAND_OOBSIZE]; + int i; + int eccsize = CONFIG_SYS_NAND_ECCSIZE; + int eccbytes = CONFIG_SYS_NAND_ECCBYTES; + int eccsteps = ECCSTEPS; + uint8_t *p = dst; + + nand_command(mtd, block, page, 0, NAND_CMD_READOOB); + this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE); + nand_command(mtd, block, page, 0, NAND_CMD_READ0); + + /* Pick the ECC bytes out of the oob data */ + for (i = 0; i < ECCTOTAL; i++) + ecc_code[i] = oob_data[nand_ecc_pos[i]]; + + + for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { + this->ecc.hwctl(mtd, NAND_ECC_READ); + this->read_buf(mtd, p, eccsize); + this->ecc.calculate(mtd, p, &ecc_calc[i]); + this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); + } + + return 0; +} +#else +static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst) +{ + struct nand_chip *this = mtd->priv; + u_char ecc_calc[ECCTOTAL]; + u_char ecc_code[ECCTOTAL]; + u_char oob_data[CONFIG_SYS_NAND_OOBSIZE]; + int i; + int eccsize = CONFIG_SYS_NAND_ECCSIZE; + int eccbytes = CONFIG_SYS_NAND_ECCBYTES; + int eccsteps = ECCSTEPS; + uint8_t *p = dst; + + nand_command(mtd, block, page, 0, NAND_CMD_READ0); + + for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { + this->ecc.hwctl(mtd, NAND_ECC_READ); + this->read_buf(mtd, p, eccsize); + this->ecc.calculate(mtd, p, &ecc_calc[i]); + } + this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE); + + /* Pick the ECC bytes out of the oob data */ + for (i = 0; i < ECCTOTAL; i++) + ecc_code[i] = oob_data[nand_ecc_pos[i]]; + + eccsteps = ECCSTEPS; + p = dst; + + for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { + /* No chance to do something with the possible error message + * from correct_data(). We just hope that all possible errors + * are corrected by this routine. + */ + this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); + } + + return 0; +} +#endif /* #if defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST) */ + +static int nand_load(struct mtd_info *mtd, unsigned int offs, + unsigned int uboot_size, uchar *dst) +{ + unsigned int block, lastblock; + unsigned int page; + + /* + * offs has to be aligned to a page address! + */ + block = offs / CONFIG_SYS_NAND_BLOCK_SIZE; + lastblock = (offs + uboot_size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE; + page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE; + + while (block <= lastblock) { + if (!nand_is_bad_block(mtd, block)) { + /* + * Skip bad blocks + */ + while (page < CONFIG_SYS_NAND_PAGE_COUNT) { + nand_read_page(mtd, block, page, dst); + dst += CONFIG_SYS_NAND_PAGE_SIZE; + page++; + } + + page = 0; + } else { + lastblock++; + } + + block++; + } + + return 0; +} + +/* + * The main entry for NAND booting. It's necessary that SDRAM is already + * configured and available since this code loads the main U-Boot image + * from NAND into SDRAM and starts it from there. + */ +void nand_boot(void) +{ + struct nand_chip nand_chip; + nand_info_t nand_info; + __attribute__((noreturn)) void (*uboot)(void); + + /* + * Init board specific nand support + */ + nand_chip.select_chip = NULL; + nand_info.priv = &nand_chip; + nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE; + nand_chip.dev_ready = NULL; /* preset to NULL */ + nand_chip.options = 0; + board_nand_init(&nand_chip); + + if (nand_chip.select_chip) + nand_chip.select_chip(&nand_info, 0); + + /* + * Load U-Boot image from NAND into RAM + */ + nand_load(&nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE, + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST); + +#ifdef CONFIG_NAND_ENV_DST + nand_load(&nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, + (uchar *)CONFIG_NAND_ENV_DST); + +#ifdef CONFIG_ENV_OFFSET_REDUND + nand_load(&nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE, + (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE); +#endif +#endif + + if (nand_chip.select_chip) + nand_chip.select_chip(&nand_info, -1); + + /* + * Jump to U-Boot image + */ + uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; + (*uboot)(); +} diff --git a/qemu/roms/u-boot/nand_spl/nand_boot_fsl_elbc.c b/qemu/roms/u-boot/nand_spl/nand_boot_fsl_elbc.c new file mode 100644 index 000000000..1afa1a27a --- /dev/null +++ b/qemu/roms/u-boot/nand_spl/nand_boot_fsl_elbc.c @@ -0,0 +1,142 @@ +/* + * NAND boot for Freescale Enhanced Local Bus Controller, Flash Control Machine + * + * (C) Copyright 2006-2008 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * Copyright (c) 2008 Freescale Semiconductor, Inc. + * Author: Scott Wood <scottwood@freescale.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/fsl_lbc.h> +#include <linux/mtd/nand.h> + +#define WINDOW_SIZE 8192 + +static void nand_wait(void) +{ + fsl_lbc_t *regs = LBC_BASE_ADDR; + + for (;;) { + uint32_t status = in_be32(®s->ltesr); + + if (status == 1) + return; + + if (status & 1) { + puts("read failed (ltesr)\n"); + for (;;); + } + } +} + +static void nand_load(unsigned int offs, int uboot_size, uchar *dst) +{ + fsl_lbc_t *regs = LBC_BASE_ADDR; + uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE; + const int large = CONFIG_SYS_NAND_OR_PRELIM & OR_FCM_PGS; + const int block_shift = large ? 17 : 14; + const int block_size = 1 << block_shift; + const int page_size = large ? 2048 : 512; + const int bad_marker = large ? page_size + 0 : page_size + 5; + int fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT) | 2; + int pos = 0; + + if (offs & (block_size - 1)) { + puts("bad offset\n"); + for (;;); + } + + if (large) { + fmr |= FMR_ECCM; + __raw_writel((NAND_CMD_READ0 << FCR_CMD0_SHIFT) | + (NAND_CMD_READSTART << FCR_CMD1_SHIFT), + ®s->fcr); + __raw_writel( + (FIR_OP_CW0 << FIR_OP0_SHIFT) | + (FIR_OP_CA << FIR_OP1_SHIFT) | + (FIR_OP_PA << FIR_OP2_SHIFT) | + (FIR_OP_CW1 << FIR_OP3_SHIFT) | + (FIR_OP_RBW << FIR_OP4_SHIFT), + ®s->fir); + } else { + __raw_writel(NAND_CMD_READ0 << FCR_CMD0_SHIFT, ®s->fcr); + __raw_writel( + (FIR_OP_CW0 << FIR_OP0_SHIFT) | + (FIR_OP_CA << FIR_OP1_SHIFT) | + (FIR_OP_PA << FIR_OP2_SHIFT) | + (FIR_OP_RBW << FIR_OP3_SHIFT), + ®s->fir); + } + + __raw_writel(0, ®s->fbcr); + + while (pos < uboot_size) { + int i = 0; + __raw_writel(offs >> block_shift, ®s->fbar); + + do { + int j; + unsigned int page_offs = (offs & (block_size - 1)) << 1; + + __raw_writel(~0, ®s->ltesr); + __raw_writel(0, ®s->lteatr); + __raw_writel(page_offs, ®s->fpar); + __raw_writel(fmr, ®s->fmr); + sync(); + __raw_writel(0, ®s->lsor); + nand_wait(); + + page_offs %= WINDOW_SIZE; + + /* + * If either of the first two pages are marked bad, + * continue to the next block. + */ + if (i++ < 2 && buf[page_offs + bad_marker] != 0xff) { + puts("skipping\n"); + offs = (offs + block_size) & ~(block_size - 1); + pos &= ~(block_size - 1); + break; + } + + for (j = 0; j < page_size; j++) + dst[pos + j] = buf[page_offs + j]; + + pos += page_size; + offs += page_size; + } while ((offs & (block_size - 1)) && (pos < uboot_size)); + } +} + +/* + * The main entry for NAND booting. It's necessary that SDRAM is already + * configured and available since this code loads the main U-Boot image + * from NAND into SDRAM and starts it from there. + */ +void nand_boot(void) +{ + __attribute__((noreturn)) void (*uboot)(void); + + /* + * Load U-Boot image from NAND into RAM + */ + nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE, + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST); + + /* + * Jump to U-Boot image + */ + puts("transfering control\n"); + /* + * Clean d-cache and invalidate i-cache, to + * make sure that no stale data is executed. + */ + flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE); + uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; + uboot(); +} |