Add qemu 2.4.0

Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>

12 files changed, 933 insertions, 0 deletions

diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8315erdb/Makefile b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8315erdb/Makefile
new file mode 100644
index 000000000..f4e7854d5
--- /dev/null
+++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8315erdb/Makefile
@@ -0,0 +1,71 @@
+#
+# (C) Copyright 2007
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
+# (C) Copyright 2008 Freescale Semiconductor
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+PAD_TO := 0xfff04000
+
+nandobj	:= $(objtree)/nand_spl/
+
+LDSCRIPT= $(srctree)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \
+	   $(LDFLAGS) $(LDFLAGS_FINAL)
+asflags-y += -DCONFIG_NAND_SPL
+ccflags-y += -DCONFIG_NAND_SPL
+
+SOBJS	= start.o ticks.o
+COBJS	= nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o spl_minimal.o \
+	  time.o cache.o
+
+OBJS	:= $(addprefix $(obj)/,$(SOBJS) $(COBJS))
+__OBJS	:= $(SOBJS) $(COBJS)
+LNDIR	:= $(nandobj)board/$(BOARDDIR)
+
+targets += $(__OBJS)
+
+all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+	$(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
+	$(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
+
+$(nandobj)u-boot-spl:	$(OBJS) $(nandobj)u-boot.lds
+	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
+		-Map $(nandobj)u-boot-spl.map -o $@
+
+$(nandobj)u-boot.lds: $(LDSCRIPT)
+	$(CPP) $(cpp_flags) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
+
+# create symbolic links for common files
+
+$(obj)/start.S:
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc83xx/start.S $@
+
+$(obj)/nand_boot_fsl_elbc.c:
+	ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@
+
+$(obj)/sdram.c:
+	ln -sf $(srctree)/board/$(BOARDDIR)/sdram.c $@
+
+$(obj)/$(BOARD).c:
+	ln -sf $(srctree)/board/$(BOARDDIR)/$(BOARD).c $@
+
+$(obj)/ns16550.c:
+	ln -sf $(srctree)/drivers/serial/ns16550.c $@
+
+$(obj)/spl_minimal.c:
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc83xx/spl_minimal.c $@
+
+$(obj)/cache.c:
+	ln -sf $(srctree)/arch/powerpc/lib/cache.c $@
+
+$(obj)/time.c:
+	ln -sf $(srctree)/arch/powerpc/lib/time.c $@
+
+$(obj)/ticks.S:
+	ln -sf $(srctree)/arch/powerpc/lib/ticks.S $@
diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8315erdb/u-boot.lds b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8315erdb/u-boot.lds
new file mode 100644
index 000000000..774772bea
--- /dev/null
+++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8315erdb/u-boot.lds
@@ -0,0 +1,39 @@
+/*
+ * (C) Copyright 2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright 2008 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+OUTPUT_ARCH(powerpc)
+SECTIONS
+{
+	. = 0xfff00000;
+	.text : {
+		*(.text*)
+		. = ALIGN(16);
+		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+	}
+
+	. = ALIGN(8);
+	.data : {
+		*(.data*)
+		*(.sdata*)
+		_GOT2_TABLE_ = .;
+		KEEP(*(.got2))
+		KEEP(*(.got))
+		PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
+	}
+	__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
+
+	. = ALIGN(8);
+	__bss_start = .;
+	.bss (NOLOAD) : {
+		*(.*bss)
+	}
+	__bss_end = .;
+}
+ENTRY(_start)
+ASSERT(__bss_end <= 0xfff01000, "NAND bootstrap too big");
diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/Makefile b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/Makefile
new file mode 100644
index 000000000..9f338024e
--- /dev/null
+++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/Makefile
@@ -0,0 +1,91 @@
+#
+# (C) Copyright 2007
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
+#
+# Copyright 2009-2011 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+CONFIG_SYS_TEXT_BASE_SPL := 0xfff00000
+PAD_TO := 0xfff01000
+
+nandobj	:= $(objtree)/nand_spl/
+
+LDSCRIPT= $(srctree)/$(CPUDIR)/u-boot-nand_spl.lds
+LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \
+		$(LDFLAGS) $(LDFLAGS_FINAL)
+asflags-y += -DCONFIG_NAND_SPL
+ccflags-y += -DCONFIG_NAND_SPL
+
+SOBJS	= start.o resetvec.o
+COBJS	= cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
+	  nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
+
+OBJS	:= $(addprefix $(obj)/,$(SOBJS) $(COBJS))
+__OBJS	:= $(SOBJS) $(COBJS)
+LNDIR	:= $(nandobj)board/$(BOARDDIR)
+
+targets += $(__OBJS)
+
+all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+	$(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
+	$(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
+
+$(nandobj)u-boot-spl:	$(OBJS) $(nandobj)u-boot-nand_spl.lds
+	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
+		-Map $(nandobj)u-boot-spl.map -o $@
+
+$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT)
+	$(CPP) $(cpp_flags) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \
+		-ansi -D__ASSEMBLY__ -P - <$< >$@
+
+# create symbolic links for common files
+
+$(obj)/cache.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/lib/cache.c $@
+
+$(obj)/cpu_init_early.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $@
+
+$(obj)/spl_minimal.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $@
+
+$(obj)/fsl_law.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc8xxx/law.c $@
+
+$(obj)/law.c:
+	@rm -f $@
+	ln -sf $(srctree)/board/$(BOARDDIR)/law.c $@
+
+$(obj)/nand_boot_fsl_elbc.c:
+	@rm -f $@
+	ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@
+
+$(obj)/ns16550.c:
+	@rm -f $@
+	ln -sf $(srctree)/drivers/serial/ns16550.c $@
+
+$(obj)/resetvec.S:
+	@rm -f $@
+	ln -s $(srctree)/$(CPUDIR)/resetvec.S $@
+
+$(obj)/start.S:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/start.S $@
+
+$(obj)/tlb.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/tlb.c $@
+
+$(obj)/tlb_table.c:
+	@rm -f $@
+	ln -sf $(srctree)/board/$(BOARDDIR)/tlb.c $@
diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/nand_boot.c b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/nand_boot.c
new file mode 100644
index 000000000..71178e4b9
--- /dev/null
+++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8536ds/nand_boot.c
@@ -0,0 +1,67 @@
+/*
+ * Copyright 2009 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <ns16550.h>
+#include <asm/io.h>
+#include <nand.h>
+
+u32 sysclk_tbl[] = {
+	33333000, 39999600, 49999500, 66666000,
+	83332500, 99999000, 133332000, 166665000
+};
+
+void board_init_f(ulong bootflag)
+{
+	int px_spd;
+	u32 plat_ratio, bus_clk, sys_clk;
+	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+#if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM)
+	/* for FPGA */
+	set_lbc_br(3, CONFIG_SYS_BR3_PRELIM);
+	set_lbc_or(3, CONFIG_SYS_OR3_PRELIM);
+#else
+#error CONFIG_SYS_BR3_PRELIM, CONFIG_SYS_OR3_PRELIM must be defined
+#endif
+
+	/* initialize selected port with appropriate baud rate */
+	px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD));
+	sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK];
+	plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
+	bus_clk = sys_clk * plat_ratio / 2;
+
+	NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
+			bus_clk / 16 / CONFIG_BAUDRATE);
+
+	puts("\nNAND boot... ");
+
+	/* copy code to RAM and jump to it - this should not return */
+	/* NOTE - code has to be copied out of NAND buffer before
+	 * other blocks can be read.
+	 */
+	relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0,
+			CONFIG_SYS_NAND_U_BOOT_RELOC);
+}
+
+void board_init_r(gd_t *gd, ulong dest_addr)
+{
+	nand_boot();
+}
+
+void putc(char c)
+{
+	if (c == '\n')
+		NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r');
+
+	NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c);
+}
+
+void puts(const char *str)
+{
+	while (*str)
+		putc(*str++);
+}
diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8569mds/Makefile b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8569mds/Makefile
new file mode 100644
index 000000000..9f338024e
--- /dev/null
+++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8569mds/Makefile
@@ -0,0 +1,91 @@
+#
+# (C) Copyright 2007
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
+#
+# Copyright 2009-2011 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+CONFIG_SYS_TEXT_BASE_SPL := 0xfff00000
+PAD_TO := 0xfff01000
+
+nandobj	:= $(objtree)/nand_spl/
+
+LDSCRIPT= $(srctree)/$(CPUDIR)/u-boot-nand_spl.lds
+LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \
+		$(LDFLAGS) $(LDFLAGS_FINAL)
+asflags-y += -DCONFIG_NAND_SPL
+ccflags-y += -DCONFIG_NAND_SPL
+
+SOBJS	= start.o resetvec.o
+COBJS	= cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
+	  nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
+
+OBJS	:= $(addprefix $(obj)/,$(SOBJS) $(COBJS))
+__OBJS	:= $(SOBJS) $(COBJS)
+LNDIR	:= $(nandobj)board/$(BOARDDIR)
+
+targets += $(__OBJS)
+
+all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+	$(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
+	$(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
+
+$(nandobj)u-boot-spl:	$(OBJS) $(nandobj)u-boot-nand_spl.lds
+	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
+		-Map $(nandobj)u-boot-spl.map -o $@
+
+$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT)
+	$(CPP) $(cpp_flags) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \
+		-ansi -D__ASSEMBLY__ -P - <$< >$@
+
+# create symbolic links for common files
+
+$(obj)/cache.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/lib/cache.c $@
+
+$(obj)/cpu_init_early.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $@
+
+$(obj)/spl_minimal.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $@
+
+$(obj)/fsl_law.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc8xxx/law.c $@
+
+$(obj)/law.c:
+	@rm -f $@
+	ln -sf $(srctree)/board/$(BOARDDIR)/law.c $@
+
+$(obj)/nand_boot_fsl_elbc.c:
+	@rm -f $@
+	ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@
+
+$(obj)/ns16550.c:
+	@rm -f $@
+	ln -sf $(srctree)/drivers/serial/ns16550.c $@
+
+$(obj)/resetvec.S:
+	@rm -f $@
+	ln -s $(srctree)/$(CPUDIR)/resetvec.S $@
+
+$(obj)/start.S:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/start.S $@
+
+$(obj)/tlb.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/tlb.c $@
+
+$(obj)/tlb_table.c:
+	@rm -f $@
+	ln -sf $(srctree)/board/$(BOARDDIR)/tlb.c $@
diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8569mds/nand_boot.c b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8569mds/nand_boot.c
new file mode 100644
index 000000000..ce7f6191c
--- /dev/null
+++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8569mds/nand_boot.c
@@ -0,0 +1,60 @@
+/*
+ * Copyright 2009 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <mpc85xx.h>
+#include <asm/io.h>
+#include <ns16550.h>
+#include <nand.h>
+#include <asm/mmu.h>
+#include <asm/immap_85xx.h>
+#include <fsl_ddr_sdram.h>
+#include <asm/fsl_law.h>
+
+#define SYSCLK_66       66666666
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void board_init_f(ulong bootflag)
+{
+	uint plat_ratio, bus_clk, sys_clk;
+	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+	sys_clk = SYSCLK_66;
+
+	plat_ratio = gur->porpllsr & 0x0000003e;
+	plat_ratio >>= 1;
+	bus_clk = plat_ratio * sys_clk;
+	NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
+			bus_clk / 16 / CONFIG_BAUDRATE);
+
+	puts("\nNAND boot... ");
+
+	/* copy code to DDR and jump to it - this should not return */
+	/* NOTE - code has to be copied out of NAND buffer before
+	 * other blocks can be read.
+	 */
+	relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0,
+			CONFIG_SYS_NAND_U_BOOT_RELOC);
+}
+
+void board_init_r(gd_t *gd, ulong dest_addr)
+{
+	nand_boot();
+}
+
+void putc(char c)
+{
+	if (c == '\n')
+		NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r');
+
+	NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c);
+}
+
+void puts(const char *str)
+{
+	while (*str)
+		putc(*str++);
+}
diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8572ds/Makefile b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8572ds/Makefile
new file mode 100644
index 000000000..9f338024e
--- /dev/null
+++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8572ds/Makefile
@@ -0,0 +1,91 @@
+#
+# (C) Copyright 2007
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
+#
+# Copyright 2009-2011 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+CONFIG_SYS_TEXT_BASE_SPL := 0xfff00000
+PAD_TO := 0xfff01000
+
+nandobj	:= $(objtree)/nand_spl/
+
+LDSCRIPT= $(srctree)/$(CPUDIR)/u-boot-nand_spl.lds
+LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \
+		$(LDFLAGS) $(LDFLAGS_FINAL)
+asflags-y += -DCONFIG_NAND_SPL
+ccflags-y += -DCONFIG_NAND_SPL
+
+SOBJS	= start.o resetvec.o
+COBJS	= cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
+	  nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
+
+OBJS	:= $(addprefix $(obj)/,$(SOBJS) $(COBJS))
+__OBJS	:= $(SOBJS) $(COBJS)
+LNDIR	:= $(nandobj)board/$(BOARDDIR)
+
+targets += $(__OBJS)
+
+all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+	$(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
+	$(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
+
+$(nandobj)u-boot-spl:	$(OBJS) $(nandobj)u-boot-nand_spl.lds
+	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
+		-Map $(nandobj)u-boot-spl.map -o $@
+
+$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT)
+	$(CPP) $(cpp_flags) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \
+		-ansi -D__ASSEMBLY__ -P - <$< >$@
+
+# create symbolic links for common files
+
+$(obj)/cache.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/lib/cache.c $@
+
+$(obj)/cpu_init_early.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $@
+
+$(obj)/spl_minimal.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $@
+
+$(obj)/fsl_law.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc8xxx/law.c $@
+
+$(obj)/law.c:
+	@rm -f $@
+	ln -sf $(srctree)/board/$(BOARDDIR)/law.c $@
+
+$(obj)/nand_boot_fsl_elbc.c:
+	@rm -f $@
+	ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@
+
+$(obj)/ns16550.c:
+	@rm -f $@
+	ln -sf $(srctree)/drivers/serial/ns16550.c $@
+
+$(obj)/resetvec.S:
+	@rm -f $@
+	ln -s $(srctree)/$(CPUDIR)/resetvec.S $@
+
+$(obj)/start.S:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/start.S $@
+
+$(obj)/tlb.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/tlb.c $@
+
+$(obj)/tlb_table.c:
+	@rm -f $@
+	ln -sf $(srctree)/board/$(BOARDDIR)/tlb.c $@
diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/mpc8572ds/nand_boot.c b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8572ds/nand_boot.c
new file mode 100644
index 000000000..3bc092734
--- /dev/null
+++ b/qemu/roms/u-boot/nand_spl/board/freescale/mpc8572ds/nand_boot.c
@@ -0,0 +1,67 @@
+/*
+ * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <ns16550.h>
+#include <asm/io.h>
+#include <nand.h>
+
+u32 sysclk_tbl[] = {
+	33333000, 39999600, 49999500, 66666000,
+	83332500, 99999000, 133332000, 166665000
+};
+
+void board_init_f(ulong bootflag)
+{
+	int px_spd;
+	u32 plat_ratio, bus_clk, sys_clk;
+	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+#if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM)
+	/* for FPGA */
+	set_lbc_br(3, CONFIG_SYS_BR3_PRELIM);
+	set_lbc_or(3, CONFIG_SYS_OR3_PRELIM);
+#else
+#error CONFIG_SYS_BR3_PRELIM, CONFIG_SYS_OR3_PRELIM must be defined
+#endif
+
+	/* initialize selected port with appropriate baud rate */
+	px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD));
+	sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK_MASK];
+	plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
+	bus_clk = sys_clk * plat_ratio / 2;
+
+	NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
+			bus_clk / 16 / CONFIG_BAUDRATE);
+
+	puts("\nNAND boot... ");
+
+	/* copy code to RAM and jump to it - this should not return */
+	/* NOTE - code has to be copied out of NAND buffer before
+	 * other blocks can be read.
+	 */
+	relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0,
+			CONFIG_SYS_NAND_U_BOOT_RELOC);
+}
+
+void board_init_r(gd_t *gd, ulong dest_addr)
+{
+	nand_boot();
+}
+
+void putc(char c)
+{
+	if (c == '\n')
+		NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r');
+
+	NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c);
+}
+
+void puts(const char *str)
+{
+	while (*str)
+		putc(*str++);
+}
diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/p1023rds/Makefile b/qemu/roms/u-boot/nand_spl/board/freescale/p1023rds/Makefile
new file mode 100644
index 000000000..fba9f9350
--- /dev/null
+++ b/qemu/roms/u-boot/nand_spl/board/freescale/p1023rds/Makefile
@@ -0,0 +1,87 @@
+#
+# Copyright 2010-2011 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+PAD_TO := 0xfff01000
+
+nandobj	:= $(objtree)/nand_spl/
+
+LDSCRIPT= $(srctree)/$(CPUDIR)/u-boot-nand_spl.lds
+LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \
+		$(LDFLAGS) $(LDFLAGS_FINAL)
+asflags-y += -DCONFIG_NAND_SPL
+ccflags-y += -DCONFIG_NAND_SPL
+
+SOBJS	= start.o resetvec.o
+COBJS	= cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
+	  nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
+
+OBJS	:= $(addprefix $(obj)/,$(SOBJS) $(COBJS))
+__OBJS	:= $(SOBJS) $(COBJS)
+LNDIR	:= $(nandobj)board/$(BOARDDIR)
+
+targets += $(__OBJS)
+
+all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+	$(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
+	$(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
+
+$(nandobj)u-boot-spl:	$(OBJS) $(nandobj)u-boot-nand_spl.lds
+	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
+		-Map $(nandobj)u-boot-spl.map -o $@
+
+$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT)
+	$(CPP) $(cpp_flags) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \
+		-ansi -D__ASSEMBLY__ -P - <$< >$@
+
+# create symbolic links for common files
+
+$(obj)/cache.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/lib/cache.c $@
+
+$(obj)/cpu_init_early.c:
+	@rm -f $@
+	ln -sf $(srctree)/$(CPUDIR)/cpu_init_early.c $@
+
+$(obj)/spl_minimal.c:
+	@rm -f $@
+	ln -sf $(srctree)/$(CPUDIR)/spl_minimal.c $@
+
+$(obj)/fsl_law.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc8xxx/law.c $@
+
+$(obj)/law.c:
+	@rm -f $@
+	ln -sf $(srctree)/board/$(BOARDDIR)/law.c $@
+
+$(obj)/nand_boot_fsl_elbc.c:
+	@rm -f $@
+	ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@
+
+$(obj)/ns16550.c:
+	@rm -f $@
+	ln -sf $(srctree)/drivers/serial/ns16550.c $@
+
+$(obj)/resetvec.S:
+	@rm -f $@
+	ln -s $(srctree)/$(CPUDIR)/resetvec.S $@
+
+$(obj)/start.S:
+	@rm -f $@
+	ln -sf $(srctree)/$(CPUDIR)/start.S $@
+
+$(obj)/tlb.c:
+	@rm -f $@
+	ln -sf $(srctree)/$(CPUDIR)/tlb.c $@
+
+$(obj)/tlb_table.c:
+	@rm -f $@
+	ln -sf $(srctree)/board/$(BOARDDIR)/tlb.c $@
diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/p1023rds/nand_boot.c b/qemu/roms/u-boot/nand_spl/board/freescale/p1023rds/nand_boot.c
new file mode 100644
index 000000000..d9afa6d02
--- /dev/null
+++ b/qemu/roms/u-boot/nand_spl/board/freescale/p1023rds/nand_boot.c
@@ -0,0 +1,96 @@
+/*
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ * Author: Roy Zang <tie-fei.zang@freescale.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <ns16550.h>
+#include <asm/io.h>
+#include <nand.h>
+#include <asm/fsl_law.h>
+#include <fsl_ddr_sdram.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Fixed sdram init -- doesn't use serial presence detect. */
+void sdram_init(void)
+{
+	struct ccsr_ddr __iomem *ddr =
+		(struct ccsr_ddr __iomem *)CONFIG_SYS_FSL_DDR_ADDR;
+
+	set_next_law(0, LAW_SIZE_2G, LAW_TRGT_IF_DDR_1);
+
+	__raw_writel(CONFIG_SYS_DDR_CS0_BNDS, &ddr->cs0_bnds);
+	__raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, &ddr->cs0_config);
+	__raw_writel(CONFIG_SYS_DDR_CS1_BNDS, &ddr->cs1_bnds);
+	__raw_writel(CONFIG_SYS_DDR_CS1_CONFIG, &ddr->cs1_config);
+	__raw_writel(CONFIG_SYS_DDR_TIMING_3, &ddr->timing_cfg_3);
+	__raw_writel(CONFIG_SYS_DDR_TIMING_0, &ddr->timing_cfg_0);
+	__raw_writel(CONFIG_SYS_DDR_TIMING_1, &ddr->timing_cfg_1);
+	__raw_writel(CONFIG_SYS_DDR_TIMING_2, &ddr->timing_cfg_2);
+	__raw_writel(CONFIG_SYS_DDR_CONTROL2, &ddr->sdram_cfg_2);
+	__raw_writel(CONFIG_SYS_DDR_MODE_1, &ddr->sdram_mode);
+	__raw_writel(CONFIG_SYS_DDR_MODE_2, &ddr->sdram_mode_2);
+	__raw_writel(CONFIG_SYS_DDR_INTERVAL, &ddr->sdram_interval);
+	__raw_writel(CONFIG_SYS_DDR_DATA_INIT, &ddr->sdram_data_init);
+	__raw_writel(CONFIG_SYS_DDR_CLK_CTRL, &ddr->sdram_clk_cntl);
+	__raw_writel(CONFIG_SYS_DDR_TIMING_4, &ddr->timing_cfg_4);
+	__raw_writel(CONFIG_SYS_DDR_TIMING_5, &ddr->timing_cfg_5);
+	__raw_writel(CONFIG_SYS_DDR_ZQ_CNTL, &ddr->ddr_zq_cntl);
+	__raw_writel(CONFIG_SYS_DDR_WRLVL_CNTL, &ddr->ddr_wrlvl_cntl);
+	__raw_writel(CONFIG_SYS_DDR_CDR_1, &ddr->ddr_cdr1);
+	__raw_writel(CONFIG_SYS_DDR_CDR_2, &ddr->ddr_cdr2);
+	/* Set, but do not enable the memory */
+	__raw_writel(CONFIG_SYS_DDR_CONTROL & ~SDRAM_CFG_MEM_EN, &ddr->sdram_cfg);
+
+	asm volatile("sync;isync");
+	udelay(500);
+
+	/* Let the controller go */
+	out_be32(&ddr->sdram_cfg, in_be32(&ddr->sdram_cfg) | SDRAM_CFG_MEM_EN);
+}
+
+void board_init_f(ulong bootflag)
+{
+	u32 plat_ratio;
+	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+	/* initialize selected port with appropriate baud rate */
+	plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
+	plat_ratio >>= 1;
+	gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
+	NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
+			gd->bus_clk / 16 / CONFIG_BAUDRATE);
+
+	puts("\nNAND boot... ");
+	/* Initialize the DDR3 */
+	sdram_init();
+	/* copy code to RAM and jump to it - this should not return */
+	/* NOTE - code has to be copied out of NAND buffer before
+	 * other blocks can be read.
+	 */
+	relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0,
+			CONFIG_SYS_NAND_U_BOOT_RELOC);
+}
+
+void board_init_r(gd_t *gd, ulong dest_addr)
+{
+	nand_boot();
+}
+
+void putc(char c)
+{
+	if (c == '\n')
+		NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r');
+
+	NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c);
+}
+
+void puts(const char *str)
+{
+	while (*str)
+		putc(*str++);
+}
diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/p1_p2_rdb/Makefile b/qemu/roms/u-boot/nand_spl/board/freescale/p1_p2_rdb/Makefile
new file mode 100644
index 000000000..9f338024e
--- /dev/null
+++ b/qemu/roms/u-boot/nand_spl/board/freescale/p1_p2_rdb/Makefile
@@ -0,0 +1,91 @@
+#
+# (C) Copyright 2007
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
+#
+# Copyright 2009-2011 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+CONFIG_SYS_TEXT_BASE_SPL := 0xfff00000
+PAD_TO := 0xfff01000
+
+nandobj	:= $(objtree)/nand_spl/
+
+LDSCRIPT= $(srctree)/$(CPUDIR)/u-boot-nand_spl.lds
+LDFLAGS := -T $(nandobj)u-boot-nand_spl.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \
+		$(LDFLAGS) $(LDFLAGS_FINAL)
+asflags-y += -DCONFIG_NAND_SPL
+ccflags-y += -DCONFIG_NAND_SPL
+
+SOBJS	= start.o resetvec.o
+COBJS	= cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
+	  nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
+
+OBJS	:= $(addprefix $(obj)/,$(SOBJS) $(COBJS))
+__OBJS	:= $(SOBJS) $(COBJS)
+LNDIR	:= $(nandobj)board/$(BOARDDIR)
+
+targets += $(__OBJS)
+
+all: $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+	$(OBJCOPY) $(OBJCOPYFLAGS) --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
+	$(OBJCOPY) $(OBJCOPYFLAGS) -O binary $< $@
+
+$(nandobj)u-boot-spl:	$(OBJS) $(nandobj)u-boot-nand_spl.lds
+	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
+		-Map $(nandobj)u-boot-spl.map -o $@
+
+$(nandobj)u-boot-nand_spl.lds: $(LDSCRIPT)
+	$(CPP) $(cpp_flags) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \
+		-ansi -D__ASSEMBLY__ -P - <$< >$@
+
+# create symbolic links for common files
+
+$(obj)/cache.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/lib/cache.c $@
+
+$(obj)/cpu_init_early.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $@
+
+$(obj)/spl_minimal.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $@
+
+$(obj)/fsl_law.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc8xxx/law.c $@
+
+$(obj)/law.c:
+	@rm -f $@
+	ln -sf $(srctree)/board/$(BOARDDIR)/law.c $@
+
+$(obj)/nand_boot_fsl_elbc.c:
+	@rm -f $@
+	ln -sf $(srctree)/nand_spl/nand_boot_fsl_elbc.c $@
+
+$(obj)/ns16550.c:
+	@rm -f $@
+	ln -sf $(srctree)/drivers/serial/ns16550.c $@
+
+$(obj)/resetvec.S:
+	@rm -f $@
+	ln -s $(srctree)/$(CPUDIR)/resetvec.S $@
+
+$(obj)/start.S:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/start.S $@
+
+$(obj)/tlb.c:
+	@rm -f $@
+	ln -sf $(srctree)/arch/powerpc/cpu/mpc85xx/tlb.c $@
+
+$(obj)/tlb_table.c:
+	@rm -f $@
+	ln -sf $(srctree)/board/$(BOARDDIR)/tlb.c $@
diff --git a/qemu/roms/u-boot/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c b/qemu/roms/u-boot/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c
new file mode 100644
index 000000000..f7e843843
--- /dev/null
+++ b/qemu/roms/u-boot/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c
@@ -0,0 +1,82 @@
+/*
+ * Copyright 2009 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <mpc85xx.h>
+#include <asm/io.h>
+#include <ns16550.h>
+#include <nand.h>
+#include <asm/mmu.h>
+#include <asm/immap_85xx.h>
+#include <fsl_ddr_sdram.h>
+#include <asm/fsl_law.h>
+
+#define SYSCLK_MASK     0x00200000
+#define BOARDREV_MASK   0x10100000
+#define BOARDREV_B      0x10100000
+#define BOARDREV_C      0x00100000
+
+#define SYSCLK_66       66666666
+#define SYSCLK_50       50000000
+#define SYSCLK_100      100000000
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void board_init_f(ulong bootflag)
+{
+	uint plat_ratio, bus_clk, sys_clk = 0;
+	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
+	uint val, temp, sysclk_mask;
+
+	val = pgpio->gpdat;
+	sysclk_mask = val & SYSCLK_MASK;
+	temp = val & BOARDREV_MASK;
+	if (temp == BOARDREV_C) {
+		if(sysclk_mask == 0)
+			sys_clk = SYSCLK_66;
+		else
+			sys_clk = SYSCLK_100;
+	} else if (temp == BOARDREV_B) {
+		if(sysclk_mask == 0)
+			sys_clk = SYSCLK_66;
+		else
+			sys_clk = SYSCLK_50;
+	}
+
+	plat_ratio = gur->porpllsr & 0x0000003e;
+	plat_ratio >>= 1;
+	bus_clk = plat_ratio * sys_clk;
+	NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
+			bus_clk / 16 / CONFIG_BAUDRATE);
+
+	puts("\nNAND boot... ");
+
+	/* copy code to DDR and jump to it - this should not return */
+	/* NOTE - code has to be copied out of NAND buffer before
+	 * other blocks can be read.
+	 */
+	relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0,
+			CONFIG_SYS_NAND_U_BOOT_RELOC);
+}
+
+void board_init_r(gd_t *gd, ulong dest_addr)
+{
+	nand_boot();
+}
+
+void putc(char c)
+{
+	if (c == '\n')
+		NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r');
+
+	NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c);
+}
+
+void puts(const char *str)
+{
+	while (*str)
+		putc(*str++);
+}