Adding qemu as a submodule of KVMFORNFV

This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>

15 files changed, 0 insertions, 1214 deletions

diff --git a/qemu/roms/u-boot/include/power/battery.h b/qemu/roms/u-boot/include/power/battery.h
deleted file mode 100644
index dc8d153c1..000000000
--- a/qemu/roms/u-boot/include/power/battery.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- *  Copyright (C) 2012 Samsung Electronics
- *  Lukasz Majewski <l.majewski@samsung.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __POWER_BATTERY_H_
-#define __POWER_BATTERY_H_
-
-struct battery {
-	unsigned int version;
-	unsigned int state_of_chrg;
-	unsigned int time_to_empty;
-	unsigned int capacity;
-	unsigned int voltage_uV;
-
-	unsigned int state;
-};
-
-int power_bat_init(unsigned char bus);
-#endif /* __POWER_BATTERY_H_ */
diff --git a/qemu/roms/u-boot/include/power/fg_battery_cell_params.h b/qemu/roms/u-boot/include/power/fg_battery_cell_params.h
deleted file mode 100644
index d18e2d673..000000000
--- a/qemu/roms/u-boot/include/power/fg_battery_cell_params.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- *  Copyright (C) 2012 Samsung Electronics
- *  Lukasz Majewski <l.majewski@samsung.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __FG_BATTERY_CELL_PARAMS_H_
-#define __FG_BATTERY_CELL_PARAMS_H_
-
-#if  defined(CONFIG_POWER_FG_MAX17042) && defined(CONFIG_TRATS)
-
-/* Cell characteristics - Exynos4 TRATS development board */
-/* Shall be written to addr 0x80h */
-u16 cell_character0[16] = {
-	0xA2A0,
-	0xB6E0,
-	0xB850,
-	0xBAD0,
-	0xBB20,
-	0xBB70,
-	0xBBC0,
-	0xBC20,
-	0xBC80,
-	0xBCE0,
-	0xBD80,
-	0xBE20,
-	0xC090,
-	0xC420,
-	0xC910,
-	0xD070
-};
-
-/* Shall be written to addr 0x90h */
-u16 cell_character1[16] = {
-	0x0090,
-	0x1A50,
-	0x02F0,
-	0x2060,
-	0x2060,
-	0x2E60,
-	0x26A0,
-	0x2DB0,
-	0x2DB0,
-	0x1870,
-	0x2A20,
-	0x16F0,
-	0x08F0,
-	0x0D40,
-	0x08C0,
-	0x08C0
-};
-
-/* Shall be written to addr 0xA0h */
-u16 cell_character2[16] = {
-	0x0100,
-	0x0100,
-	0x0100,
-	0x0100,
-	0x0100,
-	0x0100,
-	0x0100,
-	0x0100,
-	0x0100,
-	0x0100,
-	0x0100,
-	0x0100,
-	0x0100,
-	0x0100,
-	0x0100,
-	0x0100
-};
-#endif
-#endif /* __FG_BATTERY_CELL_PARAMS_H_ */
diff --git a/qemu/roms/u-boot/include/power/max17042_fg.h b/qemu/roms/u-boot/include/power/max17042_fg.h
deleted file mode 100644
index ce9605336..000000000
--- a/qemu/roms/u-boot/include/power/max17042_fg.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- *  Copyright (C) 2012 Samsung Electronics
- *  Lukasz Majewski <l.majewski@samsung.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __MAX17042_FG_H_
-#define __MAX17042_FG_H_
-
-/* MAX 17042 registers */
-enum {
-	MAX17042_STATUS         = 0x00,
-	MAX17042_SOCREP         = 0x06,
-	MAX17042_VCELL          = 0x09,
-	MAX17042_CURRENT        = 0x0A,
-	MAX17042_AVG_CURRENT	= 0x0B,
-	MAX17042_SOCMIX	= 0x0D,
-	MAX17042_SOCAV		= 0x0E,
-	MAX17042_DESIGN_CAP	= 0x18,
-	MAX17042_AVG_VCELL	= 0x19,
-	MAX17042_CONFIG	= 0x1D,
-	MAX17042_VERSION	= 0x21,
-	MAX17042_LEARNCFG       = 0x28,
-	MAX17042_FILTERCFG	= 0x29,
-	MAX17042_RELAXCFG	= 0x2A,
-	MAX17042_MISCCFG	= 0x2B,
-	MAX17042_CGAIN		= 0x2E,
-	MAX17042_COFF		= 0x2F,
-	MAX17042_RCOMP0	= 0x38,
-	MAX17042_TEMPCO	= 0x39,
-	MAX17042_FSTAT		= 0x3D,
-	MAX17042_MLOCKReg1	= 0x62,
-	MAX17042_MLOCKReg2	= 0x63,
-	MAX17042_MODEL1         = 0x80,
-	MAX17042_MODEL2         = 0x90,
-	MAX17042_MODEL3         = 0xA0,
-	MAX17042_VFOCV		= 0xFB,
-	MAX17042_VFSOC		= 0xFF,
-
-	FG_NUM_OF_REGS = 0x100,
-};
-
-#define RCOMP0			0x0060
-#define TempCo			0x1015
-
-
-#define MAX17042_POR (1 << 1)
-
-#define MODEL_UNLOCK1		0x0059
-#define MODEL_UNLOCK2		0x00c4
-#define MODEL_LOCK1		0x0000
-#define MODEL_LOCK2		0x0000
-
-#define MAX17042_I2C_ADDR	(0x6C >> 1)
-
-int power_fg_init(unsigned char bus);
-#endif /* __MAX17042_FG_H_ */
diff --git a/qemu/roms/u-boot/include/power/max77686_pmic.h b/qemu/roms/u-boot/include/power/max77686_pmic.h
deleted file mode 100644
index c2a772a89..000000000
--- a/qemu/roms/u-boot/include/power/max77686_pmic.h
+++ /dev/null
@@ -1,204 +0,0 @@
-/*
- *  Copyright (C) 2012 Samsung Electronics
- *  Rajeshwari Shinde <rajeshwari.s@samsung.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __MAX77686_H_
-#define __MAX77686_H_
-
-#include <power/pmic.h>
-
-enum {
-	MAX77686_REG_PMIC_ID		= 0x0,
-	MAX77686_REG_PMIC_INTSRC,
-	MAX77686_REG_PMIC_INT1,
-	MAX77686_REG_PMIC_INT2,
-	MAX77686_REG_PMIC_INT1MSK,
-	MAX77686_REG_PMIC_INT2MSK,
-
-	MAX77686_REG_PMIC_STATUS1,
-	MAX77686_REG_PMIC_STATUS2,
-
-	MAX77686_REG_PMIC_PWRON,
-	MAX77686_REG_PMIC_ONOFFDELAY,
-	MAX77686_REG_PMIC_MRSTB,
-
-	MAX77686_REG_PMIC_BUCK1CRTL	= 0x10,
-	MAX77686_REG_PMIC_BUCK1OUT,
-	MAX77686_REG_PMIC_BUCK2CTRL1,
-	MAX77686_REG_PMIC_BUCK234FREQ,
-	MAX77686_REG_PMIC_BUCK2DVS1,
-	MAX77686_REG_PMIC_BUCK2DVS2,
-	MAX77686_REG_PMIC_BUCK2DVS3,
-	MAX77686_REG_PMIC_BUCK2DVS4,
-	MAX77686_REG_PMIC_BUCK2DVS5,
-	MAX77686_REG_PMIC_BUCK2DVS6,
-	MAX77686_REG_PMIC_BUCK2DVS7,
-	MAX77686_REG_PMIC_BUCK2DVS8,
-	MAX77686_REG_PMIC_BUCK3CTRL,
-	MAX77686_REG_PMIC_BUCK3DVS1	= 0x1e,
-	MAX77686_REG_PMIC_BUCK3DVS2,
-	MAX77686_REG_PMIC_BUCK3DVS3,
-	MAX77686_REG_PMIC_BUCK3DVS4,
-	MAX77686_REG_PMIC_BUCK3DVS5,
-	MAX77686_REG_PMIC_BUCK3DVS6,
-	MAX77686_REG_PMIC_BUCK3DVS7,
-	MAX77686_REG_PMIC_BUCK3DVS8,
-	MAX77686_REG_PMIC_BUCK4CTRL1,
-	MAX77686_REG_PMIC_BUCK4DVS1	= 0x28,
-	MAX77686_REG_PMIC_BUCK4DVS2,
-	MAX77686_REG_PMIC_BUCK4DVS3,
-	MAX77686_REG_PMIC_BUCK4DVS4,
-	MAX77686_REG_PMIC_BUCK4DVS5,
-	MAX77686_REG_PMIC_BUCK4DVS6,
-	MAX77686_REG_PMIC_BUCK4DVS7,
-	MAX77686_REG_PMIC_BUCK4DVS8,
-	MAX77686_REG_PMIC_BUCK5CTRL,
-	MAX77686_REG_PMIC_BUCK5OUT,
-	MAX77686_REG_PMIC_BUCK6CRTL,
-	MAX77686_REG_PMIC_BUCK6OUT,
-	MAX77686_REG_PMIC_BUCK7CRTL,
-	MAX77686_REG_PMIC_BUCK7OUT,
-	MAX77686_REG_PMIC_BUCK8CRTL,
-	MAX77686_REG_PMIC_BUCK8OUT,
-	MAX77686_REG_PMIC_BUCK9CRTL,
-	MAX77686_REG_PMIC_BUCK9OUT,
-
-	MAX77686_REG_PMIC_LDO1CTRL1	= 0x40,
-	MAX77686_REG_PMIC_LDO2CTRL1,
-	MAX77686_REG_PMIC_LDO3CTRL1,
-	MAX77686_REG_PMIC_LDO4CTRL1,
-	MAX77686_REG_PMIC_LDO5CTRL1,
-	MAX77686_REG_PMIC_LDO6CTRL1,
-	MAX77686_REG_PMIC_LDO7CTRL1,
-	MAX77686_REG_PMIC_LDO8CTRL1,
-	MAX77686_REG_PMIC_LDO9CTRL1,
-	MAX77686_REG_PMIC_LDO10CTRL1,
-	MAX77686_REG_PMIC_LDO11CTRL1,
-	MAX77686_REG_PMIC_LDO12CTRL1,
-	MAX77686_REG_PMIC_LDO13CTRL1,
-	MAX77686_REG_PMIC_LDO14CTRL1,
-	MAX77686_REG_PMIC_LDO15CTRL1,
-	MAX77686_REG_PMIC_LDO16CTRL1,
-	MAX77686_REG_PMIC_LDO17CTRL1,
-	MAX77686_REG_PMIC_LDO18CTRL1,
-	MAX77686_REG_PMIC_LDO19CTRL1,
-	MAX77686_REG_PMIC_LDO20CTRL1,
-	MAX77686_REG_PMIC_LDO21CTRL1,
-	MAX77686_REG_PMIC_LDO22CTRL1,
-	MAX77686_REG_PMIC_LDO23CTRL1,
-	MAX77686_REG_PMIC_LDO24CTRL1,
-	MAX77686_REG_PMIC_LDO25CTRL1,
-	MAX77686_REG_PMIC_LDO26CTRL1,
-	MAX77686_REG_PMIC_LDO1CTRL2,
-	MAX77686_REG_PMIC_LDO2CTRL2,
-	MAX77686_REG_PMIC_LDO3CTRL2,
-	MAX77686_REG_PMIC_LDO4CTRL2,
-	MAX77686_REG_PMIC_LDO5CTRL2,
-	MAX77686_REG_PMIC_LDO6CTRL2,
-	MAX77686_REG_PMIC_LDO7CTRL2,
-	MAX77686_REG_PMIC_LDO8CTRL2,
-	MAX77686_REG_PMIC_LDO9CTRL2,
-	MAX77686_REG_PMIC_LDO10CTRL2,
-	MAX77686_REG_PMIC_LDO11CTRL2,
-	MAX77686_REG_PMIC_LDO12CTRL2,
-	MAX77686_REG_PMIC_LDO13CTRL2,
-	MAX77686_REG_PMIC_LDO14CTRL2,
-	MAX77686_REG_PMIC_LDO15CTRL2,
-	MAX77686_REG_PMIC_LDO16CTRL2,
-	MAX77686_REG_PMIC_LDO17CTRL2,
-	MAX77686_REG_PMIC_LDO18CTRL2,
-	MAX77686_REG_PMIC_LDO19CTRL2,
-	MAX77686_REG_PMIC_LDO20CTRL2,
-	MAX77686_REG_PMIC_LDO21CTRL2,
-	MAX77686_REG_PMIC_LDO22CTRL2,
-	MAX77686_REG_PMIC_LDO23CTRL2,
-	MAX77686_REG_PMIC_LDO24CTRL2,
-	MAX77686_REG_PMIC_LDO25CTRL2,
-	MAX77686_REG_PMIC_LDO26CTRL2,
-
-	MAX77686_REG_PMIC_BBAT		= 0x7e,
-	MAX77686_REG_PMIC_32KHZ,
-
-	PMIC_NUM_OF_REGS,
-};
-
-/* I2C device address for pmic max77686 */
-#define MAX77686_I2C_ADDR (0x12 >> 1)
-
-enum {
-	REG_DISABLE = 0,
-	REG_ENABLE
-};
-
-enum {
-	LDO_OFF = 0,
-	LDO_ON,
-
-	DIS_LDO = (0x00 << 6),
-	EN_LDO = (0x3 << 6),
-};
-
-enum {
-	OPMODE_OFF = 0,
-	OPMODE_STANDBY,
-	OPMODE_LPM,
-	OPMODE_ON,
-};
-
-int max77686_set_ldo_voltage(struct pmic *p, int ldo, ulong uV);
-int max77686_set_ldo_mode(struct pmic *p, int ldo, char opmode);
-int max77686_set_buck_mode(struct pmic *p, int buck, char opmode);
-
-#define MAX77686_LDO_VOLT_MAX_HEX	0x3f
-#define MAX77686_LDO_VOLT_MASK		0x3f
-#define MAX77686_LDO_MODE_MASK		0xc0
-#define MAX77686_LDO_MODE_OFF		(0x00 << 0x06)
-#define MAX77686_LDO_MODE_STANDBY	(0x01 << 0x06)
-#define MAX77686_LDO_MODE_LPM		(0x02 << 0x06)
-#define MAX77686_LDO_MODE_ON		(0x03 << 0x06)
-#define MAX77686_BUCK_MODE_MASK		0x03
-#define MAX77686_BUCK_MODE_SHIFT_1	0x00
-#define MAX77686_BUCK_MODE_SHIFT_2	0x04
-#define MAX77686_BUCK_MODE_OFF		0x00
-#define MAX77686_BUCK_MODE_STANDBY	0x01
-#define MAX77686_BUCK_MODE_LPM		0x02
-#define MAX77686_BUCK_MODE_ON		0x03
-
-/* Buck1 1 volt value */
-#define MAX77686_BUCK1OUT_1V	0x5
-/* Buck1 1.05 volt value */
-#define MAX77686_BUCK1OUT_1_05V    0x6
-#define MAX77686_BUCK1CTRL_EN	(3 << 0)
-/* Buck2 1.3 volt value */
-#define MAX77686_BUCK2DVS1_1_3V	0x38
-#define MAX77686_BUCK2CTRL_ON	(1 << 4)
-/* Buck3 1.0125 volt value */
-#define MAX77686_BUCK3DVS1_1_0125V	0x21
-#define MAX77686_BUCK3CTRL_ON	(1 << 4)
-/* Buck4 1.2 volt value */
-#define MAX77686_BUCK4DVS1_1_2V	0x30
-#define MAX77686_BUCK4CTRL_ON	(1 << 4)
-/* LDO2 1.5 volt value */
-#define MAX77686_LD02CTRL1_1_5V	0x1c
-/* LDO3 1.8 volt value */
-#define MAX77686_LD03CTRL1_1_8V	0x14
-/* LDO5 1.8 volt value */
-#define MAX77686_LD05CTRL1_1_8V	0x14
-/* LDO10 1.8 volt value */
-#define MAX77686_LD10CTRL1_1_8V	0x14
-/*
- * MAX77686_REG_PMIC_32KHZ set to 32KH CP
- * output is activated
- */
-#define MAX77686_32KHCP_EN	(1 << 1)
-/*
- * MAX77686_REG_PMIC_BBAT set to
- * Back up batery charger on and
- * limit voltage setting to 3.5v
- */
-#define MAX77686_BBCHOSTEN	(1 << 0)
-#define MAX77686_BBCVS_3_5V	(3 << 3)
-#endif /* __MAX77686_PMIC_H_ */
diff --git a/qemu/roms/u-boot/include/power/max77693_fg.h b/qemu/roms/u-boot/include/power/max77693_fg.h
deleted file mode 100644
index 42626ed83..000000000
--- a/qemu/roms/u-boot/include/power/max77693_fg.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (C) 2013 Samsung Electronics
- * Piotr Wilczek <p.wilczek@samsung.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __MAX77693_FG_H_
-#define __MAX77693_FG_H_
-
-/* MAX 77693 registers */
-enum {
-	MAX77693_STATUS		= 0x00,
-	MAX77693_SOCREP		= 0x06,
-	MAX77693_VCELL		= 0x09,
-	MAX77693_CURRENT	= 0x0A,
-	MAX77693_AVG_CURRENT	= 0x0B,
-	MAX77693_SOCMIX		= 0x0D,
-	MAX77693_SOCAV		= 0x0E,
-	MAX77693_DESIGN_CAP	= 0x18,
-	MAX77693_AVG_VCELL	= 0x19,
-	MAX77693_CONFIG		= 0x1D,
-	MAX77693_VERSION	= 0x21,
-	MAX77693_LEARNCFG	= 0x28,
-	MAX77693_FILTERCFG	= 0x29,
-	MAX77693_RELAXCFG	= 0x2A,
-	MAX77693_MISCCFG	= 0x2B,
-	MAX77693_CGAIN		= 0x2E,
-	MAX77693_COFF		= 0x2F,
-	MAX77693_RCOMP0		= 0x38,
-	MAX77693_TEMPCO		= 0x39,
-	MAX77693_FSTAT		= 0x3D,
-	MAX77693_VFOCV		= 0xEE,
-	MAX77693_VFSOC		= 0xFF,
-
-	FG_NUM_OF_REGS		= 0x100,
-};
-
-#define MAX77693_POR (1 << 1)
-
-#define MODEL_UNLOCK1		0x0059
-#define MODEL_UNLOCK2		0x00c4
-#define MODEL_LOCK1		0x0000
-#define MODEL_LOCK2		0x0000
-
-#define MAX77693_FUEL_I2C_ADDR	(0x6C >> 1)
-
-int power_fg_init(unsigned char bus);
-#endif /* __MAX77693_FG_H_ */
diff --git a/qemu/roms/u-boot/include/power/max77693_muic.h b/qemu/roms/u-boot/include/power/max77693_muic.h
deleted file mode 100644
index a2c29eb6c..000000000
--- a/qemu/roms/u-boot/include/power/max77693_muic.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (C) 2013 Samsung Electronics
- * Piotr Wilczek <p.wilczek@samsung.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __MAX77693_MUIC_H_
-#define __MAX77693_MUIC_H_
-
-#include <power/power_chrg.h>
-
-/*
- * MUIC REGISTER
- */
-
-#define MAX77693_MUIC_PREFIX	"max77693-muic:"
-
-/* MAX77693_MUIC_STATUS1 */
-#define MAX77693_MUIC_ADC_MASK	0x1F
-
-/* MAX77693_MUIC_STATUS2 */
-#define MAX77693_MUIC_CHG_NO		0x00
-#define MAX77693_MUIC_CHG_USB		0x01
-#define MAX77693_MUIC_CHG_USB_D		0x02
-#define MAX77693_MUIC_CHG_TA		0x03
-#define MAX77693_MUIC_CHG_TA_500	0x04
-#define MAX77693_MUIC_CHG_TA_1A		0x05
-#define MAX77693_MUIC_CHG_MASK		0x07
-
-/* MAX77693_MUIC_CONTROL1 */
-#define MAX77693_MUIC_CTRL1_DN1DP2	((0x1 << 3) | 0x1)
-#define MAX77693_MUIC_CTRL1_UT1UR2	((0x3 << 3) | 0x3)
-#define MAX77693_MUIC_CTRL1_ADN1ADP2	((0x4 << 3) | 0x4)
-#define MAX77693_MUIC_CTRL1_AUT1AUR2	((0x5 << 3) | 0x5)
-#define MAX77693_MUIC_CTRL1_MASK	0xC0
-
-#define MUIC_PATH_USB	0
-#define MUIC_PATH_UART	1
-
-#define MUIC_PATH_CP	0
-#define MUIC_PATH_AP	1
-
-enum muic_path {
-	MUIC_PATH_USB_CP,
-	MUIC_PATH_USB_AP,
-	MUIC_PATH_UART_CP,
-	MUIC_PATH_UART_AP,
-};
-
-/* MAX 777693 MUIC registers */
-enum {
-	MAX77693_MUIC_ID	= 0x00,
-	MAX77693_MUIC_INT1	= 0x01,
-	MAX77693_MUIC_INT2	= 0x02,
-	MAX77693_MUIC_INT3	= 0x03,
-	MAX77693_MUIC_STATUS1	= 0x04,
-	MAX77693_MUIC_STATUS2	= 0x05,
-	MAX77693_MUIC_STATUS3	= 0x06,
-	MAX77693_MUIC_INTMASK1	= 0x07,
-	MAX77693_MUIC_INTMASK2	= 0x08,
-	MAX77693_MUIC_INTMASK3	= 0x09,
-	MAX77693_MUIC_CDETCTRL	= 0x0A,
-	MAX77693_MUIC_CONTROL1	= 0x0C,
-	MAX77693_MUIC_CONTROL2	= 0x0D,
-	MAX77693_MUIC_CONTROL3	= 0x0E,
-
-	MUIC_NUM_OF_REGS	= 0x0F,
-};
-
-#define MAX77693_MUIC_I2C_ADDR	(0x4A >> 1)
-
-int power_muic_init(unsigned int bus);
-#endif /* __MAX77693_MUIC_H_ */
diff --git a/qemu/roms/u-boot/include/power/max77693_pmic.h b/qemu/roms/u-boot/include/power/max77693_pmic.h
deleted file mode 100644
index 616d051f1..000000000
--- a/qemu/roms/u-boot/include/power/max77693_pmic.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Copyright (C) 2013 Samsung Electronics
- * Piotr Wilczek <p.wilczek@samsung.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __MAX77693_PMIC_H_
-#define __MAX77693_PMIC_H_
-
-#include <power/power_chrg.h>
-
-enum {CHARGER_ENABLE, CHARGER_DISABLE};
-
-#define CHARGER_MIN_CURRENT 200
-#define CHARGER_MAX_CURRENT 2000
-
-#define MAX77693_CHG_PREFIX	"max77693-chg:"
-
-/* Registers */
-
-#define MAX77693_CHG_BASE	0xB0
-#define MAX77693_CHG_INT_OK	0xB2
-#define MAX77693_CHG_CNFG_00	0xB7
-#define MAX77693_CHG_CNFG_02	0xB9
-#define MAX77693_CHG_CNFG_06	0xBD
-#define MAX77693_SAFEOUT	0xC6
-
-#define PMIC_NUM_OF_REGS	0xC7
-
-#define MAX77693_CHG_DETBAT	(0x1 << 7)	/* MAX77693_CHG_INT_OK */
-#define MAX77693_CHG_MODE_ON	0x05		/* MAX77693_CHG_CNFG_00 */
-#define MAX77693_CHG_CC		0x3F		/* MAX77693_CHG_CNFG_02	*/
-#define MAX77693_CHG_LOCK	(0x0 << 2)	/* MAX77693_CHG_CNFG_06	*/
-#define MAX77693_CHG_UNLOCK	(0x3 << 2)	/* MAX77693_CHG_CNFG_06	*/
-
-#define MAX77693_ENSAFEOUT1	(1 << 6)
-#define MAX77693_ENSAFEOUT2	(1 << 7)
-
-#define MAX77693_PMIC_I2C_ADDR	(0xCC >> 1)
-
-int pmic_init_max77693(unsigned char bus);
-#endif /* __MAX77693_PMIC_H_ */
diff --git a/qemu/roms/u-boot/include/power/max8997_muic.h b/qemu/roms/u-boot/include/power/max8997_muic.h
deleted file mode 100644
index e20854998..000000000
--- a/qemu/roms/u-boot/include/power/max8997_muic.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- *  Copyright (C) 2012 Samsung Electronics
- *  Lukasz Majewski <l.majewski@samsung.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __MAX8997_MUIC_H_
-#define __MAX8997_MUIC_H_
-
-#include <power/power_chrg.h>
-
-/* MAX8997_MUIC_STATUS2 */
-#define MAX8997_MUIC_CHG_NO	0x00
-#define MAX8997_MUIC_CHG_USB	0x01
-#define MAX8997_MUIC_CHG_USB_D	0x02
-#define MAX8997_MUIC_CHG_TA	0x03
-#define MAX8997_MUIC_CHG_TA_500 0x04
-#define MAX8997_MUIC_CHG_TA_1A	0x05
-#define MAX8997_MUIC_CHG_MASK	0x07
-
-/* MAX 8997 MUIC registers */
-enum {
-	MAX8997_MUIC_ID         = 0x00,
-	MAX8997_MUIC_INT1	= 0x01,
-	MAX8997_MUIC_INT2	= 0x02,
-	MAX8997_MUIC_INT3	= 0x03,
-	MAX8997_MUIC_STATUS1	= 0x04,
-	MAX8997_MUIC_STATUS2	= 0x05,
-	MAX8997_MUIC_STATUS3	= 0x06,
-	MAX8997_MUIC_INTMASK1	= 0x07,
-	MAX8997_MUIC_INTMASK2	= 0x08,
-	MAX8997_MUIC_INTMASK3	= 0x09,
-	MAX8997_MUIC_CDETCTRL	= 0x0A,
-	MAX8997_MUIC_CONTROL1	= 0x0C,
-	MAX8997_MUIC_CONTROL2	= 0x0D,
-	MAX8997_MUIC_CONTROL3	= 0x0E,
-
-	MUIC_NUM_OF_REGS = 0x0F,
-};
-
-#define MAX8997_MUIC_I2C_ADDR	(0x4A >> 1)
-
-int power_muic_init(unsigned int bus);
-#endif /* __MAX8997_MUIC_H_ */
diff --git a/qemu/roms/u-boot/include/power/max8997_pmic.h b/qemu/roms/u-boot/include/power/max8997_pmic.h
deleted file mode 100644
index 74c5d5438..000000000
--- a/qemu/roms/u-boot/include/power/max8997_pmic.h
+++ /dev/null
@@ -1,198 +0,0 @@
-/*
- *  Copyright (C) 2011 Samsung Electronics
- *  Lukasz Majewski <l.majewski@samsung.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __MAX8997_PMIC_H_
-#define __MAX8997_PMIC_H_
-
-/* MAX 8997 registers */
-enum {
-	MAX8997_REG_PMIC_ID0	= 0x00,
-	MAX8997_REG_PMIC_ID1	= 0x01,
-	MAX8997_REG_INTSRC	= 0x02,
-	MAX8997_REG_INT1	= 0x03,
-	MAX8997_REG_INT2	= 0x04,
-	MAX8997_REG_INT3	= 0x05,
-	MAX8997_REG_INT4	= 0x06,
-
-	MAX8997_REG_INT1MSK	= 0x08,
-	MAX8997_REG_INT2MSK	= 0x09,
-	MAX8997_REG_INT3MSK	= 0x0a,
-	MAX8997_REG_INT4MSK	= 0x0b,
-
-	MAX8997_REG_STATUS1	= 0x0d,
-	MAX8997_REG_STATUS2	= 0x0e,
-	MAX8997_REG_STATUS3	= 0x0f,
-	MAX8997_REG_STATUS4	= 0x10,
-
-	MAX8997_REG_MAINCON1	= 0x13,
-	MAX8997_REG_MAINCON2	= 0x14,
-	MAX8997_REG_BUCKRAMP	= 0x15,
-
-	MAX8997_REG_BUCK1CTRL	= 0x18,
-	MAX8997_REG_BUCK1DVS1	= 0x19,
-	MAX8997_REG_BUCK1DVS2	= 0x1a,
-	MAX8997_REG_BUCK1DVS3	= 0x1b,
-	MAX8997_REG_BUCK1DVS4	= 0x1c,
-	MAX8997_REG_BUCK1DVS5	= 0x1d,
-	MAX8997_REG_BUCK1DVS6	= 0x1e,
-	MAX8997_REG_BUCK1DVS7	= 0x1f,
-	MAX8997_REG_BUCK1DVS8	= 0x20,
-	MAX8997_REG_BUCK2CTRL	= 0x21,
-	MAX8997_REG_BUCK2DVS1	= 0x22,
-	MAX8997_REG_BUCK2DVS2	= 0x23,
-	MAX8997_REG_BUCK2DVS3	= 0x24,
-	MAX8997_REG_BUCK2DVS4	= 0x25,
-	MAX8997_REG_BUCK2DVS5	= 0x26,
-	MAX8997_REG_BUCK2DVS6	= 0x27,
-	MAX8997_REG_BUCK2DVS7	= 0x28,
-	MAX8997_REG_BUCK2DVS8	= 0x29,
-	MAX8997_REG_BUCK3CTRL	= 0x2a,
-	MAX8997_REG_BUCK3DVS	= 0x2b,
-	MAX8997_REG_BUCK4CTRL	= 0x2c,
-	MAX8997_REG_BUCK4DVS	= 0x2d,
-	MAX8997_REG_BUCK5CTRL	= 0x2e,
-	MAX8997_REG_BUCK5DVS1	= 0x2f,
-	MAX8997_REG_BUCK5DVS2	= 0x30,
-	MAX8997_REG_BUCK5DVS3	= 0x31,
-	MAX8997_REG_BUCK5DVS4	= 0x32,
-	MAX8997_REG_BUCK5DVS5	= 0x33,
-	MAX8997_REG_BUCK5DVS6	= 0x34,
-	MAX8997_REG_BUCK5DVS7	= 0x35,
-	MAX8997_REG_BUCK5DVS8	= 0x36,
-	MAX8997_REG_BUCK6CTRL	= 0x37,
-	MAX8997_REG_BUCK6BPSKIPCTRL	= 0x38,
-	MAX8997_REG_BUCK7CTRL	= 0x39,
-	MAX8997_REG_BUCK7DVS	= 0x3a,
-	MAX8997_REG_LDO1CTRL	= 0x3b,
-	MAX8997_REG_LDO2CTRL	= 0x3c,
-	MAX8997_REG_LDO3CTRL	= 0x3d,
-	MAX8997_REG_LDO4CTRL	= 0x3e,
-	MAX8997_REG_LDO5CTRL	= 0x3f,
-	MAX8997_REG_LDO6CTRL	= 0x40,
-	MAX8997_REG_LDO7CTRL	= 0x41,
-	MAX8997_REG_LDO8CTRL	= 0x42,
-	MAX8997_REG_LDO9CTRL	= 0x43,
-	MAX8997_REG_LDO10CTRL	= 0x44,
-	MAX8997_REG_LDO11CTRL	= 0x45,
-	MAX8997_REG_LDO12CTRL	= 0x46,
-	MAX8997_REG_LDO13CTRL	= 0x47,
-	MAX8997_REG_LDO14CTRL	= 0x48,
-	MAX8997_REG_LDO15CTRL	= 0x49,
-	MAX8997_REG_LDO16CTRL	= 0x4a,
-	MAX8997_REG_LDO17CTRL	= 0x4b,
-	MAX8997_REG_LDO18CTRL	= 0x4c,
-	MAX8997_REG_LDO21CTRL	= 0x4d,
-
-	MAX8997_REG_MBCCTRL1	= 0x50,
-	MAX8997_REG_MBCCTRL2	= 0x51,
-	MAX8997_REG_MBCCTRL3	= 0x52,
-	MAX8997_REG_MBCCTRL4	= 0x53,
-	MAX8997_REG_MBCCTRL5	= 0x54,
-	MAX8997_REG_MBCCTRL6	= 0x55,
-	MAX8997_REG_OTPCGHCVS	= 0x56,
-
-	MAX8997_REG_SAFEOUTCTRL = 0x5a,
-
-	MAX8997_REG_LBCNFG1	= 0x5e,
-	MAX8997_REG_LBCNFG2	= 0x5f,
-	MAX8997_REG_BBCCTRL	= 0x60,
-
-	MAX8997_REG_FLASH1_CUR	= 0x63, /* 0x63 ~ 0x6e for FLASH */
-	MAX8997_REG_FLASH2_CUR	= 0x64,
-	MAX8997_REG_MOVIE_CUR	= 0x65,
-	MAX8997_REG_GSMB_CUR	= 0x66,
-	MAX8997_REG_BOOST_CNTL	= 0x67,
-	MAX8997_REG_LEN_CNTL	= 0x68,
-	MAX8997_REG_FLASH_CNTL	= 0x69,
-	MAX8997_REG_WDT_CNTL	= 0x6a,
-	MAX8997_REG_MAXFLASH1	= 0x6b,
-	MAX8997_REG_MAXFLASH2	= 0x6c,
-	MAX8997_REG_FLASHSTATUS	= 0x6d,
-	MAX8997_REG_FLASHSTATUSMASK	= 0x6e,
-
-	MAX8997_REG_GPIOCNTL1	= 0x70,
-	MAX8997_REG_GPIOCNTL2	= 0x71,
-	MAX8997_REG_GPIOCNTL3	= 0x72,
-	MAX8997_REG_GPIOCNTL4	= 0x73,
-	MAX8997_REG_GPIOCNTL5	= 0x74,
-	MAX8997_REG_GPIOCNTL6	= 0x75,
-	MAX8997_REG_GPIOCNTL7	= 0x76,
-	MAX8997_REG_GPIOCNTL8	= 0x77,
-	MAX8997_REG_GPIOCNTL9	= 0x78,
-	MAX8997_REG_GPIOCNTL10	= 0x79,
-	MAX8997_REG_GPIOCNTL11	= 0x7a,
-	MAX8997_REG_GPIOCNTL12	= 0x7b,
-
-	MAX8997_REG_LDO1CONFIG	= 0x80,
-	MAX8997_REG_LDO2CONFIG	= 0x81,
-	MAX8997_REG_LDO3CONFIG	= 0x82,
-	MAX8997_REG_LDO4CONFIG	= 0x83,
-	MAX8997_REG_LDO5CONFIG	= 0x84,
-	MAX8997_REG_LDO6CONFIG	= 0x85,
-	MAX8997_REG_LDO7CONFIG	= 0x86,
-	MAX8997_REG_LDO8CONFIG	= 0x87,
-	MAX8997_REG_LDO9CONFIG	= 0x88,
-	MAX8997_REG_LDO10CONFIG	= 0x89,
-	MAX8997_REG_LDO11CONFIG	= 0x8a,
-	MAX8997_REG_LDO12CONFIG	= 0x8b,
-	MAX8997_REG_LDO13CONFIG	= 0x8c,
-	MAX8997_REG_LDO14CONFIG	= 0x8d,
-	MAX8997_REG_LDO15CONFIG	= 0x8e,
-	MAX8997_REG_LDO16CONFIG	= 0x8f,
-	MAX8997_REG_LDO17CONFIG	= 0x90,
-	MAX8997_REG_LDO18CONFIG	= 0x91,
-	MAX8997_REG_LDO21CONFIG	= 0x92,
-
-	MAX8997_REG_DVSOKTIMER1	= 0x97,
-	MAX8997_REG_DVSOKTIMER2	= 0x98,
-	MAX8997_REG_DVSOKTIMER4	= 0x99,
-	MAX8997_REG_DVSOKTIMER5	= 0x9a,
-
-	PMIC_NUM_OF_REGS = 0x9b,
-};
-
-#define ACTDISSAFEO1 (1 << 4)
-#define ACTDISSAFEO2 (1 << 5)
-#define ENSAFEOUT1 (1 << 6)
-#define ENSAFEOUT2 (1 << 7)
-
-#define ENBUCK (1 << 0)
-#define ACTIVE_DISCHARGE (1 << 3)
-#define GNSLCT (1 << 2)
-#define LDO_ADE (1 << 1)
-#define SAFEOUT_4_85V 0x00
-#define SAFEOUT_4_90V 0x01
-#define SAFEOUT_4_95V 0x02
-#define SAFEOUT_3_30V 0x03
-
-/* Charger */
-enum {CHARGER_ENABLE, CHARGER_DISABLE};
-#define DETBAT                  (1 << 2)
-#define MBCICHFCSET             (1 << 4)
-#define MBCHOSTEN               (1 << 6)
-#define VCHGR_FC                (1 << 7)
-
-#define CHARGER_MIN_CURRENT 200
-#define CHARGER_MAX_CURRENT 950
-#define CHARGER_CURRENT_RESOLUTION 50
-
-#define MAX8997_I2C_ADDR        (0xCC >> 1)
-#define MAX8997_RTC_ADDR	(0x0C >> 1)
-#define MAX8997_MUIC_ADDR	(0x4A >> 1)
-#define MAX8997_FG_ADDR	(0x6C >> 1)
-
-enum {
-	LDO_OFF = 0,
-	LDO_ON = 1,
-
-	DIS_LDO = (0x00 << 6),
-	EN_LDO = (0x3 << 6),
-};
-
-#define MAX8997_LDO_MAX_VAL 0x3F
-unsigned char max8997_reg_ldo(int uV);
-#endif /* __MAX8997_PMIC_H_ */
diff --git a/qemu/roms/u-boot/include/power/max8998_pmic.h b/qemu/roms/u-boot/include/power/max8998_pmic.h
deleted file mode 100644
index 03d06e8a5..000000000
--- a/qemu/roms/u-boot/include/power/max8998_pmic.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- *  Copyright (C) 2011 Samsung Electronics
- *  Lukasz Majewski <l.majewski@samsung.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __MAX8998_PMIC_H_
-#define __MAX8998_PMIC_H_
-
-/* MAX 8998 registers */
-enum {
-	MAX8998_REG_IRQ1,
-	MAX8998_REG_IRQ2,
-	MAX8998_REG_IRQ3,
-	MAX8998_REG_IRQ4,
-	MAX8998_REG_IRQM1,
-	MAX8998_REG_IRQM2,
-	MAX8998_REG_IRQM3,
-	MAX8998_REG_IRQM4,
-	MAX8998_REG_STATUS1,
-	MAX8998_REG_STATUS2,
-	MAX8998_REG_STATUSM1,
-	MAX8998_REG_STATUSM2,
-	MAX8998_REG_CHGR1,
-	MAX8998_REG_CHGR2,
-	MAX8998_REG_LDO_ACTIVE_DISCHARGE1,
-	MAX8998_REG_LDO_ACTIVE_DISCHARGE2,
-	MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
-	MAX8998_REG_ONOFF1,
-	MAX8998_REG_ONOFF2,
-	MAX8998_REG_ONOFF3,
-	MAX8998_REG_ONOFF4,
-	MAX8998_REG_BUCK1_VOLTAGE1,
-	MAX8998_REG_BUCK1_VOLTAGE2,
-	MAX8998_REG_BUCK1_VOLTAGE3,
-	MAX8998_REG_BUCK1_VOLTAGE4,
-	MAX8998_REG_BUCK2_VOLTAGE1,
-	MAX8998_REG_BUCK2_VOLTAGE2,
-	MAX8998_REG_BUCK3,
-	MAX8998_REG_BUCK4,
-	MAX8998_REG_LDO2_LDO3,
-	MAX8998_REG_LDO4,
-	MAX8998_REG_LDO5,
-	MAX8998_REG_LDO6,
-	MAX8998_REG_LDO7,
-	MAX8998_REG_LDO8_LDO9,
-	MAX8998_REG_LDO10_LDO11,
-	MAX8998_REG_LDO12,
-	MAX8998_REG_LDO13,
-	MAX8998_REG_LDO14,
-	MAX8998_REG_LDO15,
-	MAX8998_REG_LDO16,
-	MAX8998_REG_LDO17,
-	MAX8998_REG_BKCHR,
-	MAX8998_REG_LBCNFG1,
-	MAX8998_REG_LBCNFG2,
-	PMIC_NUM_OF_REGS,
-};
-
-#define MAX8998_LDO3		(1 << 2)
-#define MAX8998_LDO4		(1 << 1)
-#define MAX8998_LDO7		(1 << 6)
-#define MAX8998_LDO8		(1 << 5)
-#define MAX8998_LDO17		(1 << 4)
-#define MAX8998_SAFEOUT1	(1 << 4)
-
-#define MAX8998_I2C_ADDR        (0xCC >> 1)
-
-enum { LDO_OFF, LDO_ON };
-
-#endif /* __MAX8998_PMIC_H_ */
diff --git a/qemu/roms/u-boot/include/power/pfuze100_pmic.h b/qemu/roms/u-boot/include/power/pfuze100_pmic.h
deleted file mode 100644
index 2a9032a1f..000000000
--- a/qemu/roms/u-boot/include/power/pfuze100_pmic.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- *  Copyright (C) 2014 Gateworks Corporation
- *  Tim Harvey <tharvey@gateworks.com>
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#ifndef __PFUZE100_PMIC_H_
-#define __PFUZE100_PMIC_H_
-
-/* PFUZE100 registers */
-enum {
-	PFUZE100_DEVICEID	= 0x00,
-	PFUZE100_REVID		= 0x03,
-	PFUZE100_FABID		= 0x04,
-
-	PFUZE100_SW1ABVOL	= 0x20,
-	PFUZE100_SW1CVOL	= 0x2e,
-	PFUZE100_SW2VOL		= 0x35,
-	PFUZE100_SW3AVOL	= 0x3c,
-	PFUZE100_SW3BVOL	= 0x43,
-	PFUZE100_SW4VOL		= 0x4a,
-	PFUZE100_SWBSTCON1	= 0x66,
-	PFUZE100_VREFDDRCON	= 0x6a,
-	PFUZE100_VSNVSVOL	= 0x6b,
-	PFUZE100_VGEN1VOL	= 0x6c,
-	PFUZE100_VGEN2VOL	= 0x6d,
-	PFUZE100_VGEN3VOL	= 0x6e,
-	PFUZE100_VGEN4VOL	= 0x6f,
-	PFUZE100_VGEN5VOL	= 0x70,
-	PFUZE100_VGEN6VOL	= 0x71,
-
-	PMIC_NUM_OF_REGS	= 0x7f,
-};
-
-/*
- * LDO Configuration
- */
-
-/* VGEN1/2 Voltage Configuration */
-#define LDOA_0_80V	0
-#define LDOA_0_85V	1
-#define LDOA_0_90V	2
-#define LDOA_0_95V	3
-#define LDOA_1_00V	4
-#define LDOA_1_05V	5
-#define LDOA_1_10V	6
-#define LDOA_1_15V	7
-#define LDOA_1_20V	8
-#define LDOA_1_25V	9
-#define LDOA_1_30V	10
-#define LDOA_1_35V	11
-#define LDOA_1_40V	12
-#define LDOA_1_45V	13
-#define LDOA_1_50V	14
-#define LDOA_1_55V	15
-
-/* VGEN3/4/5/6 Voltage Configuration */
-#define LDOB_1_80V	0
-#define LDOB_1_90V	1
-#define LDOB_2_00V	2
-#define LDOB_2_10V	3
-#define LDOB_2_20V	4
-#define LDOB_2_30V	5
-#define LDOB_2_40V	6
-#define LDOB_2_50V	7
-#define LDOB_2_60V	8
-#define LDOB_2_70V	9
-#define LDOB_2_80V	10
-#define LDOB_2_90V	11
-#define LDOB_3_00V	12
-#define LDOB_3_10V	13
-#define LDOB_3_20V	14
-#define LDOB_3_30V	15
-
-#define LDO_VOL_MASK	0xf
-#define LDO_EN		4
-
-/*
- * Boost Regulator
- */
-
-/* SWBST Output Voltage */
-#define SWBST_5_00V	0
-#define SWBST_5_05V	1
-#define SWBST_5_10V	2
-#define SWBST_5_15V	3
-
-#define SWBST_VOL_MASK	0x3
-#define SWBST_MODE_MASK	0x6
-#define SWBST_MODE_OFF	(2 << 0)
-#define SWBST_MODE_PFM	(2 << 1)
-#define SWBST_MODE_AUTO	(2 << 2)
-#define SWBST_MODE_APS	(2 << 3)
-
-#endif
diff --git a/qemu/roms/u-boot/include/power/pmic.h b/qemu/roms/u-boot/include/power/pmic.h
deleted file mode 100644
index 8f282dd2f..000000000
--- a/qemu/roms/u-boot/include/power/pmic.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- *  Copyright (C) 2011-2012 Samsung Electronics
- *  Lukasz Majewski <l.majewski@samsung.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __CORE_PMIC_H_
-#define __CORE_PMIC_H_
-
-#include <linux/list.h>
-#include <i2c.h>
-#include <power/power_chrg.h>
-
-enum { PMIC_I2C, PMIC_SPI, PMIC_NONE};
-enum { I2C_PMIC, I2C_NUM, };
-enum { PMIC_READ, PMIC_WRITE, };
-enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, };
-
-struct p_i2c {
-	unsigned char addr;
-	unsigned char *buf;
-	unsigned char tx_num;
-};
-
-struct p_spi {
-	unsigned int cs;
-	unsigned int mode;
-	unsigned int bitlen;
-	unsigned int clk;
-	unsigned int flags;
-	u32 (*prepare_tx)(u32 reg, u32 *val, u32 write);
-};
-
-struct pmic;
-struct power_fg {
-	int (*fg_battery_check) (struct pmic *p, struct pmic *bat);
-	int (*fg_battery_update) (struct pmic *p, struct pmic *bat);
-};
-
-struct power_chrg {
-	int (*chrg_type) (struct pmic *p);
-	int (*chrg_bat_present) (struct pmic *p);
-	int (*chrg_state) (struct pmic *p, int state, int current);
-};
-
-struct power_battery {
-	struct battery *bat;
-	int (*battery_init) (struct pmic *bat, struct pmic *p1,
-			     struct pmic *p2, struct pmic *p3);
-	int (*battery_charge) (struct pmic *bat);
-	/* Keep info about power devices involved with battery operation */
-	struct pmic *chrg, *fg, *muic;
-};
-
-struct pmic {
-	const char *name;
-	unsigned char bus;
-	unsigned char interface;
-	unsigned char sensor_byte_order;
-	unsigned int number_of_regs;
-	union hw {
-		struct p_i2c i2c;
-		struct p_spi spi;
-	} hw;
-
-	void (*low_power_mode) (void);
-	struct power_battery *pbat;
-	struct power_chrg *chrg;
-	struct power_fg *fg;
-
-	struct pmic *parent;
-	struct list_head list;
-};
-
-int pmic_init(unsigned char bus);
-int pmic_dialog_init(unsigned char bus);
-int check_reg(struct pmic *p, u32 reg);
-struct pmic *pmic_alloc(void);
-struct pmic *pmic_get(const char *s);
-int pmic_probe(struct pmic *p);
-int pmic_reg_read(struct pmic *p, u32 reg, u32 *val);
-int pmic_reg_write(struct pmic *p, u32 reg, u32 val);
-int pmic_set_output(struct pmic *p, u32 reg, int ldo, int on);
-
-#define pmic_i2c_addr (p->hw.i2c.addr)
-#define pmic_i2c_tx_num (p->hw.i2c.tx_num)
-
-#define pmic_spi_bitlen (p->hw.spi.bitlen)
-#define pmic_spi_flags (p->hw.spi.flags)
-
-#endif /* __CORE_PMIC_H_ */
diff --git a/qemu/roms/u-boot/include/power/power_chrg.h b/qemu/roms/u-boot/include/power/power_chrg.h
deleted file mode 100644
index 8fa5c66ad..000000000
--- a/qemu/roms/u-boot/include/power/power_chrg.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- *  Copyright (C) 2012 Samsung Electronics
- *  Lukasz Majewski <l.majewski@samsung.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __POWER_CHARGER_H_
-#define __POWER_CHARGER_H_
-
-/* Type of available chargers */
-enum {
-	CHARGER_NO = 0,
-	CHARGER_TA,
-	CHARGER_USB,
-	CHARGER_TA_500,
-	CHARGER_UNKNOWN,
-};
-
-enum {
-	UNKNOWN,
-	EXT_SOURCE,
-	CHARGE,
-	NORMAL,
-};
-
-#endif /* __POWER_CHARGER_H_ */
diff --git a/qemu/roms/u-boot/include/power/tps65217.h b/qemu/roms/u-boot/include/power/tps65217.h
deleted file mode 100644
index 297c4cbd9..000000000
--- a/qemu/roms/u-boot/include/power/tps65217.h
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * (C) Copyright 2011-2013
- * Texas Instruments, <www.ti.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * For more details, please see the TRM at http://www.ti.com/product/tps65217a
- */
-
-#ifndef __POWER_TPS65217_H__
-#define __POWER_TPS65217_H__
-
-/* I2C chip address */
-#define TPS65217_CHIP_PM			0x24
-
-/* Registers */
-enum {
-	TPS65217_CHIPID				= 0x00,
-	TPS65217_POWER_PATH,
-	TPS65217_INTERRUPT,
-	TPS65217_CHGCONFIG0,
-	TPS65217_CHGCONFIG1,
-	TPS65217_CHGCONFIG2,
-	TPS65217_CHGCONFIG3,
-	TPS65217_WLEDCTRL1,
-	TPS65217_WLEDCTRL2,
-	TPS65217_MUXCTRL,
-	TPS65217_STATUS,
-	TPS65217_PASSWORD,
-	TPS65217_PGOOD,
-	TPS65217_DEFPG,
-	TPS65217_DEFDCDC1,
-	TPS65217_DEFDCDC2,
-	TPS65217_DEFDCDC3,
-	TPS65217_DEFSLEW,
-	TPS65217_DEFLDO1,
-	TPS65217_DEFLDO2,
-	TPS65217_DEFLS1,
-	TPS65217_DEFLS2,
-	TPS65217_ENABLE,
-	TPS65217_DEFUVLO,
-	TPS65217_SEQ1,
-	TPS65217_SEQ2,
-	TPS65217_SEQ3,
-	TPS65217_SEQ4,
-	TPS65217_SEQ5,
-	TPS65217_SEQ6,
-	TPS65217_PMIC_NUM_OF_REGS,
-};
-
-#define TPS65217_PROT_LEVEL_NONE		0x00
-#define TPS65217_PROT_LEVEL_1			0x01
-#define TPS65217_PROT_LEVEL_2			0x02
-
-#define TPS65217_PASSWORD_LOCK_FOR_WRITE	0x00
-#define TPS65217_PASSWORD_UNLOCK		0x7D
-
-#define TPS65217_DCDC_GO			0x80
-
-#define TPS65217_MASK_ALL_BITS			0xFF
-
-#define TPS65217_USB_INPUT_CUR_LIMIT_MASK	0x03
-#define TPS65217_USB_INPUT_CUR_LIMIT_100MA	0x00
-#define TPS65217_USB_INPUT_CUR_LIMIT_500MA	0x01
-#define TPS65217_USB_INPUT_CUR_LIMIT_1300MA	0x02
-#define TPS65217_USB_INPUT_CUR_LIMIT_1800MA	0x03
-
-#define TPS65217_DCDC_VOLT_SEL_1125MV		0x09
-#define TPS65217_DCDC_VOLT_SEL_1275MV		0x0F
-#define TPS65217_DCDC_VOLT_SEL_1325MV		0x11
-
-#define TPS65217_LDO_MASK			0x1F
-#define TPS65217_LDO_VOLTAGE_OUT_1_8		0x06
-#define TPS65217_LDO_VOLTAGE_OUT_3_3		0x1F
-
-#define TPS65217_PWR_SRC_USB_BITMASK		0x4
-#define TPS65217_PWR_SRC_AC_BITMASK		0x8
-
-int tps65217_reg_read(uchar src_reg, uchar *src_val);
-int tps65217_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val,
-		       uchar mask);
-int tps65217_voltage_update(uchar dc_cntrl_reg, uchar volt_sel);
-#endif	/* __POWER_TPS65217_H__ */
diff --git a/qemu/roms/u-boot/include/power/tps65910.h b/qemu/roms/u-boot/include/power/tps65910.h
deleted file mode 100644
index ca8430145..000000000
--- a/qemu/roms/u-boot/include/power/tps65910.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * (C) Copyright 2011-2013
- * Texas Instruments, <www.ti.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * For more details, please see the TRM at http://www.ti.com/product/tps65910
- */
-#ifndef __POWER_TPS65910_H__
-#define __POWER_TPS65910_H__
-
-#define MPU     0
-#define CORE    1
-
-#define TPS65910_SR_I2C_ADDR				0x12
-#define TPS65910_CTRL_I2C_ADDR				0x2D
-
-/* PMIC Register offsets */
-enum {
-	TPS65910_VDD1_REG				= 0x21,
-	TPS65910_VDD1_OP_REG				= 0x22,
-	TPS65910_VDD2_REG				= 0x24,
-	TPS65910_VDD2_OP_REG				= 0x25,
-	TPS65910_DEVCTRL_REG				= 0x3F,
-};
-
-/* VDD2 & VDD1 control register (VDD2_REG & VDD1_REG) */
-#define TPS65910_VGAIN_SEL_MASK				(0x3 << 6)
-#define TPS65910_ILMAX_MASK				(0x1 << 5)
-#define TPS65910_TSTEP_MASK				(0x7 << 2)
-#define TPS65910_ST_MASK				(0x3)
-
-#define TPS65910_REG_VGAIN_SEL_X1			(0x0 << 6)
-#define TPS65910_REG_VGAIN_SEL_X1_0			(0x1 << 6)
-#define TPS65910_REG_VGAIN_SEL_X3			(0x2 << 6)
-#define TPS65910_REG_VGAIN_SEL_X4			(0x3 << 6)
-
-#define TPS65910_REG_ILMAX_1_0_A			(0x0 << 5)
-#define TPS65910_REG_ILMAX_1_5_A			(0x1 << 5)
-
-#define TPS65910_REG_TSTEP_				(0x0 << 2)
-#define TPS65910_REG_TSTEP_12_5				(0x1 << 2)
-#define TPS65910_REG_TSTEP_9_4				(0x2 << 2)
-#define TPS65910_REG_TSTEP_7_5				(0x3 << 2)
-#define TPS65910_REG_TSTEP_6_25				(0x4 << 2)
-#define TPS65910_REG_TSTEP_4_7				(0x5 << 2)
-#define TPS65910_REG_TSTEP_3_12				(0x6 << 2)
-#define TPS65910_REG_TSTEP_2_5				(0x7 << 2)
-
-#define TPS65910_REG_ST_OFF				(0x0)
-#define TPS65910_REG_ST_ON_HI_POW			(0x1)
-#define TPS65910_REG_ST_OFF_1				(0x2)
-#define TPS65910_REG_ST_ON_LOW_POW			(0x3)
-
-
-/* VDD2 & VDD1 voltage selection register. (VDD2_OP_REG & VDD1_OP_REG) */
-#define TPS65910_OP_REG_SEL				(0x7F)
-
-#define TPS65910_OP_REG_CMD_MASK			(0x1 << 7)
-#define TPS65910_OP_REG_CMD_OP				(0x0 << 7)
-#define TPS65910_OP_REG_CMD_SR				(0x1 << 7)
-
-#define TPS65910_OP_REG_SEL_MASK			(0x7F)
-#define TPS65910_OP_REG_SEL_0_9_5			(0x1F)	/* 0.9500 V */
-#define TPS65910_OP_REG_SEL_1_1_3			(0x2E)	/* 1.1375 V */
-#define TPS65910_OP_REG_SEL_1_2_0			(0x33)	/* 1.2000 V */
-#define TPS65910_OP_REG_SEL_1_2_6			(0x38)	/* 1.2625 V */
-#define TPS65910_OP_REG_SEL_1_3_2_5			(0x3D)	/* 1.3250 V */
-
-/* Device control register . (DEVCTRL_REG) */
-#define TPS65910_DEVCTRL_REG_SR_CTL_I2C_MASK		(0x1 << 4)
-#define TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_SR_I2C	(0x0 << 4)
-#define TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C	(0x1 << 4)
-
-int tps65910_set_i2c_control(void);
-int tps65910_voltage_update(unsigned int module, unsigned char vddx_op_vol_sel);
-#endif	/* __POWER_TPS65910_H__ */