diff options
| author |   RajithaY <rajithax.yerrumsetty@intel.com> | 2017-04-25 03:31:15 -0700 |
|---|---|---|
| committer | Rajitha Yerrumchetty <rajithax.yerrumsetty@intel.com> | 2017-05-22 06:48:08 +0000 |
| commit | bb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch) | |
| tree | ca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/roms/u-boot/include/mpc85xx.h | |
| parent | a14b48d18a9ed03ec191cf16b162206998a895ce (diff) | |
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/include/mpc85xx.h')
| -rw-r--r-- | qemu/roms/u-boot/include/mpc85xx.h | 71 |
1 files changed, 0 insertions, 71 deletions
diff --git a/qemu/roms/u-boot/include/mpc85xx.h b/qemu/roms/u-boot/include/mpc85xx.h deleted file mode 100644 index 11d898527..000000000 --- a/qemu/roms/u-boot/include/mpc85xx.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * Copyright 2004, 2007 Freescale Semiconductor. - * Copyright(c) 2003 Motorola Inc. - */ - -#ifndef __MPC85xx_H__ -#define __MPC85xx_H__ - -/* define for common ppc_asm.tmpl */ -#define EXC_OFF_SYS_RESET 0x100 /* System reset */ -#define _START_OFFSET 0 - -#if defined(CONFIG_E500) -#include <e500.h> -#endif - -/* - * SCCR - System Clock Control Register, 9-8 - */ -#define SCCR_CLPD 0x00000004 /* CPM Low Power Disable */ -#define SCCR_DFBRG_MSK 0x00000003 /* Division by BRGCLK Mask */ -#define SCCR_DFBRG_SHIFT 0 - -#define SCCR_DFBRG00 0x00000000 /* BRGCLK division by 4 */ -#define SCCR_DFBRG01 0x00000001 /* BRGCLK div by 16 (normal) */ -#define SCCR_DFBRG10 0x00000002 /* BRGCLK division by 64 */ -#define SCCR_DFBRG11 0x00000003 /* BRGCLK division by 256 */ - -/* - * Define default values for some CCSR macros to make header files cleaner* - * - * To completely disable CCSR relocation in a board header file, define - * CONFIG_SYS_CCSR_DO_NOT_RELOCATE. This will force CONFIG_SYS_CCSRBAR_PHYS - * to a value that is the same as CONFIG_SYS_CCSRBAR. - */ - -#ifdef CONFIG_SYS_CCSRBAR_PHYS -#error "Do not define CONFIG_SYS_CCSRBAR_PHYS directly. Use \ -CONFIG_SYS_CCSRBAR_PHYS_LOW and/or CONFIG_SYS_CCSRBAR_PHYS_HIGH instead." -#endif - -#ifdef CONFIG_SYS_CCSR_DO_NOT_RELOCATE -#undef CONFIG_SYS_CCSRBAR_PHYS_HIGH -#undef CONFIG_SYS_CCSRBAR_PHYS_LOW -#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 -#endif - -#ifndef CONFIG_SYS_CCSRBAR -#define CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_DEFAULT -#endif - -#ifndef CONFIG_SYS_CCSRBAR_PHYS_HIGH -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0xf -#else -#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 -#endif -#endif - -#ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR_DEFAULT -#endif - -#define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \ - CONFIG_SYS_CCSRBAR_PHYS_LOW) - -#ifndef CONFIG_SYS_IMMR -#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR -#endif - -#endif /* __MPC85xx_H__ */ |