diff options
| author |   RajithaY <rajithax.yerrumsetty@intel.com> | 2017-04-25 03:31:15 -0700 |
|---|---|---|
| committer | Rajitha Yerrumchetty <rajithax.yerrumsetty@intel.com> | 2017-05-22 06:48:08 +0000 |
| commit | bb756eebdac6fd24e8919e2c43f7d2c8c4091f59 (patch) | |
| tree | ca11e03542edf2d8f631efeca5e1626d211107e3 /qemu/roms/u-boot/include/linux/mtd | |
| parent | a14b48d18a9ed03ec191cf16b162206998a895ce (diff) | |
Adding qemu as a submodule of KVMFORNFV
This Patch includes the changes to add qemu as a submodule to
kvmfornfv repo and make use of the updated latest qemu for the
execution of all testcase
Change-Id: I1280af507a857675c7f81d30c95255635667bdd7
Signed-off-by:RajithaY<rajithax.yerrumsetty@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/include/linux/mtd')
19 files changed, 0 insertions, 2951 deletions
diff --git a/qemu/roms/u-boot/include/linux/mtd/bbm.h b/qemu/roms/u-boot/include/linux/mtd/bbm.h deleted file mode 100644 index 25a3d3a3d..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/bbm.h +++ /dev/null @@ -1,161 +0,0 @@ -/* - * linux/include/linux/mtd/bbm.h - * - * NAND family Bad Block Management (BBM) header file - * - Bad Block Table (BBT) implementation - * - * Copyright (c) 2005-2007 Samsung Electronics - * Kyungmin Park <kyungmin.park@samsung.com> - * - * Copyright (c) 2000-2005 - * Thomas Gleixner <tglx@linuxtronix.de> - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __LINUX_MTD_BBM_H -#define __LINUX_MTD_BBM_H - -/* The maximum number of NAND chips in an array */ -#ifndef CONFIG_SYS_NAND_MAX_CHIPS -#define CONFIG_SYS_NAND_MAX_CHIPS 1 -#endif - -/** - * struct nand_bbt_descr - bad block table descriptor - * @param options options for this descriptor - * @param pages the page(s) where we find the bbt, used with - * option BBT_ABSPAGE when bbt is searched, - * then we store the found bbts pages here. - * Its an array and supports up to 8 chips now - * @param offs offset of the pattern in the oob area of the page - * @param veroffs offset of the bbt version counter in the oob are of the page - * @param version version read from the bbt page during scan - * @param len length of the pattern, if 0 no pattern check is performed - * @param maxblocks maximum number of blocks to search for a bbt. This number of - * blocks is reserved at the end of the device - * where the tables are written. - * @param reserved_block_code if non-0, this pattern denotes a reserved - * (rather than bad) block in the stored bbt - * @param pattern pattern to identify bad block table or factory marked - * good / bad blocks, can be NULL, if len = 0 - * - * Descriptor for the bad block table marker and the descriptor for the - * pattern which identifies good and bad blocks. The assumption is made - * that the pattern and the version count are always located in the oob area - * of the first block. - */ -struct nand_bbt_descr { - int options; - int pages[CONFIG_SYS_NAND_MAX_CHIPS]; - int offs; - int veroffs; - uint8_t version[CONFIG_SYS_NAND_MAX_CHIPS]; - int len; - int maxblocks; - int reserved_block_code; - uint8_t *pattern; -}; - -/* Options for the bad block table descriptors */ - -/* The number of bits used per block in the bbt on the device */ -#define NAND_BBT_NRBITS_MSK 0x0000000F -#define NAND_BBT_1BIT 0x00000001 -#define NAND_BBT_2BIT 0x00000002 -#define NAND_BBT_4BIT 0x00000004 -#define NAND_BBT_8BIT 0x00000008 -/* The bad block table is in the last good block of the device */ -#define NAND_BBT_LASTBLOCK 0x00000010 -/* The bbt is at the given page, else we must scan for the bbt */ -#define NAND_BBT_ABSPAGE 0x00000020 -/* bbt is stored per chip on multichip devices */ -#define NAND_BBT_PERCHIP 0x00000080 -/* bbt has a version counter at offset veroffs */ -#define NAND_BBT_VERSION 0x00000100 -/* Create a bbt if none exists */ -#define NAND_BBT_CREATE 0x00000200 -/* - * Create an empty BBT with no vendor information. Vendor's information may be - * unavailable, for example, if the NAND controller has a different data and OOB - * layout or if this information is already purged. Must be used in conjunction - * with NAND_BBT_CREATE. - */ -#define NAND_BBT_CREATE_EMPTY 0x00000400 -/* Search good / bad pattern through all pages of a block */ -#define NAND_BBT_SCANALLPAGES 0x00000800 -/* Scan block empty during good / bad block scan */ -#define NAND_BBT_SCANEMPTY 0x00001000 -/* Write bbt if neccecary */ -#define NAND_BBT_WRITE 0x00002000 -/* Read and write back block contents when writing bbt */ -#define NAND_BBT_SAVECONTENT 0x00004000 -/* Search good / bad pattern on the first and the second page */ -#define NAND_BBT_SCAN2NDPAGE 0x00008000 -/* Search good / bad pattern on the last page of the eraseblock */ -#define NAND_BBT_SCANLASTPAGE 0x00010000 -/* - * Use a flash based bad block table. By default, OOB identifier is saved in - * OOB area. This option is passed to the default bad block table function. - */ -#define NAND_BBT_USE_FLASH 0x00020000 -/* - * Do not store flash based bad block table marker in the OOB area; store it - * in-band. - */ -#define NAND_BBT_NO_OOB 0x00040000 -/* - * Do not write new bad block markers to OOB; useful, e.g., when ECC covers - * entire spare area. Must be used with NAND_BBT_USE_FLASH. - */ -#define NAND_BBT_NO_OOB_BBM 0x00080000 - -/* - * Flag set by nand_create_default_bbt_descr(), marking that the nand_bbt_descr - * was allocated dynamicaly and must be freed in nand_release(). Has no meaning - * in nand_chip.bbt_options. - */ -#define NAND_BBT_DYNAMICSTRUCT 0x80000000 - -/* The maximum number of blocks to scan for a bbt */ -#define NAND_BBT_SCAN_MAXBLOCKS 4 - -/* - * Constants for oob configuration - */ -#define ONENAND_BADBLOCK_POS 0 - -/* - * Bad block scanning errors - */ -#define ONENAND_BBT_READ_ERROR 1 -#define ONENAND_BBT_READ_ECC_ERROR 2 -#define ONENAND_BBT_READ_FATAL_ERROR 4 - -/** - * struct bbt_info - [GENERIC] Bad Block Table data structure - * @param bbt_erase_shift [INTERN] number of address bits in a bbt entry - * @param badblockpos [INTERN] position of the bad block marker in the oob area - * @param bbt [INTERN] bad block table pointer - * @param badblock_pattern [REPLACEABLE] bad block scan pattern used for initial bad block scan - * @param priv [OPTIONAL] pointer to private bbm date - */ -struct bbm_info { - int bbt_erase_shift; - int badblockpos; - int options; - - uint8_t *bbt; - - int (*isbad_bbt) (struct mtd_info * mtd, loff_t ofs, int allowbbt); - - /* TODO Add more NAND specific fileds */ - struct nand_bbt_descr *badblock_pattern; - - void *priv; -}; - -/* OneNAND BBT interface */ -extern int onenand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd); -extern int onenand_default_bbt (struct mtd_info *mtd); - -#endif /* __LINUX_MTD_BBM_H */ diff --git a/qemu/roms/u-boot/include/linux/mtd/concat.h b/qemu/roms/u-boot/include/linux/mtd/concat.h deleted file mode 100644 index c92b4ddc9..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/concat.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * MTD device concatenation layer definitions - * - * (C) 2002 Robert Kaiser <rkaiser@sysgo.de> - * - * This code is GPL - */ - -#ifndef MTD_CONCAT_H -#define MTD_CONCAT_H - -struct mtd_info *mtd_concat_create( - struct mtd_info *subdev[], /* subdevices to concatenate */ - int num_devs, /* number of subdevices */ - const char *name); /* name for the new device */ - -void mtd_concat_destroy(struct mtd_info *mtd); - -#endif diff --git a/qemu/roms/u-boot/include/linux/mtd/doc2000.h b/qemu/roms/u-boot/include/linux/mtd/doc2000.h deleted file mode 100644 index ba29d53ec..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/doc2000.h +++ /dev/null @@ -1,207 +0,0 @@ -/* - * Linux driver for Disk-On-Chip devices - * - * Copyright (C) 1999 Machine Vision Holdings, Inc. - * Copyright (C) 2001-2003 David Woodhouse <dwmw2@infradead.org> - * Copyright (C) 2002-2003 Greg Ungerer <gerg@snapgear.com> - * Copyright (C) 2002-2003 SnapGear Inc - * - * Released under GPL - */ - -#ifndef __MTD_DOC2000_H__ -#define __MTD_DOC2000_H__ - -#include <linux/mtd/mtd.h> -#if 0 -#include <linux/mutex.h> -#endif - -#define DoC_Sig1 0 -#define DoC_Sig2 1 - -#define DoC_ChipID 0x1000 -#define DoC_DOCStatus 0x1001 -#define DoC_DOCControl 0x1002 -#define DoC_FloorSelect 0x1003 -#define DoC_CDSNControl 0x1004 -#define DoC_CDSNDeviceSelect 0x1005 -#define DoC_ECCConf 0x1006 -#define DoC_2k_ECCStatus 0x1007 - -#define DoC_CDSNSlowIO 0x100d -#define DoC_ECCSyndrome0 0x1010 -#define DoC_ECCSyndrome1 0x1011 -#define DoC_ECCSyndrome2 0x1012 -#define DoC_ECCSyndrome3 0x1013 -#define DoC_ECCSyndrome4 0x1014 -#define DoC_ECCSyndrome5 0x1015 -#define DoC_AliasResolution 0x101b -#define DoC_ConfigInput 0x101c -#define DoC_ReadPipeInit 0x101d -#define DoC_WritePipeTerm 0x101e -#define DoC_LastDataRead 0x101f -#define DoC_NOP 0x1020 - -#define DoC_Mil_CDSN_IO 0x0800 -#define DoC_2k_CDSN_IO 0x1800 - -#define DoC_Mplus_NOP 0x1002 -#define DoC_Mplus_AliasResolution 0x1004 -#define DoC_Mplus_DOCControl 0x1006 -#define DoC_Mplus_AccessStatus 0x1008 -#define DoC_Mplus_DeviceSelect 0x1008 -#define DoC_Mplus_Configuration 0x100a -#define DoC_Mplus_OutputControl 0x100c -#define DoC_Mplus_FlashControl 0x1020 -#define DoC_Mplus_FlashSelect 0x1022 -#define DoC_Mplus_FlashCmd 0x1024 -#define DoC_Mplus_FlashAddress 0x1026 -#define DoC_Mplus_FlashData0 0x1028 -#define DoC_Mplus_FlashData1 0x1029 -#define DoC_Mplus_ReadPipeInit 0x102a -#define DoC_Mplus_LastDataRead 0x102c -#define DoC_Mplus_LastDataRead1 0x102d -#define DoC_Mplus_WritePipeTerm 0x102e -#define DoC_Mplus_ECCSyndrome0 0x1040 -#define DoC_Mplus_ECCSyndrome1 0x1041 -#define DoC_Mplus_ECCSyndrome2 0x1042 -#define DoC_Mplus_ECCSyndrome3 0x1043 -#define DoC_Mplus_ECCSyndrome4 0x1044 -#define DoC_Mplus_ECCSyndrome5 0x1045 -#define DoC_Mplus_ECCConf 0x1046 -#define DoC_Mplus_Toggle 0x1046 -#define DoC_Mplus_DownloadStatus 0x1074 -#define DoC_Mplus_CtrlConfirm 0x1076 -#define DoC_Mplus_Power 0x1fff - -/* How to access the device? - * On ARM, it'll be mmap'd directly with 32-bit wide accesses. - * On PPC, it's mmap'd and 16-bit wide. - * Others use readb/writeb - */ -#if defined(__arm__) -#define ReadDOC_(adr, reg) ((unsigned char)(*(volatile __u32 *)(((unsigned long)adr)+((reg)<<2)))) -#define WriteDOC_(d, adr, reg) do{ *(volatile __u32 *)(((unsigned long)adr)+((reg)<<2)) = (__u32)d; wmb();} while(0) -#define DOC_IOREMAP_LEN 0x8000 -#elif defined(__ppc__) -#define ReadDOC_(adr, reg) ((unsigned char)(*(volatile __u16 *)(((unsigned long)adr)+((reg)<<1)))) -#define WriteDOC_(d, adr, reg) do{ *(volatile __u16 *)(((unsigned long)adr)+((reg)<<1)) = (__u16)d; wmb();} while(0) -#define DOC_IOREMAP_LEN 0x4000 -#else -#define ReadDOC_(adr, reg) readb((void __iomem *)(adr) + (reg)) -#define WriteDOC_(d, adr, reg) writeb(d, (void __iomem *)(adr) + (reg)) -#define DOC_IOREMAP_LEN 0x2000 - -#endif - -#if defined(__i386__) || defined(__x86_64__) -#define USE_MEMCPY -#endif - -/* These are provided to directly use the DoC_xxx defines */ -#define ReadDOC(adr, reg) ReadDOC_(adr,DoC_##reg) -#define WriteDOC(d, adr, reg) WriteDOC_(d,adr,DoC_##reg) - -#define DOC_MODE_RESET 0 -#define DOC_MODE_NORMAL 1 -#define DOC_MODE_RESERVED1 2 -#define DOC_MODE_RESERVED2 3 - -#define DOC_MODE_CLR_ERR 0x80 -#define DOC_MODE_RST_LAT 0x10 -#define DOC_MODE_BDECT 0x08 -#define DOC_MODE_MDWREN 0x04 - -#define DOC_ChipID_Doc2k 0x20 -#define DOC_ChipID_Doc2kTSOP 0x21 /* internal number for MTD */ -#define DOC_ChipID_DocMil 0x30 -#define DOC_ChipID_DocMilPlus32 0x40 -#define DOC_ChipID_DocMilPlus16 0x41 - -#define CDSN_CTRL_FR_B 0x80 -#define CDSN_CTRL_FR_B0 0x40 -#define CDSN_CTRL_FR_B1 0x80 - -#define CDSN_CTRL_ECC_IO 0x20 -#define CDSN_CTRL_FLASH_IO 0x10 -#define CDSN_CTRL_WP 0x08 -#define CDSN_CTRL_ALE 0x04 -#define CDSN_CTRL_CLE 0x02 -#define CDSN_CTRL_CE 0x01 - -#define DOC_ECC_RESET 0 -#define DOC_ECC_ERROR 0x80 -#define DOC_ECC_RW 0x20 -#define DOC_ECC__EN 0x08 -#define DOC_TOGGLE_BIT 0x04 -#define DOC_ECC_RESV 0x02 -#define DOC_ECC_IGNORE 0x01 - -#define DOC_FLASH_CE 0x80 -#define DOC_FLASH_WP 0x40 -#define DOC_FLASH_BANK 0x02 - -/* We have to also set the reserved bit 1 for enable */ -#define DOC_ECC_EN (DOC_ECC__EN | DOC_ECC_RESV) -#define DOC_ECC_DIS (DOC_ECC_RESV) - -struct Nand { - char floor, chip; - unsigned long curadr; - unsigned char curmode; - /* Also some erase/write/pipeline info when we get that far */ -}; - -#define MAX_FLOORS 4 -#define MAX_CHIPS 4 - -#define MAX_FLOORS_MIL 1 -#define MAX_CHIPS_MIL 1 - -#define MAX_FLOORS_MPLUS 2 -#define MAX_CHIPS_MPLUS 1 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -struct DiskOnChip { - unsigned long physadr; - void __iomem *virtadr; - unsigned long totlen; - unsigned char ChipID; /* Type of DiskOnChip */ - int ioreg; - - unsigned long mfr; /* Flash IDs - only one type of flash per device */ - unsigned long id; - int chipshift; - char page256; - char pageadrlen; - char interleave; /* Internal interleaving - Millennium Plus style */ - unsigned long erasesize; - - int curfloor; - int curchip; - - int numchips; - struct Nand *chips; - struct mtd_info *nextdoc; -/* XXX U-BOOT XXX */ -#if 0 - struct mutex lock; -#endif -}; - -int doc_decode_ecc(unsigned char sector[512], unsigned char ecc1[6]); - -/* XXX U-BOOT XXX */ -#if 1 -/* - * NAND Flash Manufacturer ID Codes - */ -#define NAND_MFR_TOSHIBA 0x98 -#define NAND_MFR_SAMSUNG 0xec -#endif - -#endif /* __MTD_DOC2000_H__ */ diff --git a/qemu/roms/u-boot/include/linux/mtd/docg4.h b/qemu/roms/u-boot/include/linux/mtd/docg4.h deleted file mode 100644 index 741fc0db4..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/docg4.h +++ /dev/null @@ -1,132 +0,0 @@ -/* - * Copyright (C) 2013 Mike Dunn <mikedunn@newsguy.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __DOCG4_H__ -#define __DOCG4_H__ - -#include <common.h> -#include <linux/mtd/nand.h> - -extern int docg4_nand_init(struct mtd_info *mtd, - struct nand_chip *nand, int devnum); - -/* SPL-related definitions */ -#define DOCG4_IPL_LOAD_BLOCK_COUNT 2 /* number of blocks that IPL loads */ -#define DOCG4_BLOCK_CAPACITY_SPL 0x10000 /* reliable mode; redundant pages */ - -#define DOC_IOSPACE_DATA 0x0800 - -/* register offsets */ -#define DOC_CHIPID 0x1000 -#define DOC_DEVICESELECT 0x100a -#define DOC_ASICMODE 0x100c -#define DOC_DATAEND 0x101e -#define DOC_NOP 0x103e - -#define DOC_FLASHSEQUENCE 0x1032 -#define DOC_FLASHCOMMAND 0x1034 -#define DOC_FLASHADDRESS 0x1036 -#define DOC_FLASHCONTROL 0x1038 -#define DOC_ECCCONF0 0x1040 -#define DOC_ECCCONF1 0x1042 -#define DOC_HAMMINGPARITY 0x1046 -#define DOC_BCH_SYNDROM(idx) (0x1048 + idx) - -#define DOC_ASICMODECONFIRM 0x1072 -#define DOC_CHIPID_INV 0x1074 -#define DOC_POWERMODE 0x107c - -#define DOCG4_MYSTERY_REG 0x1050 - -/* apparently used only to write oob bytes 6 and 7 */ -#define DOCG4_OOB_6_7 0x1052 - -/* DOC_FLASHSEQUENCE register commands */ -#define DOC_SEQ_RESET 0x00 -#define DOCG4_SEQ_PAGE_READ 0x03 -#define DOCG4_SEQ_FLUSH 0x29 -#define DOCG4_SEQ_PAGEWRITE 0x16 -#define DOCG4_SEQ_PAGEPROG 0x1e -#define DOCG4_SEQ_BLOCKERASE 0x24 - -/* DOC_FLASHCOMMAND register commands */ -#define DOCG4_CMD_PAGE_READ 0x00 -#define DOC_CMD_ERASECYCLE2 0xd0 -#define DOCG4_CMD_FLUSH 0x70 -#define DOCG4_CMD_READ2 0x30 -#define DOC_CMD_PROG_BLOCK_ADDR 0x60 -#define DOCG4_CMD_PAGEWRITE 0x80 -#define DOC_CMD_PROG_CYCLE2 0x10 -#define DOC_CMD_RESET 0xff - -/* DOC_POWERMODE register bits */ -#define DOC_POWERDOWN_READY 0x80 - -/* DOC_FLASHCONTROL register bits */ -#define DOC_CTRL_CE 0x10 -#define DOC_CTRL_UNKNOWN 0x40 -#define DOC_CTRL_FLASHREADY 0x01 - -/* DOC_ECCCONF0 register bits */ -#define DOC_ECCCONF0_READ_MODE 0x8000 -#define DOC_ECCCONF0_UNKNOWN 0x2000 -#define DOC_ECCCONF0_ECC_ENABLE 0x1000 -#define DOC_ECCCONF0_DATA_BYTES_MASK 0x07ff - -/* DOC_ECCCONF1 register bits */ -#define DOC_ECCCONF1_BCH_SYNDROM_ERR 0x80 -#define DOC_ECCCONF1_ECC_ENABLE 0x07 -#define DOC_ECCCONF1_PAGE_IS_WRITTEN 0x20 - -/* DOC_ASICMODE register bits */ -#define DOC_ASICMODE_RESET 0x00 -#define DOC_ASICMODE_NORMAL 0x01 -#define DOC_ASICMODE_POWERDOWN 0x02 -#define DOC_ASICMODE_MDWREN 0x04 -#define DOC_ASICMODE_BDETCT_RESET 0x08 -#define DOC_ASICMODE_RSTIN_RESET 0x10 -#define DOC_ASICMODE_RAM_WE 0x20 - -/* good status values read after read/write/erase operations */ -#define DOCG4_PROGSTATUS_GOOD 0x51 -#define DOCG4_PROGSTATUS_GOOD_2 0xe0 - -/* - * On read operations (page and oob-only), the first byte read from I/O reg is a - * status. On error, it reads 0x73; otherwise, it reads either 0x71 (first read - * after reset only) or 0x51, so bit 1 is presumed to be an error indicator. - */ -#define DOCG4_READ_ERROR 0x02 /* bit 1 indicates read error */ - -/* anatomy of the device */ -#define DOCG4_CHIP_SIZE 0x8000000 -#define DOCG4_PAGE_SIZE 0x200 -#define DOCG4_PAGES_PER_BLOCK 0x200 -#define DOCG4_BLOCK_SIZE (DOCG4_PAGES_PER_BLOCK * DOCG4_PAGE_SIZE) -#define DOCG4_NUMBLOCKS (DOCG4_CHIP_SIZE / DOCG4_BLOCK_SIZE) -#define DOCG4_OOB_SIZE 0x10 -#define DOCG4_CHIP_SHIFT 27 /* log_2(DOCG4_CHIP_SIZE) */ -#define DOCG4_PAGE_SHIFT 9 /* log_2(DOCG4_PAGE_SIZE) */ -#define DOCG4_ERASE_SHIFT 18 /* log_2(DOCG4_BLOCK_SIZE) */ - -/* all but the last byte is included in ecc calculation */ -#define DOCG4_BCH_SIZE (DOCG4_PAGE_SIZE + DOCG4_OOB_SIZE - 1) - -#define DOCG4_USERDATA_LEN 520 /* 512 byte page plus 8 oob avail to user */ - -/* expected values from the ID registers */ -#define DOCG4_IDREG1_VALUE 0x0400 -#define DOCG4_IDREG2_VALUE 0xfbff - -/* primitive polynomial used to build the Galois field used by hw ecc gen */ -#define DOCG4_PRIMITIVE_POLY 0x4443 - -#define DOCG4_M 14 /* Galois field is of order 2^14 */ -#define DOCG4_T 4 /* BCH alg corrects up to 4 bit errors */ - -#define DOCG4_FACTORY_BBT_PAGE 16 /* page where read-only factory bbt lives */ - -#endif /* __DOCG4_H__ */ diff --git a/qemu/roms/u-boot/include/linux/mtd/fsl_upm.h b/qemu/roms/u-boot/include/linux/mtd/fsl_upm.h deleted file mode 100644 index 0a949bca0..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/fsl_upm.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * FSL UPM NAND driver - * - * Copyright (C) 2007 MontaVista Software, Inc. - * Anton Vorontsov <avorontsov@ru.mvista.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __LINUX_MTD_NAND_FSL_UPM -#define __LINUX_MTD_NAND_FSL_UPM - -#include <linux/mtd/nand.h> - -#define FSL_UPM_WAIT_RUN_PATTERN 0x1 -#define FSL_UPM_WAIT_WRITE_BYTE 0x2 -#define FSL_UPM_WAIT_WRITE_BUFFER 0x4 - -struct fsl_upm { - void __iomem *mdr; - void __iomem *mxmr; - void __iomem *mar; - void __iomem *io_addr; -}; - -struct fsl_upm_nand { - struct fsl_upm upm; - - int width; - int upm_cmd_offset; - int upm_addr_offset; - int upm_mar_chip_offset; - int wait_flags; - int (*dev_ready)(int chip_nr); - int chip_delay; - int chip_offset; - int chip_nr; - - /* no need to fill */ - int last_ctrl; -}; - -extern int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun); - -#endif diff --git a/qemu/roms/u-boot/include/linux/mtd/fsmc_nand.h b/qemu/roms/u-boot/include/linux/mtd/fsmc_nand.h deleted file mode 100644 index f0f77270a..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/fsmc_nand.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2010 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __FSMC_NAND_H__ -#define __FSMC_NAND_H__ - -#include <linux/mtd/nand.h> - -struct fsmc_regs { - u32 ctrl; /* 0x00 */ - u8 reserved_1[0x40 - 0x04]; - u32 pc; /* 0x40 */ - u32 sts; /* 0x44 */ - u32 comm; /* 0x48 */ - u32 attrib; /* 0x4c */ - u32 ioata; /* 0x50 */ - u32 ecc1; /* 0x54 */ - u32 ecc2; /* 0x58 */ - u32 ecc3; /* 0x5c */ - u8 reserved_2[0xfe0 - 0x60]; - u32 peripid0; /* 0xfe0 */ - u32 peripid1; /* 0xfe4 */ - u32 peripid2; /* 0xfe8 */ - u32 peripid3; /* 0xfec */ - u32 pcellid0; /* 0xff0 */ - u32 pcellid1; /* 0xff4 */ - u32 pcellid2; /* 0xff8 */ - u32 pcellid3; /* 0xffc */ -}; - -/* ctrl register definitions */ -#define FSMC_WP (1 << 7) - -/* pc register definitions */ -#define FSMC_RESET (1 << 0) -#define FSMC_WAITON (1 << 1) -#define FSMC_ENABLE (1 << 2) -#define FSMC_DEVTYPE_NAND (1 << 3) -#define FSMC_DEVWID_8 (0 << 4) -#define FSMC_DEVWID_16 (1 << 4) -#define FSMC_ECCEN (1 << 6) -#define FSMC_ECCPLEN_512 (0 << 7) -#define FSMC_ECCPLEN_256 (1 << 7) -#define FSMC_TCLR_1 (1 << 9) -#define FSMC_TAR_1 (1 << 13) - -/* sts register definitions */ -#define FSMC_CODE_RDY (1 << 15) - -/* comm register definitions */ -#define FSMC_TSET_0 (0 << 0) -#define FSMC_TWAIT_6 (6 << 8) -#define FSMC_THOLD_4 (4 << 16) -#define FSMC_THIZ_1 (1 << 24) - -/* peripid2 register definitions */ -#define FSMC_REVISION_MSK (0xf) -#define FSMC_REVISION_SHFT (0x4) - -#define FSMC_VER8 0x8 - -/* - * There are 13 bytes of ecc for every 512 byte block and it has to be read - * consecutively and immediately after the 512 byte data block for hardware to - * generate the error bit offsets - * Managing the ecc bytes in the following way is easier. This way is similar to - * oobfree structure maintained already in u-boot nand driver - */ -#define FSMC_MAX_ECCPLACE_ENTRIES 32 - -struct fsmc_nand_eccplace { - u32 offset; - u32 length; -}; - -struct fsmc_eccplace { - struct fsmc_nand_eccplace eccplace[FSMC_MAX_ECCPLACE_ENTRIES]; -}; - -extern int fsmc_nand_init(struct nand_chip *nand); -#endif diff --git a/qemu/roms/u-boot/include/linux/mtd/mtd.h b/qemu/roms/u-boot/include/linux/mtd/mtd.h deleted file mode 100644 index a65b68155..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/mtd.h +++ /dev/null @@ -1,388 +0,0 @@ -/* - * Copyright (C) 1999-2003 David Woodhouse <dwmw2@infradead.org> et al. - * - * Released under GPL - */ - -#ifndef __MTD_MTD_H__ -#define __MTD_MTD_H__ - -#include <linux/types.h> -#include <div64.h> -#include <mtd/mtd-abi.h> -#include <asm/errno.h> - -#define MTD_CHAR_MAJOR 90 -#define MTD_BLOCK_MAJOR 31 -#define MAX_MTD_DEVICES 32 - -#define MTD_ERASE_PENDING 0x01 -#define MTD_ERASING 0x02 -#define MTD_ERASE_SUSPEND 0x04 -#define MTD_ERASE_DONE 0x08 -#define MTD_ERASE_FAILED 0x10 - -#define MTD_FAIL_ADDR_UNKNOWN -1LL - -/* - * Enumeration for NAND/OneNAND flash chip state - */ -enum { - FL_READY, - FL_READING, - FL_WRITING, - FL_ERASING, - FL_SYNCING, - FL_CACHEDPRG, - FL_RESETING, - FL_UNLOCKING, - FL_LOCKING, - FL_PM_SUSPENDED, -}; - -/* If the erase fails, fail_addr might indicate exactly which block failed. If - fail_addr = MTD_FAIL_ADDR_UNKNOWN, the failure was not at the device level or was not - specific to any particular block. */ -struct erase_info { - struct mtd_info *mtd; - uint64_t addr; - uint64_t len; - uint64_t fail_addr; - u_long time; - u_long retries; - u_int dev; - u_int cell; - void (*callback) (struct erase_info *self); - u_long priv; - u_char state; - struct erase_info *next; - int scrub; -}; - -struct mtd_erase_region_info { - uint64_t offset; /* At which this region starts, from the beginning of the MTD */ - u_int32_t erasesize; /* For this region */ - u_int32_t numblocks; /* Number of blocks of erasesize in this region */ - unsigned long *lockmap; /* If keeping bitmap of locks */ -}; - -/** - * struct mtd_oob_ops - oob operation operands - * @mode: operation mode - * - * @len: number of data bytes to write/read - * - * @retlen: number of data bytes written/read - * - * @ooblen: number of oob bytes to write/read - * @oobretlen: number of oob bytes written/read - * @ooboffs: offset of oob data in the oob area (only relevant when - * mode = MTD_OPS_PLACE_OOB or MTD_OPS_RAW) - * @datbuf: data buffer - if NULL only oob data are read/written - * @oobbuf: oob data buffer - * - * Note, it is allowed to read more then one OOB area at one go, but not write. - * The interface assumes that the OOB write requests program only one page's - * OOB area. - */ -struct mtd_oob_ops { - unsigned int mode; - size_t len; - size_t retlen; - size_t ooblen; - size_t oobretlen; - uint32_t ooboffs; - uint8_t *datbuf; - uint8_t *oobbuf; -}; - -#ifdef CONFIG_SYS_NAND_MAX_OOBFREE -#define MTD_MAX_OOBFREE_ENTRIES_LARGE CONFIG_SYS_NAND_MAX_OOBFREE -#else -#define MTD_MAX_OOBFREE_ENTRIES_LARGE 32 -#endif - -#ifdef CONFIG_SYS_NAND_MAX_ECCPOS -#define MTD_MAX_ECCPOS_ENTRIES_LARGE CONFIG_SYS_NAND_MAX_ECCPOS -#else -#define MTD_MAX_ECCPOS_ENTRIES_LARGE 640 -#endif - -/* - * ECC layout control structure. Exported to userspace for - * diagnosis and to allow creation of raw images - */ -struct nand_ecclayout { - uint32_t eccbytes; - uint32_t eccpos[MTD_MAX_ECCPOS_ENTRIES_LARGE]; - uint32_t oobavail; - struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES_LARGE]; -}; - -struct mtd_info { - u_char type; - u_int32_t flags; - uint64_t size; /* Total size of the MTD */ - - /* "Major" erase size for the device. Naïve users may take this - * to be the only erase size available, or may use the more detailed - * information below if they desire - */ - u_int32_t erasesize; - /* Minimal writable flash unit size. In case of NOR flash it is 1 (even - * though individual bits can be cleared), in case of NAND flash it is - * one NAND page (or half, or one-fourths of it), in case of ECC-ed NOR - * it is of ECC block size, etc. It is illegal to have writesize = 0. - * Any driver registering a struct mtd_info must ensure a writesize of - * 1 or larger. - */ - u_int32_t writesize; - - u_int32_t oobsize; /* Amount of OOB data per block (e.g. 16) */ - u_int32_t oobavail; /* Available OOB bytes per block */ - - /* - * read ops return -EUCLEAN if max number of bitflips corrected on any - * one region comprising an ecc step equals or exceeds this value. - * Settable by driver, else defaults to ecc_strength. User can override - * in sysfs. N.B. The meaning of the -EUCLEAN return code has changed; - * see Documentation/ABI/testing/sysfs-class-mtd for more detail. - */ - unsigned int bitflip_threshold; - - /* Kernel-only stuff starts here. */ - const char *name; - int index; - - /* ECC layout structure pointer - read only! */ - struct nand_ecclayout *ecclayout; - - /* max number of correctible bit errors per ecc step */ - unsigned int ecc_strength; - - /* Data for variable erase regions. If numeraseregions is zero, - * it means that the whole device has erasesize as given above. - */ - int numeraseregions; - struct mtd_erase_region_info *eraseregions; - - /* - * Do not call via these pointers, use corresponding mtd_*() - * wrappers instead. - */ - int (*_erase) (struct mtd_info *mtd, struct erase_info *instr); - int (*_point) (struct mtd_info *mtd, loff_t from, size_t len, - size_t *retlen, void **virt, phys_addr_t *phys); - void (*_unpoint) (struct mtd_info *mtd, loff_t from, size_t len); - int (*_read) (struct mtd_info *mtd, loff_t from, size_t len, - size_t *retlen, u_char *buf); - int (*_write) (struct mtd_info *mtd, loff_t to, size_t len, - size_t *retlen, const u_char *buf); - - /* In blackbox flight recorder like scenarios we want to make successful - writes in interrupt context. panic_write() is only intended to be - called when its known the kernel is about to panic and we need the - write to succeed. Since the kernel is not going to be running for much - longer, this function can break locks and delay to ensure the write - succeeds (but not sleep). */ - - int (*_panic_write) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf); - - int (*_read_oob) (struct mtd_info *mtd, loff_t from, - struct mtd_oob_ops *ops); - int (*_write_oob) (struct mtd_info *mtd, loff_t to, - struct mtd_oob_ops *ops); - int (*_get_fact_prot_info) (struct mtd_info *mtd, struct otp_info *buf, - size_t len); - int (*_read_fact_prot_reg) (struct mtd_info *mtd, loff_t from, - size_t len, size_t *retlen, u_char *buf); - int (*_get_user_prot_info) (struct mtd_info *mtd, struct otp_info *buf, - size_t len); - int (*_read_user_prot_reg) (struct mtd_info *mtd, loff_t from, - size_t len, size_t *retlen, u_char *buf); - int (*_write_user_prot_reg) (struct mtd_info *mtd, loff_t to, size_t len, - size_t *retlen, u_char *buf); - int (*_lock_user_prot_reg) (struct mtd_info *mtd, loff_t from, - size_t len); - void (*_sync) (struct mtd_info *mtd); - int (*_lock) (struct mtd_info *mtd, loff_t ofs, uint64_t len); - int (*_unlock) (struct mtd_info *mtd, loff_t ofs, uint64_t len); - int (*_block_isbad) (struct mtd_info *mtd, loff_t ofs); - int (*_block_markbad) (struct mtd_info *mtd, loff_t ofs); - /* - * If the driver is something smart, like UBI, it may need to maintain - * its own reference counting. The below functions are only for driver. - */ - int (*_get_device) (struct mtd_info *mtd); - void (*_put_device) (struct mtd_info *mtd); - -/* XXX U-BOOT XXX */ -#if 0 - /* kvec-based read/write methods. - NB: The 'count' parameter is the number of _vectors_, each of - which contains an (ofs, len) tuple. - */ - int (*writev) (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to, size_t *retlen); -#endif -/* XXX U-BOOT XXX */ -#if 0 - struct notifier_block reboot_notifier; /* default mode before reboot */ -#endif - - /* ECC status information */ - struct mtd_ecc_stats ecc_stats; - /* Subpage shift (NAND) */ - int subpage_sft; - - void *priv; - - struct module *owner; - int usecount; -}; - -int mtd_erase(struct mtd_info *mtd, struct erase_info *instr); -int mtd_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, - u_char *buf); -int mtd_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, - const u_char *buf); -int mtd_panic_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, - const u_char *buf); - -int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops); - -static inline int mtd_write_oob(struct mtd_info *mtd, loff_t to, - struct mtd_oob_ops *ops) -{ - ops->retlen = ops->oobretlen = 0; - if (!mtd->_write_oob) - return -EOPNOTSUPP; - if (!(mtd->flags & MTD_WRITEABLE)) - return -EROFS; - return mtd->_write_oob(mtd, to, ops); -} - -int mtd_get_fact_prot_info(struct mtd_info *mtd, struct otp_info *buf, - size_t len); -int mtd_read_fact_prot_reg(struct mtd_info *mtd, loff_t from, size_t len, - size_t *retlen, u_char *buf); -int mtd_get_user_prot_info(struct mtd_info *mtd, struct otp_info *buf, - size_t len); -int mtd_read_user_prot_reg(struct mtd_info *mtd, loff_t from, size_t len, - size_t *retlen, u_char *buf); -int mtd_write_user_prot_reg(struct mtd_info *mtd, loff_t to, size_t len, - size_t *retlen, u_char *buf); -int mtd_lock_user_prot_reg(struct mtd_info *mtd, loff_t from, size_t len); - -/* XXX U-BOOT XXX */ -#if 0 -int mtd_writev(struct mtd_info *mtd, const struct kvec *vecs, - unsigned long count, loff_t to, size_t *retlen); -#endif - -static inline void mtd_sync(struct mtd_info *mtd) -{ - if (mtd->_sync) - mtd->_sync(mtd); -} - -int mtd_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len); -int mtd_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len); -int mtd_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len); -int mtd_block_isbad(struct mtd_info *mtd, loff_t ofs); -int mtd_block_markbad(struct mtd_info *mtd, loff_t ofs); - -static inline uint32_t mtd_div_by_eb(uint64_t sz, struct mtd_info *mtd) -{ - do_div(sz, mtd->erasesize); - return sz; -} - -static inline uint32_t mtd_mod_by_eb(uint64_t sz, struct mtd_info *mtd) -{ - return do_div(sz, mtd->erasesize); -} - -static inline int mtd_has_oob(const struct mtd_info *mtd) -{ - return mtd->_read_oob && mtd->_write_oob; -} - -static inline int mtd_can_have_bb(const struct mtd_info *mtd) -{ - return !!mtd->_block_isbad; -} - - /* Kernel-side ioctl definitions */ - -extern int add_mtd_device(struct mtd_info *mtd); -extern int del_mtd_device (struct mtd_info *mtd); - -extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num); -extern struct mtd_info *get_mtd_device_nm(const char *name); - -extern void put_mtd_device(struct mtd_info *mtd); -extern void mtd_get_len_incl_bad(struct mtd_info *mtd, uint64_t offset, - const uint64_t length, uint64_t *len_incl_bad, - int *truncated); -/* XXX U-BOOT XXX */ -#if 0 -struct mtd_notifier { - void (*add)(struct mtd_info *mtd); - void (*remove)(struct mtd_info *mtd); - struct list_head list; -}; - -extern void register_mtd_user (struct mtd_notifier *new); -extern int unregister_mtd_user (struct mtd_notifier *old); -#endif - -#ifdef CONFIG_MTD_PARTITIONS -void mtd_erase_callback(struct erase_info *instr); -#else -static inline void mtd_erase_callback(struct erase_info *instr) -{ - if (instr->callback) - instr->callback(instr); -} -#endif - -/* - * Debugging macro and defines - */ -#define MTD_DEBUG_LEVEL0 (0) /* Quiet */ -#define MTD_DEBUG_LEVEL1 (1) /* Audible */ -#define MTD_DEBUG_LEVEL2 (2) /* Loud */ -#define MTD_DEBUG_LEVEL3 (3) /* Noisy */ - -#ifdef CONFIG_MTD_DEBUG -#define pr_debug(args...) MTDDEBUG(MTD_DEBUG_LEVEL0, args) -#define MTDDEBUG(n, args...) \ - do { \ - if (n <= CONFIG_MTD_DEBUG_VERBOSE) \ - printk(KERN_INFO args); \ - } while(0) -#else /* CONFIG_MTD_DEBUG */ -#define pr_debug(args...) -#define MTDDEBUG(n, args...) \ - do { \ - if (0) \ - printk(KERN_INFO args); \ - } while(0) -#endif /* CONFIG_MTD_DEBUG */ -#define pr_info(args...) MTDDEBUG(MTD_DEBUG_LEVEL0, args) -#define pr_warn(args...) MTDDEBUG(MTD_DEBUG_LEVEL0, args) -#define pr_err(args...) MTDDEBUG(MTD_DEBUG_LEVEL0, args) - -static inline int mtd_is_bitflip(int err) { - return err == -EUCLEAN; -} - -static inline int mtd_is_eccerr(int err) { - return err == -EBADMSG; -} - -static inline int mtd_is_bitflip_or_eccerr(int err) { - return mtd_is_bitflip(err) || mtd_is_eccerr(err); -} - -#endif /* __MTD_MTD_H__ */ diff --git a/qemu/roms/u-boot/include/linux/mtd/nand.h b/qemu/roms/u-boot/include/linux/mtd/nand.h deleted file mode 100644 index 054656559..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/nand.h +++ /dev/null @@ -1,722 +0,0 @@ -/* - * linux/include/linux/mtd/nand.h - * - * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org> - * Steven J. Hill <sjhill@realitydiluted.com> - * Thomas Gleixner <tglx@linutronix.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Info: - * Contains standard defines and IDs for NAND flash devices - * - * Changelog: - * See git changelog. - */ -#ifndef __LINUX_MTD_NAND_H -#define __LINUX_MTD_NAND_H - -#include "config.h" - -#include "linux/compat.h" -#include "linux/mtd/mtd.h" -#include "linux/mtd/bbm.h" - - -struct mtd_info; -struct nand_flash_dev; -/* Scan and identify a NAND device */ -extern int nand_scan (struct mtd_info *mtd, int max_chips); -/* Separate phases of nand_scan(), allowing board driver to intervene - * and override command or ECC setup according to flash type */ -extern int nand_scan_ident(struct mtd_info *mtd, int max_chips, - const struct nand_flash_dev *table); -extern int nand_scan_tail(struct mtd_info *mtd); - -/* Free resources held by the NAND device */ -extern void nand_release(struct mtd_info *mtd); - -/* Internal helper for board drivers which need to override command function */ -extern void nand_wait_ready(struct mtd_info *mtd); - -/* - * This constant declares the max. oobsize / page, which - * is supported now. If you add a chip with bigger oobsize/page - * adjust this accordingly. - */ -#define NAND_MAX_OOBSIZE 640 -#define NAND_MAX_PAGESIZE 8192 - -/* - * Constants for hardware specific CLE/ALE/NCE function - * - * These are bits which can be or'ed to set/clear multiple - * bits in one go. - */ -/* Select the chip by setting nCE to low */ -#define NAND_NCE 0x01 -/* Select the command latch by setting CLE to high */ -#define NAND_CLE 0x02 -/* Select the address latch by setting ALE to high */ -#define NAND_ALE 0x04 - -#define NAND_CTRL_CLE (NAND_NCE | NAND_CLE) -#define NAND_CTRL_ALE (NAND_NCE | NAND_ALE) -#define NAND_CTRL_CHANGE 0x80 - -/* - * Standard NAND flash commands - */ -#define NAND_CMD_READ0 0 -#define NAND_CMD_READ1 1 -#define NAND_CMD_RNDOUT 5 -#define NAND_CMD_PAGEPROG 0x10 -#define NAND_CMD_READOOB 0x50 -#define NAND_CMD_ERASE1 0x60 -#define NAND_CMD_STATUS 0x70 -#define NAND_CMD_STATUS_MULTI 0x71 -#define NAND_CMD_SEQIN 0x80 -#define NAND_CMD_RNDIN 0x85 -#define NAND_CMD_READID 0x90 -#define NAND_CMD_ERASE2 0xd0 -#define NAND_CMD_PARAM 0xec -#define NAND_CMD_GET_FEATURES 0xee -#define NAND_CMD_SET_FEATURES 0xef -#define NAND_CMD_RESET 0xff - -#define NAND_CMD_LOCK 0x2a -#define NAND_CMD_LOCK_TIGHT 0x2c -#define NAND_CMD_UNLOCK1 0x23 -#define NAND_CMD_UNLOCK2 0x24 -#define NAND_CMD_LOCK_STATUS 0x7a - -/* Extended commands for large page devices */ -#define NAND_CMD_READSTART 0x30 -#define NAND_CMD_RNDOUTSTART 0xE0 -#define NAND_CMD_CACHEDPROG 0x15 - -/* Extended commands for AG-AND device */ -/* - * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but - * there is no way to distinguish that from NAND_CMD_READ0 - * until the remaining sequence of commands has been completed - * so add a high order bit and mask it off in the command. - */ -#define NAND_CMD_DEPLETE1 0x100 -#define NAND_CMD_DEPLETE2 0x38 -#define NAND_CMD_STATUS_MULTI 0x71 -#define NAND_CMD_STATUS_ERROR 0x72 -/* multi-bank error status (banks 0-3) */ -#define NAND_CMD_STATUS_ERROR0 0x73 -#define NAND_CMD_STATUS_ERROR1 0x74 -#define NAND_CMD_STATUS_ERROR2 0x75 -#define NAND_CMD_STATUS_ERROR3 0x76 -#define NAND_CMD_STATUS_RESET 0x7f -#define NAND_CMD_STATUS_CLEAR 0xff - -#define NAND_CMD_NONE -1 - -/* Status bits */ -#define NAND_STATUS_FAIL 0x01 -#define NAND_STATUS_FAIL_N1 0x02 -#define NAND_STATUS_TRUE_READY 0x20 -#define NAND_STATUS_READY 0x40 -#define NAND_STATUS_WP 0x80 - -/* - * Constants for ECC_MODES - */ -typedef enum { - NAND_ECC_NONE, - NAND_ECC_SOFT, - NAND_ECC_HW, - NAND_ECC_HW_SYNDROME, - NAND_ECC_HW_OOB_FIRST, - NAND_ECC_SOFT_BCH, -} nand_ecc_modes_t; - -/* - * Constants for Hardware ECC - */ -/* Reset Hardware ECC for read */ -#define NAND_ECC_READ 0 -/* Reset Hardware ECC for write */ -#define NAND_ECC_WRITE 1 -/* Enable Hardware ECC before syndrome is read back from flash */ -#define NAND_ECC_READSYN 2 - -/* Bit mask for flags passed to do_nand_read_ecc */ -#define NAND_GET_DEVICE 0x80 - - -/* - * Option constants for bizarre disfunctionality and real - * features. - */ -/* Buswidth is 16 bit */ -#define NAND_BUSWIDTH_16 0x00000002 -/* Device supports partial programming without padding */ -#define NAND_NO_PADDING 0x00000004 -/* Chip has cache program function */ -#define NAND_CACHEPRG 0x00000008 -/* Chip has copy back function */ -#define NAND_COPYBACK 0x00000010 -/* - * AND Chip which has 4 banks and a confusing page / block - * assignment. See Renesas datasheet for further information. - */ -#define NAND_IS_AND 0x00000020 -/* - * Chip has a array of 4 pages which can be read without - * additional ready /busy waits. - */ -#define NAND_4PAGE_ARRAY 0x00000040 -/* - * Chip requires that BBT is periodically rewritten to prevent - * bits from adjacent blocks from 'leaking' in altering data. - * This happens with the Renesas AG-AND chips, possibly others. - */ -#define BBT_AUTO_REFRESH 0x00000080 -/* Chip does not allow subpage writes */ -#define NAND_NO_SUBPAGE_WRITE 0x00000200 - -/* Device is one of 'new' xD cards that expose fake nand command set */ -#define NAND_BROKEN_XD 0x00000400 - -/* Device behaves just like nand, but is readonly */ -#define NAND_ROM 0x00000800 - -/* Device supports subpage reads */ -#define NAND_SUBPAGE_READ 0x00001000 - -/* Options valid for Samsung large page devices */ -#define NAND_SAMSUNG_LP_OPTIONS \ - (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK) - -/* Macros to identify the above */ -#define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING)) -#define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) -#define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) -#define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ)) - -/* Non chip related options */ -/* This option skips the bbt scan during initialization. */ -#define NAND_SKIP_BBTSCAN 0x00010000 -/* - * This option is defined if the board driver allocates its own buffers - * (e.g. because it needs them DMA-coherent). - */ -#define NAND_OWN_BUFFERS 0x00020000 -/* Chip may not exist, so silence any errors in scan */ -#define NAND_SCAN_SILENT_NODEV 0x00040000 - -/* Options set by nand scan */ -/* bbt has already been read */ -#define NAND_BBT_SCANNED 0x40000000 -/* Nand scan has allocated controller struct */ -#define NAND_CONTROLLER_ALLOC 0x80000000 - -/* Cell info constants */ -#define NAND_CI_CHIPNR_MSK 0x03 -#define NAND_CI_CELLTYPE_MSK 0x0C - -/* Keep gcc happy */ -struct nand_chip; - -/* ONFI timing mode, used in both asynchronous and synchronous mode */ -#define ONFI_TIMING_MODE_0 (1 << 0) -#define ONFI_TIMING_MODE_1 (1 << 1) -#define ONFI_TIMING_MODE_2 (1 << 2) -#define ONFI_TIMING_MODE_3 (1 << 3) -#define ONFI_TIMING_MODE_4 (1 << 4) -#define ONFI_TIMING_MODE_5 (1 << 5) -#define ONFI_TIMING_MODE_UNKNOWN (1 << 6) - -/* ONFI feature address */ -#define ONFI_FEATURE_ADDR_TIMING_MODE 0x1 - -/* ONFI subfeature parameters length */ -#define ONFI_SUBFEATURE_PARAM_LEN 4 - -struct nand_onfi_params { - /* rev info and features block */ - /* 'O' 'N' 'F' 'I' */ - u8 sig[4]; - __le16 revision; - __le16 features; - __le16 opt_cmd; - u8 reserved[22]; - - /* manufacturer information block */ - char manufacturer[12]; - char model[20]; - u8 jedec_id; - __le16 date_code; - u8 reserved2[13]; - - /* memory organization block */ - __le32 byte_per_page; - __le16 spare_bytes_per_page; - __le32 data_bytes_per_ppage; - __le16 spare_bytes_per_ppage; - __le32 pages_per_block; - __le32 blocks_per_lun; - u8 lun_count; - u8 addr_cycles; - u8 bits_per_cell; - __le16 bb_per_lun; - __le16 block_endurance; - u8 guaranteed_good_blocks; - __le16 guaranteed_block_endurance; - u8 programs_per_page; - u8 ppage_attr; - u8 ecc_bits; - u8 interleaved_bits; - u8 interleaved_ops; - u8 reserved3[13]; - - /* electrical parameter block */ - u8 io_pin_capacitance_max; - __le16 async_timing_mode; - __le16 program_cache_timing_mode; - __le16 t_prog; - __le16 t_bers; - __le16 t_r; - __le16 t_ccs; - __le16 src_sync_timing_mode; - __le16 src_ssync_features; - __le16 clk_pin_capacitance_typ; - __le16 io_pin_capacitance_typ; - __le16 input_pin_capacitance_typ; - u8 input_pin_capacitance_max; - u8 driver_strenght_support; - __le16 t_int_r; - __le16 t_ald; - u8 reserved4[7]; - - /* vendor */ - u8 reserved5[90]; - - __le16 crc; -} __attribute__((packed)); - -#define ONFI_CRC_BASE 0x4F4E - -/** - * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices - * @lock: protection lock - * @active: the mtd device which holds the controller currently - * @wq: wait queue to sleep on if a NAND operation is in - * progress used instead of the per chip wait queue - * when a hw controller is available. - */ -struct nand_hw_control { -/* XXX U-BOOT XXX */ -#if 0 - spinlock_t lock; - wait_queue_head_t wq; -#endif - struct nand_chip *active; -}; - -/** - * struct nand_ecc_ctrl - Control structure for ECC - * @mode: ECC mode - * @steps: number of ECC steps per page - * @size: data bytes per ECC step - * @bytes: ECC bytes per step - * @strength: max number of correctible bits per ECC step - * @total: total number of ECC bytes per page - * @prepad: padding information for syndrome based ECC generators - * @postpad: padding information for syndrome based ECC generators - * @layout: ECC layout control struct pointer - * @priv: pointer to private ECC control data - * @hwctl: function to control hardware ECC generator. Must only - * be provided if an hardware ECC is available - * @calculate: function for ECC calculation or readback from ECC hardware - * @correct: function for ECC correction, matching to ECC generator (sw/hw) - * @read_page_raw: function to read a raw page without ECC - * @write_page_raw: function to write a raw page without ECC - * @read_page: function to read a page according to the ECC generator - * requirements; returns maximum number of bitflips corrected in - * any single ECC step, 0 if bitflips uncorrectable, -EIO hw error - * @read_subpage: function to read parts of the page covered by ECC; - * returns same as read_page() - * @write_page: function to write a page according to the ECC generator - * requirements. - * @write_oob_raw: function to write chip OOB data without ECC - * @read_oob_raw: function to read chip OOB data without ECC - * @read_oob: function to read chip OOB data - * @write_oob: function to write chip OOB data - */ -struct nand_ecc_ctrl { - nand_ecc_modes_t mode; - int steps; - int size; - int bytes; - int total; - int strength; - int prepad; - int postpad; - struct nand_ecclayout *layout; - void *priv; - void (*hwctl)(struct mtd_info *mtd, int mode); - int (*calculate)(struct mtd_info *mtd, const uint8_t *dat, - uint8_t *ecc_code); - int (*correct)(struct mtd_info *mtd, uint8_t *dat, uint8_t *read_ecc, - uint8_t *calc_ecc); - int (*read_page_raw)(struct mtd_info *mtd, struct nand_chip *chip, - uint8_t *buf, int oob_required, int page); - int (*write_page_raw)(struct mtd_info *mtd, struct nand_chip *chip, - const uint8_t *buf, int oob_required); - int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip, - uint8_t *buf, int oob_required, int page); - int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip, - uint32_t offs, uint32_t len, uint8_t *buf); - int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, - const uint8_t *buf, int oob_required); - int (*write_oob_raw)(struct mtd_info *mtd, struct nand_chip *chip, - int page); - int (*read_oob_raw)(struct mtd_info *mtd, struct nand_chip *chip, - int page); - int (*read_oob)(struct mtd_info *mtd, struct nand_chip *chip, int page); - int (*write_oob)(struct mtd_info *mtd, struct nand_chip *chip, - int page); -}; - -/** - * struct nand_buffers - buffer structure for read/write - * @ecccalc: buffer for calculated ECC - * @ecccode: buffer for ECC read from flash - * @databuf: buffer for data - dynamically sized - * - * Do not change the order of buffers. databuf and oobrbuf must be in - * consecutive order. - */ -struct nand_buffers { - uint8_t ecccalc[ALIGN(NAND_MAX_OOBSIZE, ARCH_DMA_MINALIGN)]; - uint8_t ecccode[ALIGN(NAND_MAX_OOBSIZE, ARCH_DMA_MINALIGN)]; - uint8_t databuf[ALIGN(NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE, - ARCH_DMA_MINALIGN)]; -}; - -/** - * struct nand_chip - NAND Private Flash Chip Data - * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the - * flash device - * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the - * flash device. - * @read_byte: [REPLACEABLE] read one byte from the chip - * @read_word: [REPLACEABLE] read one word from the chip - * @write_buf: [REPLACEABLE] write data from the buffer to the chip - * @read_buf: [REPLACEABLE] read data from the chip into the buffer - * @verify_buf: [REPLACEABLE] verify buffer contents against the chip - * data. - * @select_chip: [REPLACEABLE] select chip nr - * @block_bad: [REPLACEABLE] check, if the block is bad - * @block_markbad: [REPLACEABLE] mark the block bad - * @cmd_ctrl: [BOARDSPECIFIC] hardwarespecific function for controlling - * ALE/CLE/nCE. Also used to write command and address - * @init_size: [BOARDSPECIFIC] hardwarespecific function for setting - * mtd->oobsize, mtd->writesize and so on. - * @id_data contains the 8 bytes values of NAND_CMD_READID. - * Return with the bus width. - * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accessing - * device ready/busy line. If set to NULL no access to - * ready/busy is available and the ready/busy information - * is read from the chip status register. - * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing - * commands to the chip. - * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on - * ready. - * @ecc: [BOARDSPECIFIC] ECC control structure - * @buffers: buffer structure for read/write - * @hwcontrol: platform-specific hardware control structure - * @erase_cmd: [INTERN] erase command write function, selectable due - * to AND support. - * @scan_bbt: [REPLACEABLE] function to scan bad block table - * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transferring - * data from array to read regs (tR). - * @state: [INTERN] the current state of the NAND device - * @oob_poi: "poison value buffer," used for laying out OOB data - * before writing - * @page_shift: [INTERN] number of address bits in a page (column - * address bits). - * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock - * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry - * @chip_shift: [INTERN] number of address bits in one chip - * @options: [BOARDSPECIFIC] various chip options. They can partly - * be set to inform nand_scan about special functionality. - * See the defines for further explanation. - * @bbt_options: [INTERN] bad block specific options. All options used - * here must come from bbm.h. By default, these options - * will be copied to the appropriate nand_bbt_descr's. - * @badblockpos: [INTERN] position of the bad block marker in the oob - * area. - * @badblockbits: [INTERN] minimum number of set bits in a good block's - * bad block marker position; i.e., BBM == 11110111b is - * not bad when badblockbits == 7 - * @cellinfo: [INTERN] MLC/multichip data from chip ident - * @numchips: [INTERN] number of physical chips - * @chipsize: [INTERN] the size of one chip for multichip arrays - * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 - * @pagebuf: [INTERN] holds the pagenumber which is currently in - * data_buf. - * @pagebuf_bitflips: [INTERN] holds the bitflip count for the page which is - * currently in data_buf. - * @subpagesize: [INTERN] holds the subpagesize - * @onfi_version: [INTERN] holds the chip ONFI version (BCD encoded), - * non 0 if ONFI supported. - * @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is - * supported, 0 otherwise. - * @onfi_set_features [REPLACEABLE] set the features for ONFI nand - * @onfi_get_features [REPLACEABLE] get the features for ONFI nand - * @ecclayout: [REPLACEABLE] the default ECC placement scheme - * @bbt: [INTERN] bad block table pointer - * @bbt_td: [REPLACEABLE] bad block table descriptor for flash - * lookup. - * @bbt_md: [REPLACEABLE] bad block table mirror descriptor - * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial - * bad block scan. - * @controller: [REPLACEABLE] a pointer to a hardware controller - * structure which is shared among multiple independent - * devices. - * @priv: [OPTIONAL] pointer to private chip data - * @errstat: [OPTIONAL] hardware specific function to perform - * additional error status checks (determine if errors are - * correctable). - * @write_page: [REPLACEABLE] High-level page write function - */ - -struct nand_chip { - void __iomem *IO_ADDR_R; - void __iomem *IO_ADDR_W; - - uint8_t (*read_byte)(struct mtd_info *mtd); - u16 (*read_word)(struct mtd_info *mtd); - void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); - void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len); - int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); - void (*select_chip)(struct mtd_info *mtd, int chip); - int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip); - int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); - void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl); - int (*init_size)(struct mtd_info *mtd, struct nand_chip *this, - u8 *id_data); - int (*dev_ready)(struct mtd_info *mtd); - void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, - int page_addr); - int(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this); - void (*erase_cmd)(struct mtd_info *mtd, int page); - int (*scan_bbt)(struct mtd_info *mtd); - int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, - int status, int page); - int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, - const uint8_t *buf, int oob_required, int page, - int cached, int raw); - int (*onfi_set_features)(struct mtd_info *mtd, struct nand_chip *chip, - int feature_addr, uint8_t *subfeature_para); - int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip, - int feature_addr, uint8_t *subfeature_para); - - int chip_delay; - unsigned int options; - unsigned int bbt_options; - - int page_shift; - int phys_erase_shift; - int bbt_erase_shift; - int chip_shift; - int numchips; - uint64_t chipsize; - int pagemask; - int pagebuf; - unsigned int pagebuf_bitflips; - int subpagesize; - uint8_t cellinfo; - int badblockpos; - int badblockbits; - - int onfi_version; -#ifdef CONFIG_SYS_NAND_ONFI_DETECTION - struct nand_onfi_params onfi_params; -#endif - - int state; - - uint8_t *oob_poi; - struct nand_hw_control *controller; - struct nand_ecclayout *ecclayout; - - struct nand_ecc_ctrl ecc; - struct nand_buffers *buffers; - struct nand_hw_control hwcontrol; - - uint8_t *bbt; - struct nand_bbt_descr *bbt_td; - struct nand_bbt_descr *bbt_md; - - struct nand_bbt_descr *badblock_pattern; - - void *priv; -}; - -/* - * NAND Flash Manufacturer ID Codes - */ -#define NAND_MFR_TOSHIBA 0x98 -#define NAND_MFR_SAMSUNG 0xec -#define NAND_MFR_FUJITSU 0x04 -#define NAND_MFR_NATIONAL 0x8f -#define NAND_MFR_RENESAS 0x07 -#define NAND_MFR_STMICRO 0x20 -#define NAND_MFR_HYNIX 0xad -#define NAND_MFR_MICRON 0x2c -#define NAND_MFR_AMD 0x01 -#define NAND_MFR_MACRONIX 0xc2 -#define NAND_MFR_EON 0x92 - -/** - * struct nand_flash_dev - NAND Flash Device ID Structure - * @name: Identify the device type - * @id: device ID code - * @pagesize: Pagesize in bytes. Either 256 or 512 or 0 - * If the pagesize is 0, then the real pagesize - * and the eraseize are determined from the - * extended id bytes in the chip - * @erasesize: Size of an erase block in the flash device. - * @chipsize: Total chipsize in Mega Bytes - * @options: Bitfield to store chip relevant options - */ -struct nand_flash_dev { - char *name; - int id; - unsigned long pagesize; - unsigned long chipsize; - unsigned long erasesize; - unsigned long options; -}; - -/** - * struct nand_manufacturers - NAND Flash Manufacturer ID Structure - * @name: Manufacturer name - * @id: manufacturer ID code of device. -*/ -struct nand_manufacturers { - int id; - char *name; -}; - -extern const struct nand_flash_dev nand_flash_ids[]; -extern const struct nand_manufacturers nand_manuf_ids[]; - -extern int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd); -extern int nand_update_bbt(struct mtd_info *mtd, loff_t offs); -extern int nand_default_bbt(struct mtd_info *mtd); -extern int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt); -extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, - int allowbbt); -extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len, - size_t *retlen, uint8_t *buf); - -/* -* Constants for oob configuration -*/ -#define NAND_SMALL_BADBLOCK_POS 5 -#define NAND_LARGE_BADBLOCK_POS 0 - -/** - * struct platform_nand_chip - chip level device structure - * @nr_chips: max. number of chips to scan for - * @chip_offset: chip number offset - * @nr_partitions: number of partitions pointed to by partitions (or zero) - * @partitions: mtd partition list - * @chip_delay: R/B delay value in us - * @options: Option flags, e.g. 16bit buswidth - * @bbt_options: BBT option flags, e.g. NAND_BBT_USE_FLASH - * @ecclayout: ECC layout info structure - * @part_probe_types: NULL-terminated array of probe types - */ -struct platform_nand_chip { - int nr_chips; - int chip_offset; - int nr_partitions; - struct mtd_partition *partitions; - struct nand_ecclayout *ecclayout; - int chip_delay; - unsigned int options; - unsigned int bbt_options; - const char **part_probe_types; -}; - -/* Keep gcc happy */ -struct platform_device; - -/** - * struct platform_nand_ctrl - controller level device structure - * @hwcontrol: platform specific hardware control structure - * @dev_ready: platform specific function to read ready/busy pin - * @select_chip: platform specific chip select function - * @cmd_ctrl: platform specific function for controlling - * ALE/CLE/nCE. Also used to write command and address - * @priv: private data to transport driver specific settings - * - * All fields are optional and depend on the hardware driver requirements - */ -struct platform_nand_ctrl { - void (*hwcontrol)(struct mtd_info *mtd, int cmd); - int (*dev_ready)(struct mtd_info *mtd); - void (*select_chip)(struct mtd_info *mtd, int chip); - void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl); - unsigned char (*read_byte)(struct mtd_info *mtd); - void *priv; -}; - -/** - * struct platform_nand_data - container structure for platform-specific data - * @chip: chip level chip structure - * @ctrl: controller level device structure - */ -struct platform_nand_data { - struct platform_nand_chip chip; - struct platform_nand_ctrl ctrl; -}; - -/* Some helpers to access the data structures */ -static inline -struct platform_nand_chip *get_platform_nandchip(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd->priv; - - return chip->priv; -} - -/* Standard NAND functions from nand_base.c */ -void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len); -void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len); -void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len); -void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len); -uint8_t nand_read_byte(struct mtd_info *mtd); - -/* return the supported asynchronous timing mode. */ - -#ifdef CONFIG_SYS_NAND_ONFI_DETECTION -static inline int onfi_get_async_timing_mode(struct nand_chip *chip) -{ - if (!chip->onfi_version) - return ONFI_TIMING_MODE_UNKNOWN; - return le16_to_cpu(chip->onfi_params.async_timing_mode); -} - -/* return the supported synchronous timing mode. */ -static inline int onfi_get_sync_timing_mode(struct nand_chip *chip) -{ - if (!chip->onfi_version) - return ONFI_TIMING_MODE_UNKNOWN; - return le16_to_cpu(chip->onfi_params.src_sync_timing_mode); -} -#endif - -#endif /* __LINUX_MTD_NAND_H */ diff --git a/qemu/roms/u-boot/include/linux/mtd/nand_bch.h b/qemu/roms/u-boot/include/linux/mtd/nand_bch.h deleted file mode 100644 index d8754dd8c..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/nand_bch.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Copyright © 2011 Ivan Djelic <ivan.djelic@parrot.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This file is the header for the NAND BCH ECC implementation. - */ - -#ifndef __MTD_NAND_BCH_H__ -#define __MTD_NAND_BCH_H__ - -struct mtd_info; -struct nand_bch_control; - -#if defined(CONFIG_NAND_ECC_BCH) - -static inline int mtd_nand_has_bch(void) { return 1; } - -/* - * Calculate BCH ecc code - */ -int nand_bch_calculate_ecc(struct mtd_info *mtd, const u_char *dat, - u_char *ecc_code); - -/* - * Detect and correct bit errors - */ -int nand_bch_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, - u_char *calc_ecc); -/* - * Initialize BCH encoder/decoder - */ -struct nand_bch_control * -nand_bch_init(struct mtd_info *mtd, unsigned int eccsize, - unsigned int eccbytes, struct nand_ecclayout **ecclayout); -/* - * Release BCH encoder/decoder resources - */ -void nand_bch_free(struct nand_bch_control *nbc); - -#else /* !CONFIG_NAND_ECC_BCH */ - -static inline int mtd_nand_has_bch(void) { return 0; } - -static inline int -nand_bch_calculate_ecc(struct mtd_info *mtd, const u_char *dat, - u_char *ecc_code) -{ - return -1; -} - -static inline int -nand_bch_correct_data(struct mtd_info *mtd, unsigned char *buf, - unsigned char *read_ecc, unsigned char *calc_ecc) -{ - return -1; -} - -static inline struct nand_bch_control * -nand_bch_init(struct mtd_info *mtd, unsigned int eccsize, - unsigned int eccbytes, struct nand_ecclayout **ecclayout) -{ - return NULL; -} - -static inline void nand_bch_free(struct nand_bch_control *nbc) {} - -#endif /* CONFIG_NAND_ECC_BCH */ - -#endif /* __MTD_NAND_BCH_H__ */ diff --git a/qemu/roms/u-boot/include/linux/mtd/nand_ecc.h b/qemu/roms/u-boot/include/linux/mtd/nand_ecc.h deleted file mode 100644 index 090da5054..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/nand_ecc.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * drivers/mtd/nand_ecc.h - * - * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This file is the header for the ECC algorithm. - */ - -#ifndef __MTD_NAND_ECC_H__ -#define __MTD_NAND_ECC_H__ - -struct mtd_info; - -/* - * Calculate 3 byte ECC code for 256 byte block - */ -int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code); - -/* - * Detect and correct a 1 bit error for 256 byte block - */ -int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc); - -#endif /* __MTD_NAND_ECC_H__ */ diff --git a/qemu/roms/u-boot/include/linux/mtd/ndfc.h b/qemu/roms/u-boot/include/linux/mtd/ndfc.h deleted file mode 100644 index d0558a982..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/ndfc.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * linux/include/linux/mtd/ndfc.h - * - * Copyright (c) 2006 Thomas Gleixner <tglx@linutronix.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Info: - * Contains defines, datastructures for ndfc nand controller - * - */ -#ifndef __LINUX_MTD_NDFC_H -#define __LINUX_MTD_NDFC_H - -/* NDFC Register definitions */ -#define NDFC_CMD 0x00 -#define NDFC_ALE 0x04 -#define NDFC_DATA 0x08 -#define NDFC_ECC 0x10 -#define NDFC_BCFG0 0x30 -#define NDFC_BCFG1 0x34 -#define NDFC_BCFG2 0x38 -#define NDFC_BCFG3 0x3c -#define NDFC_CCR 0x40 -#define NDFC_STAT 0x44 -#define NDFC_HWCTL 0x48 -#define NDFC_REVID 0x50 - -#define NDFC_STAT_IS_READY 0x01000000 - -#define NDFC_CCR_RESET_CE 0x80000000 /* CE Reset */ -#define NDFC_CCR_RESET_ECC 0x40000000 /* ECC Reset */ -#define NDFC_CCR_RIE 0x20000000 /* Interrupt Enable on Device Rdy */ -#define NDFC_CCR_REN 0x10000000 /* Enable wait for Rdy in LinearR */ -#define NDFC_CCR_ROMEN 0x08000000 /* Enable ROM In LinearR */ -#define NDFC_CCR_ARE 0x04000000 /* Auto-Read Enable */ -#define NDFC_CCR_BS(x) (((x) & 0x3) << 24) /* Select Bank on CE[x] */ -#define NDFC_CCR_BS_MASK 0x03000000 /* Select Bank */ -#define NDFC_CCR_ARAC0 0x00000000 /* 3 Addr, 1 Col 2 Row 512b page */ -#define NDFC_CCR_ARAC1 0x00001000 /* 4 Addr, 1 Col 3 Row 512b page */ -#define NDFC_CCR_ARAC2 0x00002000 /* 4 Addr, 2 Col 2 Row 2K page */ -#define NDFC_CCR_ARAC3 0x00003000 /* 5 Addr, 2 Col 3 Row 2K page */ -#define NDFC_CCR_ARAC_MASK 0x00003000 /* Auto-Read mode Addr Cycles */ -#define NDFC_CCR_RPG 0x0000C000 /* Auto-Read Page */ -#define NDFC_CCR_EBCC 0x00000004 /* EBC Configuration Completed */ -#define NDFC_CCR_DHC 0x00000002 /* Direct Hardware Control Enable */ - -#define NDFC_BxCFG_EN 0x80000000 /* Bank Enable */ -#define NDFC_BxCFG_CED 0x40000000 /* nCE Style */ -#define NDFC_BxCFG_SZ_MASK 0x08000000 /* Bank Size */ -#define NDFC_BxCFG_SZ_8BIT 0x00000000 /* 8bit */ -#define NDFC_BxCFG_SZ_16BIT 0x08000000 /* 16bit */ - -#define NDFC_MAX_BANKS 4 - -struct ndfc_controller_settings { - uint32_t ccr_settings; - uint64_t ndfc_erpn; -}; - -struct ndfc_chip_settings { - uint32_t bank_settings; -}; - -#endif diff --git a/qemu/roms/u-boot/include/linux/mtd/omap_elm.h b/qemu/roms/u-boot/include/linux/mtd/omap_elm.h deleted file mode 100644 index 45454eaf0..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/omap_elm.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * (C) Copyright 2010-2011 Texas Instruments, <www.ti.com> - * Mansoor Ahamed <mansoor.ahamed@ti.com> - * - * Derived from work done by Rohit Choraria <rohitkc@ti.com> for omap3 - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_ARCH_ELM_H -#define __ASM_ARCH_ELM_H -/* - * ELM Module Registers - */ - -/* ELM registers bit fields */ -#define ELM_SYSCONFIG_SOFTRESET_MASK (0x2) -#define ELM_SYSCONFIG_SOFTRESET (0x2) -#define ELM_SYSSTATUS_RESETDONE_MASK (0x1) -#define ELM_SYSSTATUS_RESETDONE (0x1) -#define ELM_LOCATION_CONFIG_ECC_BCH_LEVEL_MASK (0x3) -#define ELM_LOCATION_CONFIG_ECC_SIZE_MASK (0x7FF0000) -#define ELM_LOCATION_CONFIG_ECC_SIZE_POS (16) -#define ELM_SYNDROME_FRAGMENT_6_SYNDROME_VALID (0x00010000) -#define ELM_LOCATION_STATUS_ECC_CORRECTABLE_MASK (0x100) -#define ELM_LOCATION_STATUS_ECC_NB_ERRORS_MASK (0x1F) - -#ifndef __ASSEMBLY__ - -enum bch_level { - BCH_4_BIT = 0, - BCH_8_BIT, - BCH_16_BIT -}; - - -/* BCH syndrome registers */ -struct syndrome { - u32 syndrome_fragment_x[7]; /* 0x400, 0x404.... 0x418 */ - u8 res1[36]; /* 0x41c */ -}; - -/* BCH error status & location register */ -struct location { - u32 location_status; /* 0x800 */ - u8 res1[124]; /* 0x804 */ - u32 error_location_x[16]; /* 0x880.... */ - u8 res2[64]; /* 0x8c0 */ -}; - -/* BCH ELM register map - do not try to allocate memmory for this structure. - * We have used plenty of reserved variables to fill the slots in the ELM - * register memory map. - * Directly initialize the struct pointer to ELM base address. - */ -struct elm { - u32 rev; /* 0x000 */ - u8 res1[12]; /* 0x004 */ - u32 sysconfig; /* 0x010 */ - u32 sysstatus; /* 0x014 */ - u32 irqstatus; /* 0x018 */ - u32 irqenable; /* 0x01c */ - u32 location_config; /* 0x020 */ - u8 res2[92]; /* 0x024 */ - u32 page_ctrl; /* 0x080 */ - u8 res3[892]; /* 0x084 */ - struct syndrome syndrome_fragments[8]; /* 0x400 */ - u8 res4[512]; /* 0x600 */ - struct location error_location[8]; /* 0x800 */ -}; - -int elm_check_error(u8 *syndrome, u32 nibbles, u32 *error_count, - u32 *error_locations); -int elm_config(enum bch_level level); -void elm_reset(void); -void elm_init(void); -#endif /* __ASSEMBLY__ */ -#endif /* __ASM_ARCH_ELM_H */ diff --git a/qemu/roms/u-boot/include/linux/mtd/omap_gpmc.h b/qemu/roms/u-boot/include/linux/mtd/omap_gpmc.h deleted file mode 100644 index 22f657396..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/omap_gpmc.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com> - * Rohit Choraria <rohitkc@ti.com> - * - * (C) Copyright 2013 Andreas Bießmann <andreas.devel@googlemail.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __ASM_OMAP_GPMC_H -#define __ASM_OMAP_GPMC_H - -#define GPMC_BUF_EMPTY 0 -#define GPMC_BUF_FULL 1 - -enum omap_ecc { - /* 1-bit ECC calculation by Software, Error detection by Software */ - OMAP_ECC_HAM1_CODE_SW = 1, /* avoid un-initialized int can be 0x0 */ - /* 1-bit ECC calculation by GPMC, Error detection by Software */ - /* ECC layout compatible to legacy ROMCODE. */ - OMAP_ECC_HAM1_CODE_HW, - /* 4-bit ECC calculation by GPMC, Error detection by Software */ - OMAP_ECC_BCH4_CODE_HW_DETECTION_SW, - /* 4-bit ECC calculation by GPMC, Error detection by ELM */ - OMAP_ECC_BCH4_CODE_HW, - /* 8-bit ECC calculation by GPMC, Error detection by Software */ - OMAP_ECC_BCH8_CODE_HW_DETECTION_SW, - /* 8-bit ECC calculation by GPMC, Error detection by ELM */ - OMAP_ECC_BCH8_CODE_HW, -}; - -struct gpmc_cs { - u32 config1; /* 0x00 */ - u32 config2; /* 0x04 */ - u32 config3; /* 0x08 */ - u32 config4; /* 0x0C */ - u32 config5; /* 0x10 */ - u32 config6; /* 0x14 */ - u32 config7; /* 0x18 */ - u32 nand_cmd; /* 0x1C */ - u32 nand_adr; /* 0x20 */ - u32 nand_dat; /* 0x24 */ - u8 res[8]; /* blow up to 0x30 byte */ -}; - -struct bch_res_0_3 { - u32 bch_result_x[4]; -}; - -struct gpmc { - u8 res1[0x10]; - u32 sysconfig; /* 0x10 */ - u8 res2[0x4]; - u32 irqstatus; /* 0x18 */ - u32 irqenable; /* 0x1C */ - u8 res3[0x20]; - u32 timeout_control; /* 0x40 */ - u8 res4[0xC]; - u32 config; /* 0x50 */ - u32 status; /* 0x54 */ - u8 res5[0x8]; /* 0x58 */ - struct gpmc_cs cs[8]; /* 0x60, 0x90, .. */ - u8 res6[0x14]; /* 0x1E0 */ - u32 ecc_config; /* 0x1F4 */ - u32 ecc_control; /* 0x1F8 */ - u32 ecc_size_config; /* 0x1FC */ - u32 ecc1_result; /* 0x200 */ - u32 ecc2_result; /* 0x204 */ - u32 ecc3_result; /* 0x208 */ - u32 ecc4_result; /* 0x20C */ - u32 ecc5_result; /* 0x210 */ - u32 ecc6_result; /* 0x214 */ - u32 ecc7_result; /* 0x218 */ - u32 ecc8_result; /* 0x21C */ - u32 ecc9_result; /* 0x220 */ - u8 res7[12]; /* 0x224 */ - u32 testmomde_ctrl; /* 0x230 */ - u8 res8[12]; /* 0x234 */ - struct bch_res_0_3 bch_result_0_3[2]; /* 0x240 */ -}; - -/* Used for board specific gpmc initialization */ -extern struct gpmc *gpmc_cfg; - -#endif /* __ASM_OMAP_GPMC_H */ diff --git a/qemu/roms/u-boot/include/linux/mtd/onenand.h b/qemu/roms/u-boot/include/linux/mtd/onenand.h deleted file mode 100644 index e7b63ddd1..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/onenand.h +++ /dev/null @@ -1,180 +0,0 @@ -/* - * linux/include/linux/mtd/onenand.h - * - * Copyright (C) 2005-2007 Samsung Electronics - * Kyungmin Park <kyungmin.park@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __LINUX_MTD_ONENAND_H -#define __LINUX_MTD_ONENAND_H - -#include <linux/mtd/onenand_regs.h> - -/* Note: The header order is impoertant */ -#include <onenand_uboot.h> - -#include <linux/compat.h> -#include <linux/mtd/bbm.h> - -#define MAX_DIES 2 -#define MAX_BUFFERRAM 2 -#define MAX_ONENAND_PAGESIZE (4096 + 128) - -/* Scan and identify a OneNAND device */ -extern int onenand_scan (struct mtd_info *mtd, int max_chips); -/* Free resources held by the OneNAND device */ -extern void onenand_release (struct mtd_info *mtd); - -/** - * struct onenand_bufferram - OneNAND BufferRAM Data - * @param blockpage block & page address in BufferRAM - */ -struct onenand_bufferram { - int blockpage; -}; - -/** - * struct onenand_chip - OneNAND Private Flash Chip Data - * @param base [BOARDSPECIFIC] address to access OneNAND - * @dies: [INTERN][FLEXONENAND] number of dies on chip - * @boundary: [INTERN][FLEXONENAND] Boundary of the dies - * @diesize: [INTERN][FLEXONENAND] Size of the dies - * @param chipsize [INTERN] the size of one chip for multichip arrays - * @param device_id [INTERN] device ID - * @param verstion_id [INTERN] version ID - * @technology [INTERN] describes the internal NAND array technology such as SLC or MLC. - * @density_mask: [INTERN] chip density, used for DDP devices - * @param options [BOARDSPECIFIC] various chip options. They can partly be set to inform onenand_scan about - * @param erase_shift [INTERN] number of address bits in a block - * @param page_shift [INTERN] number of address bits in a page - * @param ppb_shift [INTERN] number of address bits in a pages per block - * @param page_mask [INTERN] a page per block mask - * @param writesize [INTERN] a real page size - * @param bufferam_index [INTERN] BufferRAM index - * @param bufferam [INTERN] BufferRAM info - * @param readw [REPLACEABLE] hardware specific function for read short - * @param writew [REPLACEABLE] hardware specific function for write short - * @param command [REPLACEABLE] hardware specific function for writing commands to the chip - * @param wait [REPLACEABLE] hardware specific function for wait on ready - * @param read_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area - * @param write_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area - * @param chip_lock [INTERN] spinlock used to protect access to this structure and the chip - * @param wq [INTERN] wait queue to sleep on if a OneNAND operation is in progress - * @param state [INTERN] the current state of the OneNAND device - * @param autooob [REPLACEABLE] the default (auto)placement scheme - * @param priv [OPTIONAL] pointer to private chip date - */ -struct onenand_chip { - void __iomem *base; - unsigned int dies; - unsigned int boundary[MAX_DIES]; - unsigned int diesize[MAX_DIES]; - unsigned int chipsize; - unsigned int device_id; - unsigned int version_id; - unsigned int technology; - unsigned int density_mask; - unsigned int options; - - unsigned int erase_shift; - unsigned int page_shift; - unsigned int ppb_shift; /* Pages per block shift */ - unsigned int page_mask; - unsigned int writesize; - - unsigned int bufferram_index; - struct onenand_bufferram bufferram[MAX_BUFFERRAM]; - - int (*command) (struct mtd_info *mtd, int cmd, loff_t address, - size_t len); - int (*wait) (struct mtd_info *mtd, int state); - int (*bbt_wait) (struct mtd_info *mtd, int state); - void (*unlock_all)(struct mtd_info *mtd); - int (*read_bufferram) (struct mtd_info *mtd, loff_t addr, int area, - unsigned char *buffer, int offset, size_t count); - int (*write_bufferram) (struct mtd_info *mtd, loff_t addr, int area, - const unsigned char *buffer, int offset, - size_t count); - unsigned short (*read_word) (void __iomem *addr); - void (*write_word) (unsigned short value, void __iomem *addr); - int (*chip_probe)(struct mtd_info *mtd); - void (*mmcontrol) (struct mtd_info *mtd, int sync_read); - int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); - int (*scan_bbt)(struct mtd_info *mtd); - - unsigned char *main_buf; - unsigned char *spare_buf; -#ifdef DONT_USE_UBOOT - spinlock_t chip_lock; - wait_queue_head_t wq; -#endif - int state; - unsigned char *page_buf; - unsigned char *oob_buf; - - struct nand_oobinfo *autooob; - int subpagesize; - struct nand_ecclayout *ecclayout; - - void *bbm; - - void *priv; -}; - -/* - * Helper macros - */ -#define ONENAND_CURRENT_BUFFERRAM(this) (this->bufferram_index) -#define ONENAND_NEXT_BUFFERRAM(this) (this->bufferram_index ^ 1) -#define ONENAND_SET_NEXT_BUFFERRAM(this) (this->bufferram_index ^= 1) -#define ONENAND_SET_PREV_BUFFERRAM(this) (this->bufferram_index ^= 1) -#define ONENAND_SET_BUFFERRAM0(this) (this->bufferram_index = 0) -#define ONENAND_SET_BUFFERRAM1(this) (this->bufferram_index = 1) - -#define FLEXONENAND(this) (this->device_id & DEVICE_IS_FLEXONENAND) -#define ONENAND_IS_MLC(this) (this->technology & ONENAND_TECHNOLOGY_IS_MLC) -#define ONENAND_IS_DDP(this) \ - (this->device_id & ONENAND_DEVICE_IS_DDP) - -#define ONENAND_IS_4KB_PAGE(this) \ - (this->options & ONENAND_HAS_4KB_PAGE) - -#define ONENAND_IS_2PLANE(this) (0) - -/* - * Options bits - */ -#define ONENAND_HAS_CONT_LOCK (0x0001) -#define ONENAND_HAS_UNLOCK_ALL (0x0002) -#define ONENAND_HAS_2PLANE (0x0004) -#define ONENAND_HAS_4KB_PAGE (0x0008) -#define ONENAND_RUNTIME_BADBLOCK_CHECK (0x0200) -#define ONENAND_PAGEBUF_ALLOC (0x1000) -#define ONENAND_OOBBUF_ALLOC (0x2000) - -/* - * OneNAND Flash Manufacturer ID Codes - */ -#define ONENAND_MFR_NUMONYX 0x20 -#define ONENAND_MFR_SAMSUNG 0xec - -/** - * struct nand_manufacturers - NAND Flash Manufacturer ID Structure - * @param name: Manufacturer name - * @param id: manufacturer ID code of device. -*/ -struct onenand_manufacturers { - int id; - char *name; -}; - -int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, - struct mtd_oob_ops *ops); - -unsigned int onenand_block(struct onenand_chip *this, loff_t addr); -int flexonenand_region(struct mtd_info *mtd, loff_t addr); -#endif /* __LINUX_MTD_ONENAND_H */ diff --git a/qemu/roms/u-boot/include/linux/mtd/onenand_regs.h b/qemu/roms/u-boot/include/linux/mtd/onenand_regs.h deleted file mode 100644 index 8449a3cdc..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/onenand_regs.h +++ /dev/null @@ -1,208 +0,0 @@ -/* - * linux/include/linux/mtd/onenand_regs.h - * - * OneNAND Register header file - * - * Copyright (C) 2005-2007 Samsung Electronics - * Kyungmin Park <kyungmin.park@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ONENAND_REG_H -#define __ONENAND_REG_H - -/* Memory Address Map Translation (Word order) */ -#define ONENAND_MEMORY_MAP(x) ((x) << 1) - -/* - * External BufferRAM area - */ -#define ONENAND_BOOTRAM ONENAND_MEMORY_MAP(0x0000) -#define ONENAND_DATARAM ONENAND_MEMORY_MAP(0x0200) -#define ONENAND_SPARERAM ONENAND_MEMORY_MAP(0x8010) - -/* - * OneNAND Registers - */ -#define ONENAND_REG_MANUFACTURER_ID ONENAND_MEMORY_MAP(0xF000) -#define ONENAND_REG_DEVICE_ID ONENAND_MEMORY_MAP(0xF001) -#define ONENAND_REG_VERSION_ID ONENAND_MEMORY_MAP(0xF002) -#define ONENAND_REG_DATA_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF003) -#define ONENAND_REG_BOOT_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF004) -#define ONENAND_REG_NUM_BUFFERS ONENAND_MEMORY_MAP(0xF005) -#define ONENAND_REG_TECHNOLOGY ONENAND_MEMORY_MAP(0xF006) - -#define ONENAND_REG_START_ADDRESS1 ONENAND_MEMORY_MAP(0xF100) -#define ONENAND_REG_START_ADDRESS2 ONENAND_MEMORY_MAP(0xF101) -#define ONENAND_REG_START_ADDRESS3 ONENAND_MEMORY_MAP(0xF102) -#define ONENAND_REG_START_ADDRESS4 ONENAND_MEMORY_MAP(0xF103) -#define ONENAND_REG_START_ADDRESS5 ONENAND_MEMORY_MAP(0xF104) -#define ONENAND_REG_START_ADDRESS6 ONENAND_MEMORY_MAP(0xF105) -#define ONENAND_REG_START_ADDRESS7 ONENAND_MEMORY_MAP(0xF106) -#define ONENAND_REG_START_ADDRESS8 ONENAND_MEMORY_MAP(0xF107) - -#define ONENAND_REG_START_BUFFER ONENAND_MEMORY_MAP(0xF200) -#define ONENAND_REG_COMMAND ONENAND_MEMORY_MAP(0xF220) -#define ONENAND_REG_SYS_CFG1 ONENAND_MEMORY_MAP(0xF221) -#define ONENAND_REG_SYS_CFG2 ONENAND_MEMORY_MAP(0xF222) -#define ONENAND_REG_CTRL_STATUS ONENAND_MEMORY_MAP(0xF240) -#define ONENAND_REG_INTERRUPT ONENAND_MEMORY_MAP(0xF241) -#define ONENAND_REG_START_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24C) -#define ONENAND_REG_END_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24D) -#define ONENAND_REG_WP_STATUS ONENAND_MEMORY_MAP(0xF24E) - -#define ONENAND_REG_ECC_STATUS ONENAND_MEMORY_MAP(0xFF00) -#define ONENAND_REG_ECC_M0 ONENAND_MEMORY_MAP(0xFF01) -#define ONENAND_REG_ECC_S0 ONENAND_MEMORY_MAP(0xFF02) -#define ONENAND_REG_ECC_M1 ONENAND_MEMORY_MAP(0xFF03) -#define ONENAND_REG_ECC_S1 ONENAND_MEMORY_MAP(0xFF04) -#define ONENAND_REG_ECC_M2 ONENAND_MEMORY_MAP(0xFF05) -#define ONENAND_REG_ECC_S2 ONENAND_MEMORY_MAP(0xFF06) -#define ONENAND_REG_ECC_M3 ONENAND_MEMORY_MAP(0xFF07) -#define ONENAND_REG_ECC_S3 ONENAND_MEMORY_MAP(0xFF08) - -/* - * Device ID Register F001h (R) - */ -#define DEVICE_IS_FLEXONENAND (1 << 9) -#define FLEXONENAND_PI_MASK (0x3ff) -#define FLEXONENAND_PI_UNLOCK_SHIFT (14) -#define ONENAND_DEVICE_DENSITY_MASK (0xf) -#define ONENAND_DEVICE_DENSITY_SHIFT (4) -#define ONENAND_DEVICE_IS_DDP (1 << 3) -#define ONENAND_DEVICE_IS_DEMUX (1 << 2) -#define ONENAND_DEVICE_VCC_MASK (0x3) - -#define ONENAND_DEVICE_DENSITY_512Mb (0x002) -#define ONENAND_DEVICE_DENSITY_1Gb (0x003) -#define ONENAND_DEVICE_DENSITY_2Gb (0x004) -#define ONENAND_DEVICE_DENSITY_4Gb (0x005) - -/* - * Version ID Register F002h (R) - */ -#define ONENAND_VERSION_PROCESS_SHIFT (8) - -/* - * Technology Register F006h (R) - */ -#define ONENAND_TECHNOLOGY_IS_MLC (1 << 0) - -/* - * Start Address 1 F100h (R/W) - */ -#define ONENAND_DDP_SHIFT (15) -#define ONENAND_DDP_CHIP0 (0) -#define ONENAND_DDP_CHIP1 (1 << ONENAND_DDP_SHIFT) - -/* - * Start Address 8 F107h (R/W) - */ -#define ONENAND_FPA_MASK (0x7f) -#define ONENAND_FPA_SHIFT (2) -#define ONENAND_FSA_MASK (0x03) - -/* - * Start Buffer Register F200h (R/W) - */ -#define ONENAND_BSA_MASK (0x03) -#define ONENAND_BSA_SHIFT (8) -#define ONENAND_BSA_BOOTRAM (0 << 2) -#define ONENAND_BSA_DATARAM0 (2 << 2) -#define ONENAND_BSA_DATARAM1 (3 << 2) -#define ONENAND_BSC_MASK (0x07) - -/* - * Command Register F220h (R/W) - */ -#define ONENAND_CMD_READ (0x00) -#define ONENAND_CMD_READOOB (0x13) -#define ONENAND_CMD_PROG (0x80) -#define ONENAND_CMD_PROGOOB (0x1A) -#define ONENAND_CMD_2X_PROG (0x7D) -#define ONENAND_CMD_2X_CACHE_PROG (0x7F) -#define ONENAND_CMD_UNLOCK (0x23) -#define ONENAND_CMD_LOCK (0x2A) -#define ONENAND_CMD_LOCK_TIGHT (0x2C) -#define ONENAND_CMD_UNLOCK_ALL (0x27) -#define ONENAND_CMD_ERASE (0x94) -#define ONENAND_CMD_MULTIBLOCK_ERASE (0x95) -#define ONENAND_CMD_ERASE_VERIFY (0x71) -#define ONENAND_CMD_RESET (0xF0) -#define ONENAND_CMD_READID (0x90) -#define FLEXONENAND_CMD_RESET (0xF3) -#define FLEXONENAND_CMD_PI_UPDATE (0x05) -#define FLEXONENAND_CMD_PI_ACCESS (0x66) -#define FLEXONENAND_CMD_RECOVER_LSB (0x05) - -/* NOTE: Those are not *REAL* commands */ -#define ONENAND_CMD_BUFFERRAM (0x1978) -#define FLEXONENAND_CMD_READ_PI (0x1985) - -/* - * System Configuration 1 Register F221h (R, R/W) - */ -#define ONENAND_SYS_CFG1_SYNC_READ (1 << 15) -#define ONENAND_SYS_CFG1_BRL_7 (7 << 12) -#define ONENAND_SYS_CFG1_BRL_6 (6 << 12) -#define ONENAND_SYS_CFG1_BRL_5 (5 << 12) -#define ONENAND_SYS_CFG1_BRL_4 (4 << 12) -#define ONENAND_SYS_CFG1_BRL_3 (3 << 12) -#define ONENAND_SYS_CFG1_BRL_10 (2 << 12) -#define ONENAND_SYS_CFG1_BRL_9 (1 << 12) -#define ONENAND_SYS_CFG1_BRL_8 (0 << 12) -#define ONENAND_SYS_CFG1_BRL_SHIFT (12) -#define ONENAND_SYS_CFG1_BL_32 (4 << 9) -#define ONENAND_SYS_CFG1_BL_16 (3 << 9) -#define ONENAND_SYS_CFG1_BL_8 (2 << 9) -#define ONENAND_SYS_CFG1_BL_4 (1 << 9) -#define ONENAND_SYS_CFG1_BL_CONT (0 << 9) -#define ONENAND_SYS_CFG1_BL_SHIFT (9) -#define ONENAND_SYS_CFG1_NO_ECC (1 << 8) -#define ONENAND_SYS_CFG1_RDY (1 << 7) -#define ONENAND_SYS_CFG1_INT (1 << 6) -#define ONENAND_SYS_CFG1_IOBE (1 << 5) -#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4) - -/* - * Controller Status Register F240h (R) - */ -#define ONENAND_CTRL_ONGO (1 << 15) -#define ONENAND_CTRL_LOCK (1 << 14) -#define ONENAND_CTRL_LOAD (1 << 13) -#define ONENAND_CTRL_PROGRAM (1 << 12) -#define ONENAND_CTRL_ERASE (1 << 11) -#define ONENAND_CTRL_ERROR (1 << 10) -#define ONENAND_CTRL_RSTB (1 << 7) - -/* - * Interrupt Status Register F241h (R) - */ -#define ONENAND_INT_MASTER (1 << 15) -#define ONENAND_INT_READ (1 << 7) -#define ONENAND_INT_WRITE (1 << 6) -#define ONENAND_INT_ERASE (1 << 5) -#define ONENAND_INT_RESET (1 << 4) -#define ONENAND_INT_CLEAR (0 << 0) - -/* - * NAND Flash Write Protection Status Register F24Eh (R) - */ -#define ONENAND_WP_US (1 << 2) -#define ONENAND_WP_LS (1 << 1) -#define ONENAND_WP_LTS (1 << 0) - -/* - * ECC Status Reigser FF00h (R) - */ -#define ONENAND_ECC_1BIT (1 << 0) -#define ONENAND_ECC_1BIT_ALL (0x5555) -#define ONENAND_ECC_2BIT (1 << 1) -#define ONENAND_ECC_2BIT_ALL (0xAAAA) -#define ONENAND_ECC_4BIT_UNCORRECTABLE (0x1010) -#define FLEXONENAND_UNCORRECTABLE_ERROR (0x1010) - -#endif /* __ONENAND_REG_H */ diff --git a/qemu/roms/u-boot/include/linux/mtd/partitions.h b/qemu/roms/u-boot/include/linux/mtd/partitions.h deleted file mode 100644 index d1d9a96d5..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/partitions.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - * MTD partitioning layer definitions - * - * (C) 2000 Nicolas Pitre <nico@cam.org> - * - * This code is GPL - * - * $Id: partitions.h,v 1.17 2005/11/07 11:14:55 gleixner Exp $ - */ - -#ifndef MTD_PARTITIONS_H -#define MTD_PARTITIONS_H - -#include <linux/types.h> - - -/* - * Partition definition structure: - * - * An array of struct partition is passed along with a MTD object to - * add_mtd_partitions() to create them. - * - * For each partition, these fields are available: - * name: string that will be used to label the partition's MTD device. - * size: the partition size; if defined as MTDPART_SIZ_FULL, the partition - * will extend to the end of the master MTD device. - * offset: absolute starting position within the master MTD device; if - * defined as MTDPART_OFS_APPEND, the partition will start where the - * previous one ended; if MTDPART_OFS_NXTBLK, at the next erase block. - * mask_flags: contains flags that have to be masked (removed) from the - * master MTD flag set for the corresponding MTD partition. - * For example, to force a read-only partition, simply adding - * MTD_WRITEABLE to the mask_flags will do the trick. - * - * Note: writeable partitions require their size and offset be - * erasesize aligned (e.g. use MTDPART_OFS_NEXTBLK). - */ - -struct mtd_partition { - char *name; /* identifier string */ - uint64_t size; /* partition size */ - uint64_t offset; /* offset within the master MTD space */ - u_int32_t mask_flags; /* master MTD flags to mask out for this partition */ - struct nand_ecclayout *ecclayout; /* out of band layout for this partition (NAND only)*/ - struct mtd_info **mtdp; /* pointer to store the MTD object */ -}; - -#define MTDPART_OFS_NXTBLK (-2) -#define MTDPART_OFS_APPEND (-1) -#define MTDPART_SIZ_FULL (0) - - -int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int); -int del_mtd_partitions(struct mtd_info *); - -#if 0 -/* - * Functions dealing with the various ways of partitioning the space - */ - -struct mtd_part_parser { - struct list_head list; - struct module *owner; - const char *name; - int (*parse_fn)(struct mtd_info *, struct mtd_partition **, unsigned long); -}; - -extern int register_mtd_parser(struct mtd_part_parser *parser); -extern int deregister_mtd_parser(struct mtd_part_parser *parser); -extern int parse_mtd_partitions(struct mtd_info *master, const char **types, - struct mtd_partition **pparts, unsigned long origin); - -#define put_partition_parser(p) do { module_put((p)->owner); } while(0) - -struct device; -struct device_node; - -int __devinit of_mtd_parse_partitions(struct device *dev, - struct mtd_info *mtd, - struct device_node *node, - struct mtd_partition **pparts); -#endif - -#endif diff --git a/qemu/roms/u-boot/include/linux/mtd/samsung_onenand.h b/qemu/roms/u-boot/include/linux/mtd/samsung_onenand.h deleted file mode 100644 index 246bcf8f3..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/samsung_onenand.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - * Copyright (C) 2005-2009 Samsung Electronics - * Minkyu Kang <mk7.kang@samsung.com> - * Kyungmin Park <kyungmin.park@samsung.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __SAMSUNG_ONENAND_H__ -#define __SAMSUNG_ONENAND_H__ - -/* - * OneNAND Controller - */ - -#ifndef __ASSEMBLY__ -struct samsung_onenand { - unsigned int mem_cfg; /* 0x0000 */ - unsigned char res1[0xc]; - unsigned int burst_len; /* 0x0010 */ - unsigned char res2[0xc]; - unsigned int mem_reset; /* 0x0020 */ - unsigned char res3[0xc]; - unsigned int int_err_stat; /* 0x0030 */ - unsigned char res4[0xc]; - unsigned int int_err_mask; /* 0x0040 */ - unsigned char res5[0xc]; - unsigned int int_err_ack; /* 0x0050 */ - unsigned char res6[0xc]; - unsigned int ecc_err_stat; /* 0x0060 */ - unsigned char res7[0xc]; - unsigned int manufact_id; /* 0x0070 */ - unsigned char res8[0xc]; - unsigned int device_id; /* 0x0080 */ - unsigned char res9[0xc]; - unsigned int data_buf_size; /* 0x0090 */ - unsigned char res10[0xc]; - unsigned int boot_buf_size; /* 0x00A0 */ - unsigned char res11[0xc]; - unsigned int buf_amount; /* 0x00B0 */ - unsigned char res12[0xc]; - unsigned int tech; /* 0x00C0 */ - unsigned char res13[0xc]; - unsigned int fba; /* 0x00D0 */ - unsigned char res14[0xc]; - unsigned int fpa; /* 0x00E0 */ - unsigned char res15[0xc]; - unsigned int fsa; /* 0x00F0 */ - unsigned char res16[0x3c]; - unsigned int sync_mode; /* 0x0130 */ - unsigned char res17[0xc]; - unsigned int trans_spare; /* 0x0140 */ - unsigned char res18[0x3c]; - unsigned int err_page_addr; /* 0x0180 */ - unsigned char res19[0x1c]; - unsigned int int_pin_en; /* 0x01A0 */ - unsigned char res20[0x1c]; - unsigned int acc_clock; /* 0x01C0 */ - unsigned char res21[0x1c]; - unsigned int err_blk_addr; /* 0x01E0 */ - unsigned char res22[0xc]; - unsigned int flash_ver_id; /* 0x01F0 */ - unsigned char res23[0x6c]; - unsigned int watchdog_cnt_low; /* 0x0260 */ - unsigned char res24[0xc]; - unsigned int watchdog_cnt_hi; /* 0x0270 */ - unsigned char res25[0xc]; - unsigned int sync_write; /* 0x0280 */ - unsigned char res26[0x1c]; - unsigned int cold_reset; /* 0x02A0 */ - unsigned char res27[0xc]; - unsigned int ddp_device; /* 0x02B0 */ - unsigned char res28[0xc]; - unsigned int multi_plane; /* 0x02C0 */ - unsigned char res29[0x1c]; - unsigned int trans_mode; /* 0x02E0 */ - unsigned char res30[0x1c]; - unsigned int ecc_err_stat2; /* 0x0300 */ - unsigned char res31[0xc]; - unsigned int ecc_err_stat3; /* 0x0310 */ - unsigned char res32[0xc]; - unsigned int ecc_err_stat4; /* 0x0320 */ - unsigned char res33[0x1c]; - unsigned int dev_page_size; /* 0x0340 */ - unsigned char res34[0x4c]; - unsigned int int_mon_status; /* 0x0390 */ -}; -#endif - -#define ONENAND_MEM_RESET_HOT 0x3 -#define ONENAND_MEM_RESET_COLD 0x2 -#define ONENAND_MEM_RESET_WARM 0x1 - -#define INT_ERR_ALL 0x3fff -#define CACHE_OP_ERR (1 << 13) -#define RST_CMP (1 << 12) -#define RDY_ACT (1 << 11) -#define INT_ACT (1 << 10) -#define UNSUP_CMD (1 << 9) -#define LOCKED_BLK (1 << 8) -#define BLK_RW_CMP (1 << 7) -#define ERS_CMP (1 << 6) -#define PGM_CMP (1 << 5) -#define LOAD_CMP (1 << 4) -#define ERS_FAIL (1 << 3) -#define PGM_FAIL (1 << 2) -#define INT_TO (1 << 1) -#define LD_FAIL_ECC_ERR (1 << 0) - -#define TSRF (1 << 0) - -/* common initialize function */ -extern void s3c_onenand_init(struct mtd_info *); -extern int s5pc110_chip_probe(struct mtd_info *); -extern int s5pc210_chip_probe(struct mtd_info *); - -#endif diff --git a/qemu/roms/u-boot/include/linux/mtd/st_smi.h b/qemu/roms/u-boot/include/linux/mtd/st_smi.h deleted file mode 100644 index 645c6a31e..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/st_smi.h +++ /dev/null @@ -1,101 +0,0 @@ -/* - * (C) Copyright 2009 - * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef ST_SMI_H -#define ST_SMI_H - -/* 0xF800.0000 . 0xFBFF.FFFF 64MB SMI (Serial Flash Mem) */ -/* 0xFC00.0000 . 0xFC1F.FFFF 2MB SMI (Serial Flash Reg.) */ - -#define FLASH_START_ADDRESS CONFIG_SYS_FLASH_BASE -#define FLASH_BANK_SIZE CONFIG_SYS_FLASH_BANK_SIZE - -#define SMIBANK0_BASE (FLASH_START_ADDRESS) -#define SMIBANK1_BASE (SMIBANK0_BASE + FLASH_BANK_SIZE) -#define SMIBANK2_BASE (SMIBANK1_BASE + FLASH_BANK_SIZE) -#define SMIBANK3_BASE (SMIBANK2_BASE + FLASH_BANK_SIZE) - -#define BANK0 0 -#define BANK1 1 -#define BANK2 2 -#define BANK3 3 - -struct smi_regs { - u32 smi_cr1; - u32 smi_cr2; - u32 smi_sr; - u32 smi_tr; - u32 smi_rr; -}; - -/* CONTROL REG 1 */ -#define BANK_EN 0x0000000F /* enables all banks */ -#define DSEL_TIME 0x00000060 /* Deselect time */ -#define PRESCAL5 0x00000500 /* AHB_CK prescaling value */ -#define PRESCALA 0x00000A00 /* AHB_CK prescaling value */ -#define PRESCAL3 0x00000300 /* AHB_CK prescaling value */ -#define PRESCAL4 0x00000400 /* AHB_CK prescaling value */ -#define SW_MODE 0x10000000 /* enables SW Mode */ -#define WB_MODE 0x20000000 /* Write Burst Mode */ -#define FAST_MODE 0x00008000 /* Fast Mode */ -#define HOLD1 0x00010000 - -/* CONTROL REG 2 */ -#define RD_STATUS_REG 0x00000400 /* reads status reg */ -#define WE 0x00000800 /* Write Enable */ -#define BANK0_SEL 0x00000000 /* Select Banck0 */ -#define BANK1_SEL 0x00001000 /* Select Banck1 */ -#define BANK2_SEL 0x00002000 /* Select Banck2 */ -#define BANK3_SEL 0x00003000 /* Select Banck3 */ -#define BANKSEL_SHIFT 12 -#define SEND 0x00000080 /* Send data */ -#define TX_LEN_1 0x00000001 /* data length = 1 byte */ -#define TX_LEN_2 0x00000002 /* data length = 2 byte */ -#define TX_LEN_3 0x00000003 /* data length = 3 byte */ -#define TX_LEN_4 0x00000004 /* data length = 4 byte */ -#define RX_LEN_1 0x00000010 /* data length = 1 byte */ -#define RX_LEN_2 0x00000020 /* data length = 2 byte */ -#define RX_LEN_3 0x00000030 /* data length = 3 byte */ -#define RX_LEN_4 0x00000040 /* data length = 4 byte */ -#define TFIE 0x00000100 /* Tx Flag Interrupt Enable */ -#define WCIE 0x00000200 /* WCF Interrupt Enable */ - -/* STATUS_REG */ -#define INT_WCF_CLR 0xFFFFFDFF /* clear: WCF clear */ -#define INT_TFF_CLR 0xFFFFFEFF /* clear: TFF clear */ -#define WIP_BIT 0x00000001 /* WIP Bit of SPI SR */ -#define WEL_BIT 0x00000002 /* WEL Bit of SPI SR */ -#define RSR 0x00000005 /* Read Status regiser */ -#define TFF 0x00000100 /* Transfer Finished FLag */ -#define WCF 0x00000200 /* Transfer Finished FLag */ -#define ERF1 0x00000400 /* Error Flag 1 */ -#define ERF2 0x00000800 /* Error Flag 2 */ -#define WM0 0x00001000 /* WM Bank 0 */ -#define WM1 0x00002000 /* WM Bank 1 */ -#define WM2 0x00004000 /* WM Bank 2 */ -#define WM3 0x00008000 /* WM Bank 3 */ -#define WM_SHIFT 12 - -/* TR REG */ -#define READ_ID 0x0000009F /* Read Identification */ -#define BULK_ERASE 0x000000C7 /* BULK erase */ -#define SECTOR_ERASE 0x000000D8 /* SECTOR erase */ -#define WRITE_ENABLE 0x00000006 /* Wenable command to FLASH */ - -struct flash_dev { - u32 density; - ulong size; - ushort sector_count; -}; - -#define SFLASH_PAGE_SIZE 0x100 /* flash page size */ -#define XFER_FINISH_TOUT 15 /* xfer finish timeout(in ms) */ -#define WMODE_TOUT 15 /* write enable timeout(in ms) */ - -extern void smi_init(void); - -#endif diff --git a/qemu/roms/u-boot/include/linux/mtd/ubi.h b/qemu/roms/u-boot/include/linux/mtd/ubi.h deleted file mode 100644 index 4755770c5..000000000 --- a/qemu/roms/u-boot/include/linux/mtd/ubi.h +++ /dev/null @@ -1,174 +0,0 @@ -/* - * Copyright (c) International Business Machines Corp., 2006 - * - * SPDX-License-Identifier: GPL-2.0+ - * - * Author: Artem Bityutskiy (Битюцкий Артём) - */ - -#ifndef __LINUX_UBI_H__ -#define __LINUX_UBI_H__ - -/* #include <asm/ioctl.h> */ -#include <linux/types.h> -#include <mtd/ubi-user.h> - -/* - * enum ubi_open_mode - UBI volume open mode constants. - * - * UBI_READONLY: read-only mode - * UBI_READWRITE: read-write mode - * UBI_EXCLUSIVE: exclusive mode - */ -enum { - UBI_READONLY = 1, - UBI_READWRITE, - UBI_EXCLUSIVE -}; - -/** - * struct ubi_volume_info - UBI volume description data structure. - * @vol_id: volume ID - * @ubi_num: UBI device number this volume belongs to - * @size: how many physical eraseblocks are reserved for this volume - * @used_bytes: how many bytes of data this volume contains - * @used_ebs: how many physical eraseblocks of this volume actually contain any - * data - * @vol_type: volume type (%UBI_DYNAMIC_VOLUME or %UBI_STATIC_VOLUME) - * @corrupted: non-zero if the volume is corrupted (static volumes only) - * @upd_marker: non-zero if the volume has update marker set - * @alignment: volume alignment - * @usable_leb_size: how many bytes are available in logical eraseblocks of - * this volume - * @name_len: volume name length - * @name: volume name - * @cdev: UBI volume character device major and minor numbers - * - * The @corrupted flag is only relevant to static volumes and is always zero - * for dynamic ones. This is because UBI does not care about dynamic volume - * data protection and only cares about protecting static volume data. - * - * The @upd_marker flag is set if the volume update operation was interrupted. - * Before touching the volume data during the update operation, UBI first sets - * the update marker flag for this volume. If the volume update operation was - * further interrupted, the update marker indicates this. If the update marker - * is set, the contents of the volume is certainly damaged and a new volume - * update operation has to be started. - * - * To put it differently, @corrupted and @upd_marker fields have different - * semantics: - * o the @corrupted flag means that this static volume is corrupted for some - * reasons, but not because an interrupted volume update - * o the @upd_marker field means that the volume is damaged because of an - * interrupted update operation. - * - * I.e., the @corrupted flag is never set if the @upd_marker flag is set. - * - * The @used_bytes and @used_ebs fields are only really needed for static - * volumes and contain the number of bytes stored in this static volume and how - * many eraseblock this data occupies. In case of dynamic volumes, the - * @used_bytes field is equivalent to @size*@usable_leb_size, and the @used_ebs - * field is equivalent to @size. - * - * In general, logical eraseblock size is a property of the UBI device, not - * of the UBI volume. Indeed, the logical eraseblock size depends on the - * physical eraseblock size and on how much bytes UBI headers consume. But - * because of the volume alignment (@alignment), the usable size of logical - * eraseblocks if a volume may be less. The following equation is true: - * @usable_leb_size = LEB size - (LEB size mod @alignment), - * where LEB size is the logical eraseblock size defined by the UBI device. - * - * The alignment is multiple to the minimal flash input/output unit size or %1 - * if all the available space is used. - * - * To put this differently, alignment may be considered is a way to change - * volume logical eraseblock sizes. - */ -struct ubi_volume_info { - int ubi_num; - int vol_id; - int size; - long long used_bytes; - int used_ebs; - int vol_type; - int corrupted; - int upd_marker; - int alignment; - int usable_leb_size; - int name_len; - const char *name; - dev_t cdev; -}; - -/** - * struct ubi_device_info - UBI device description data structure. - * @ubi_num: ubi device number - * @leb_size: logical eraseblock size on this UBI device - * @min_io_size: minimal I/O unit size - * @ro_mode: if this device is in read-only mode - * @cdev: UBI character device major and minor numbers - * - * Note, @leb_size is the logical eraseblock size offered by the UBI device. - * Volumes of this UBI device may have smaller logical eraseblock size if their - * alignment is not equivalent to %1. - */ -struct ubi_device_info { - int ubi_num; - int leb_size; - int min_io_size; - int ro_mode; - dev_t cdev; -}; - -/* UBI descriptor given to users when they open UBI volumes */ -struct ubi_volume_desc; - -int ubi_get_device_info(int ubi_num, struct ubi_device_info *di); -void ubi_get_volume_info(struct ubi_volume_desc *desc, - struct ubi_volume_info *vi); -struct ubi_volume_desc *ubi_open_volume(int ubi_num, int vol_id, int mode); -struct ubi_volume_desc *ubi_open_volume_nm(int ubi_num, const char *name, - int mode); -void ubi_close_volume(struct ubi_volume_desc *desc); -int ubi_leb_read(struct ubi_volume_desc *desc, int lnum, char *buf, int offset, - int len, int check); -int ubi_leb_write(struct ubi_volume_desc *desc, int lnum, const void *buf, - int offset, int len, int dtype); -int ubi_leb_change(struct ubi_volume_desc *desc, int lnum, const void *buf, - int len, int dtype); -int ubi_leb_erase(struct ubi_volume_desc *desc, int lnum); -int ubi_leb_unmap(struct ubi_volume_desc *desc, int lnum); -int ubi_leb_map(struct ubi_volume_desc *desc, int lnum, int dtype); -int ubi_is_mapped(struct ubi_volume_desc *desc, int lnum); - -/* - * This function is the same as the 'ubi_leb_read()' function, but it does not - * provide the checking capability. - */ -static inline int ubi_read(struct ubi_volume_desc *desc, int lnum, char *buf, - int offset, int len) -{ - return ubi_leb_read(desc, lnum, buf, offset, len, 0); -} - -/* - * This function is the same as the 'ubi_leb_write()' functions, but it does - * not have the data type argument. - */ -static inline int ubi_write(struct ubi_volume_desc *desc, int lnum, - const void *buf, int offset, int len) -{ - return ubi_leb_write(desc, lnum, buf, offset, len, UBI_UNKNOWN); -} - -/* - * This function is the same as the 'ubi_leb_change()' functions, but it does - * not have the data type argument. - */ -static inline int ubi_change(struct ubi_volume_desc *desc, int lnum, - const void *buf, int len) -{ - return ubi_leb_change(desc, lnum, buf, len, UBI_UNKNOWN); -} - -#endif /* !__LINUX_UBI_H__ */ |