diff options
author | Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
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committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/include/fsl_mdio.h | |
parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/include/fsl_mdio.h')
-rw-r--r-- | qemu/roms/u-boot/include/fsl_mdio.h | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/include/fsl_mdio.h b/qemu/roms/u-boot/include/fsl_mdio.h new file mode 100644 index 000000000..b58713d89 --- /dev/null +++ b/qemu/roms/u-boot/include/fsl_mdio.h @@ -0,0 +1,52 @@ +/* + * Copyright 2009-2012, 2013 Freescale Semiconductor, Inc. + * Jun-jie Zhang <b18070@freescale.com> + * Mingkai Hu <Mingkai.hu@freescale.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __FSL_PHY_H__ +#define __FSL_PHY_H__ + +#include <net.h> +#include <miiphy.h> +#include <asm/fsl_enet.h> + +/* PHY register offsets */ +#define PHY_EXT_PAGE_ACCESS 0x1f + +/* MII Management Configuration Register */ +#define MIIMCFG_RESET_MGMT 0x80000000 +#define MIIMCFG_MGMT_CLOCK_SELECT 0x00000007 +#define MIIMCFG_INIT_VALUE 0x00000003 + +/* MII Management Command Register */ +#define MIIMCOM_READ_CYCLE 0x00000001 +#define MIIMCOM_SCAN_CYCLE 0x00000002 + +/* MII Management Address Register */ +#define MIIMADD_PHY_ADDR_SHIFT 8 + +/* MII Management Indicator Register */ +#define MIIMIND_BUSY 0x00000001 +#define MIIMIND_NOTVALID 0x00000004 + +void tsec_local_mdio_write(struct tsec_mii_mng __iomem *phyregs, int port_addr, + int dev_addr, int reg, int value); +int tsec_local_mdio_read(struct tsec_mii_mng __iomem *phyregs, int port_addr, + int dev_addr, int regnum); +int tsec_phy_read(struct mii_dev *bus, int addr, int dev_addr, int regnum); +int tsec_phy_write(struct mii_dev *bus, int addr, int dev_addr, int regnum, + u16 value); +int memac_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr, + int regnum, u16 value); +int memac_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr, + int regnum); + +struct fsl_pq_mdio_info { + struct tsec_mii_mng __iomem *regs; + char *name; +}; +int fsl_pq_mdio_init(bd_t *bis, struct fsl_pq_mdio_info *info); + +#endif /* __FSL_PHY_H__ */ |