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authorYang Zhang <yang.z.zhang@intel.com>2015-08-28 09:58:54 +0800
committerYang Zhang <yang.z.zhang@intel.com>2015-09-01 12:44:00 +0800
commite44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch)
tree66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/include/fpga.h
parent9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff)
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5 Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/include/fpga.h')
-rw-r--r--qemu/roms/u-boot/include/fpga.h50
1 files changed, 50 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/include/fpga.h b/qemu/roms/u-boot/include/fpga.h
new file mode 100644
index 000000000..15e603a16
--- /dev/null
+++ b/qemu/roms/u-boot/include/fpga.h
@@ -0,0 +1,50 @@
+/*
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <linux/types.h> /* for ulong typedef */
+
+#ifndef _FPGA_H_
+#define _FPGA_H_
+
+#ifndef CONFIG_MAX_FPGA_DEVICES
+#define CONFIG_MAX_FPGA_DEVICES 5
+#endif
+
+/* fpga_xxxx function return value definitions */
+#define FPGA_SUCCESS 0
+#define FPGA_FAIL -1
+
+/* device numbers must be non-negative */
+#define FPGA_INVALID_DEVICE -1
+
+/* root data type defintions */
+typedef enum { /* typedef fpga_type */
+ fpga_min_type, /* range check value */
+ fpga_xilinx, /* Xilinx Family) */
+ fpga_altera, /* unimplemented */
+ fpga_lattice, /* Lattice family */
+ fpga_undefined /* invalid range check value */
+} fpga_type; /* end, typedef fpga_type */
+
+typedef struct { /* typedef fpga_desc */
+ fpga_type devtype; /* switch value to select sub-functions */
+ void *devdesc; /* real device descriptor */
+} fpga_desc; /* end, typedef fpga_desc */
+
+
+/* root function definitions */
+extern void fpga_init(void);
+extern int fpga_add(fpga_type devtype, void *desc);
+extern int fpga_count(void);
+extern int fpga_load(int devnum, const void *buf, size_t bsize);
+extern int fpga_loadbitstream(int devnum, char *fpgadata, size_t size);
+extern int fpga_dump(int devnum, const void *buf, size_t bsize);
+extern int fpga_info(int devnum);
+extern const fpga_desc *const fpga_validate(int devnum, const void *buf,
+ size_t bsize, char *fn);
+
+#endif /* _FPGA_H_ */