Add qemu 2.4.0

Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>

8 files changed, 336 insertions, 0 deletions

diff --git a/qemu/roms/u-boot/drivers/bootcount/Makefile b/qemu/roms/u-boot/drivers/bootcount/Makefile
new file mode 100644
index 000000000..6f1c419c7
--- /dev/null
+++ b/qemu/roms/u-boot/drivers/bootcount/Makefile
@@ -0,0 +1,12 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y				+= bootcount.o
+obj-$(CONFIG_AT91SAM9XE)	+= bootcount_at91.o
+obj-$(CONFIG_BLACKFIN)		+= bootcount_blackfin.o
+obj-$(CONFIG_SOC_DA8XX)		+= bootcount_davinci.o
+obj-$(CONFIG_BOOTCOUNT_AM33XX)	+= bootcount_davinci.o
+obj-$(CONFIG_BOOTCOUNT_RAM)	+= bootcount_ram.o
+obj-$(CONFIG_BOOTCOUNT_ENV)	+= bootcount_env.o
+obj-$(CONFIG_BOOTCOUNT_I2C)	+= bootcount_i2c.o
diff --git a/qemu/roms/u-boot/drivers/bootcount/bootcount.c b/qemu/roms/u-boot/drivers/bootcount/bootcount.c
new file mode 100644
index 000000000..3ad441393
--- /dev/null
+++ b/qemu/roms/u-boot/drivers/bootcount/bootcount.c
@@ -0,0 +1,84 @@
+/*
+ * (C) Copyright 2010-2012
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <bootcount.h>
+#include <linux/compiler.h>
+
+/*
+ * Only override CONFIG_SYS_BOOTCOUNT_ADDR if not already defined. This
+ * way, some boards can define it directly in their config header.
+ */
+#if !defined(CONFIG_SYS_BOOTCOUNT_ADDR)
+
+#if defined(CONFIG_MPC5xxx)
+#define CONFIG_SYS_BOOTCOUNT_ADDR	(MPC5XXX_CDM_BRDCRMB)
+#define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
+#endif /* defined(CONFIG_MPC5xxx) */
+
+#if defined(CONFIG_MPC512X)
+#define CONFIG_SYS_BOOTCOUNT_ADDR	(&((immap_t *)CONFIG_SYS_IMMR)->clk.bcr)
+#define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
+#endif /* defined(CONFIG_MPC512X) */
+
+#if defined(CONFIG_8xx)
+#define CONFIG_SYS_BOOTCOUNT_ADDR (((immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_dpmem + \
+				CPM_BOOTCOUNT_ADDR)
+#endif /* defined(CONFIG_8xx) */
+
+#if defined(CONFIG_MPC8260)
+#include <asm/cpm_8260.h>
+
+#define CONFIG_SYS_BOOTCOUNT_ADDR	(CONFIG_SYS_IMMR + CPM_BOOTCOUNT_ADDR)
+#endif /* defined(CONFIG_MPC8260) */
+
+#if defined(CONFIG_QE)
+#include <asm/immap_qe.h>
+
+#define CONFIG_SYS_BOOTCOUNT_ADDR	(CONFIG_SYS_IMMR + 0x110000 + \
+					 QE_MURAM_SIZE - 2 * sizeof(u32))
+#endif /* defined(CONFIG_MPC8360) */
+
+#if defined(CONFIG_4xx)
+#define CONFIG_SYS_BOOTCOUNT_ADDR	(CONFIG_SYS_OCM_DATA_ADDR + \
+				CONFIG_SYS_BOOTCOUNT_ADDR)
+#endif /* defined(CONFIG_4xx) */
+
+#endif /* !defined(CONFIG_SYS_BOOTCOUNT_ADDR) */
+
+/* Now implement the generic default functions */
+#if defined(CONFIG_SYS_BOOTCOUNT_ADDR)
+__weak void bootcount_store(ulong a)
+{
+	void *reg = (void *)CONFIG_SYS_BOOTCOUNT_ADDR;
+
+#if defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD)
+	raw_bootcount_store(reg, (BOOTCOUNT_MAGIC & 0xffff0000) | a);
+#else
+	raw_bootcount_store(reg, a);
+	raw_bootcount_store(reg + 4, BOOTCOUNT_MAGIC);
+#endif
+}
+
+__weak ulong bootcount_load(void)
+{
+	void *reg = (void *)CONFIG_SYS_BOOTCOUNT_ADDR;
+
+#if defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD)
+	u32 tmp = raw_bootcount_load(reg);
+
+	if ((tmp & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
+		return 0;
+	else
+		return (tmp & 0x0000ffff);
+#else
+	if (raw_bootcount_load(reg + 4) != BOOTCOUNT_MAGIC)
+		return 0;
+	else
+		return raw_bootcount_load(reg);
+#endif
+}
+#endif
diff --git a/qemu/roms/u-boot/drivers/bootcount/bootcount_at91.c b/qemu/roms/u-boot/drivers/bootcount/bootcount_at91.c
new file mode 100644
index 000000000..9c2bbfaf6
--- /dev/null
+++ b/qemu/roms/u-boot/drivers/bootcount/bootcount_at91.c
@@ -0,0 +1,31 @@
+/*
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/at91_gpbr.h>
+
+/*
+ * We combine the BOOTCOUNT_MAGIC and bootcount in one 32-bit register.
+ * This is done so we need to use only one of the four GPBR registers.
+ */
+void bootcount_store(ulong a)
+{
+	at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
+
+	writel((BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff),
+		&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
+}
+
+ulong bootcount_load(void)
+{
+	at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
+
+	ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
+	if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
+		return 0;
+	else
+		return val & 0x0000ffff;
+}
diff --git a/qemu/roms/u-boot/drivers/bootcount/bootcount_blackfin.c b/qemu/roms/u-boot/drivers/bootcount/bootcount_blackfin.c
new file mode 100644
index 000000000..6cf6dd58b
--- /dev/null
+++ b/qemu/roms/u-boot/drivers/bootcount/bootcount_blackfin.c
@@ -0,0 +1,34 @@
+/*
+ * functions for handling bootcount support
+ *
+ * Copyright (c) 2010 Analog Devices Inc.
+ *
+ * Licensed under the 2-clause BSD.
+ */
+
+/* This version uses one 32bit storage and combines the magic/count */
+
+#include <common.h>
+
+/* We abuse the EVT0 MMR for bootcount storage by default */
+#ifndef CONFIG_SYS_BOOTCOUNT_ADDR
+# define CONFIG_SYS_BOOTCOUNT_ADDR EVT0
+#endif
+
+#define MAGIC_MASK 0xffff0000
+#define COUNT_MASK 0x0000ffff
+
+void bootcount_store(ulong cnt)
+{
+	ulong magic = (BOOTCOUNT_MAGIC & MAGIC_MASK) | (cnt & COUNT_MASK);
+	bfin_write32(CONFIG_SYS_BOOTCOUNT_ADDR, magic);
+}
+
+ulong bootcount_load(void)
+{
+	ulong magic = bfin_read32(CONFIG_SYS_BOOTCOUNT_ADDR);
+	if ((magic & MAGIC_MASK) == (BOOTCOUNT_MAGIC & MAGIC_MASK))
+		return magic & COUNT_MASK;
+	else
+		return 0;
+}
diff --git a/qemu/roms/u-boot/drivers/bootcount/bootcount_davinci.c b/qemu/roms/u-boot/drivers/bootcount/bootcount_davinci.c
new file mode 100644
index 000000000..fa87b5e7b
--- /dev/null
+++ b/qemu/roms/u-boot/drivers/bootcount/bootcount_davinci.c
@@ -0,0 +1,42 @@
+/*
+ * (C) Copyright 2011
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * A bootcount driver for the RTC IP block found on many TI platforms.
+ * This requires the RTC clocks, etc, to be enabled prior to use and
+ * not all boards with this IP block on it will have the RTC in use.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <bootcount.h>
+#include <asm/davinci_rtc.h>
+
+void bootcount_store(ulong a)
+{
+	struct davinci_rtc *reg =
+		(struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR;
+
+	/*
+	 * write RTC kick register to enable write
+	 * for RTC Scratch registers. Scratch0 and 1 are
+	 * used for bootcount values.
+	 */
+	writel(RTC_KICK0R_WE, &reg->kick0r);
+	writel(RTC_KICK1R_WE, &reg->kick1r);
+	raw_bootcount_store(&reg->scratch2,
+			    (BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff));
+}
+
+ulong bootcount_load(void)
+{
+	unsigned long val;
+	struct davinci_rtc *reg =
+		(struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR;
+
+	val = raw_bootcount_load(&reg->scratch2);
+	if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
+		return 0;
+	else
+		return val & 0x0000ffff;
+}
diff --git a/qemu/roms/u-boot/drivers/bootcount/bootcount_env.c b/qemu/roms/u-boot/drivers/bootcount/bootcount_env.c
new file mode 100644
index 000000000..2d6e8db12
--- /dev/null
+++ b/qemu/roms/u-boot/drivers/bootcount/bootcount_env.c
@@ -0,0 +1,29 @@
+/*
+ * (C) Copyright 2013
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+
+void bootcount_store(ulong a)
+{
+	int upgrade_available = getenv_ulong("upgrade_available", 10, 0);
+
+	if (upgrade_available) {
+		setenv_ulong("bootcount", a);
+		saveenv();
+	}
+}
+
+ulong bootcount_load(void)
+{
+	int upgrade_available = getenv_ulong("upgrade_available", 10, 0);
+	ulong val = 0;
+
+	if (upgrade_available)
+		val = getenv_ulong("bootcount", 10, 0);
+
+	return val;
+}
diff --git a/qemu/roms/u-boot/drivers/bootcount/bootcount_i2c.c b/qemu/roms/u-boot/drivers/bootcount/bootcount_i2c.c
new file mode 100644
index 000000000..e27b168c5
--- /dev/null
+++ b/qemu/roms/u-boot/drivers/bootcount/bootcount_i2c.c
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2013
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <bootcount.h>
+#include <linux/compiler.h>
+#include <i2c.h>
+
+#define BC_MAGIC	0xbc
+
+void bootcount_store(ulong a)
+{
+	unsigned char buf[3];
+	int ret;
+
+	buf[0] = BC_MAGIC;
+	buf[1] = (a & 0xff);
+	ret = i2c_write(CONFIG_SYS_I2C_RTC_ADDR, CONFIG_SYS_BOOTCOUNT_ADDR,
+		  CONFIG_BOOTCOUNT_ALEN, buf, 2);
+	if (ret != 0)
+		puts("Error writing bootcount\n");
+}
+
+ulong bootcount_load(void)
+{
+	unsigned char buf[3];
+	int ret;
+
+	ret = i2c_read(CONFIG_SYS_I2C_RTC_ADDR, CONFIG_SYS_BOOTCOUNT_ADDR,
+		       CONFIG_BOOTCOUNT_ALEN, buf, 2);
+	if (ret != 0) {
+		puts("Error loading bootcount\n");
+		return 0;
+	}
+	if (buf[0] == BC_MAGIC)
+		return buf[1];
+
+	bootcount_store(0);
+
+	return 0;
+}
diff --git a/qemu/roms/u-boot/drivers/bootcount/bootcount_ram.c b/qemu/roms/u-boot/drivers/bootcount/bootcount_ram.c
new file mode 100644
index 000000000..5bdabcd56
--- /dev/null
+++ b/qemu/roms/u-boot/drivers/bootcount/bootcount_ram.c
@@ -0,0 +1,60 @@
+/*
+ * (C) Copyright 2010
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+const ulong patterns[]      = {	0x00000000,
+				0xFFFFFFFF,
+				0xFF00FF00,
+				0x0F0F0F0F,
+				0xF0F0F0F0};
+const ulong NBR_OF_PATTERNS = sizeof(patterns) / sizeof(*patterns);
+const ulong OFFS_PATTERN    = 3;
+const ulong REPEAT_PATTERN  = 1000;
+
+void bootcount_store(ulong a)
+{
+	ulong *save_addr;
+	ulong size = 0;
+	int i;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
+		size += gd->bd->bi_dram[i].size;
+	save_addr = (ulong *)(size - BOOTCOUNT_ADDR);
+	writel(a, save_addr);
+	writel(BOOTCOUNT_MAGIC, &save_addr[1]);
+
+	for (i = 0; i < REPEAT_PATTERN; i++)
+		writel(patterns[i % NBR_OF_PATTERNS],
+			&save_addr[i + OFFS_PATTERN]);
+
+}
+
+ulong bootcount_load(void)
+{
+	ulong *save_addr;
+	ulong size = 0;
+	ulong counter = 0;
+	int i, tmp;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
+		size += gd->bd->bi_dram[i].size;
+	save_addr = (ulong *)(size - BOOTCOUNT_ADDR);
+
+	counter = readl(&save_addr[0]);
+
+	/* Is the counter reliable, check in the big pattern for bit errors */
+	for (i = 0; (i < REPEAT_PATTERN) && (counter != 0); i++) {
+		tmp = readl(&save_addr[i + OFFS_PATTERN]);
+		if (tmp != patterns[i % NBR_OF_PATTERNS])
+			counter = 0;
+	}
+	return counter;
+}