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author | Yang Zhang <yang.z.zhang@intel.com> | 2015-08-28 09:58:54 +0800 |
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committer | Yang Zhang <yang.z.zhang@intel.com> | 2015-09-01 12:44:00 +0800 |
commit | e44e3482bdb4d0ebde2d8b41830ac2cdb07948fb (patch) | |
tree | 66b09f592c55df2878107a468a91d21506104d3f /qemu/roms/u-boot/doc/README.mpc74xx | |
parent | 9ca8dbcc65cfc63d6f5ef3312a33184e1d726e00 (diff) |
Add qemu 2.4.0
Change-Id: Ic99cbad4b61f8b127b7dc74d04576c0bcbaaf4f5
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'qemu/roms/u-boot/doc/README.mpc74xx')
-rw-r--r-- | qemu/roms/u-boot/doc/README.mpc74xx | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/qemu/roms/u-boot/doc/README.mpc74xx b/qemu/roms/u-boot/doc/README.mpc74xx new file mode 100644 index 000000000..f81f1c2e8 --- /dev/null +++ b/qemu/roms/u-boot/doc/README.mpc74xx @@ -0,0 +1,22 @@ +This file contains status information for the port of U-Boot to the +Motorola mpc74xx series of CPUs. + +Author: Josh Huber <huber@mclx.com> + Mission Critical Linux, Inc. + +Currently the support for these CPUs is pretty minimal, but enough to +get things going. (much like the support for the Galileo Eval Board) + +There is a framework in place to enable the L2 cache, and to program +the BATs. Currently, there are still problems with the code which +sets up the L2 cache, so it's not enabled. (IMHO, it shouldn't be +anyway). Additionally, there is support for enabling the MMU, which +we also don't do. The BATs are programmed just for the benefit of +jumping into Linux in a sane configuration. + +Most of the code was based on other cpus supported by U-Boot. + +If you find any errors in the CPU setup code, please send us a note. + +Thanks, +Josh |